401   CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_CSR);  in HAL_FDCAN_Init()
407   while ((hfdcan->Instance->CCCR & FDCAN_CCCR_CSA) == FDCAN_CCCR_CSA)  in HAL_FDCAN_Init()
422   SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_INIT);  in HAL_FDCAN_Init()
428   while ((hfdcan->Instance->CCCR & FDCAN_CCCR_INIT) == 0U)  in HAL_FDCAN_Init()
444   SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_CCE);  in HAL_FDCAN_Init()
449     CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_DAR);  in HAL_FDCAN_Init()
453     SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_DAR);  in HAL_FDCAN_Init()
459     SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_TXP);  in HAL_FDCAN_Init()
463     CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_TXP);  in HAL_FDCAN_Init()
469     CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_PXHD);  in HAL_FDCAN_Init()
473     SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_PXHD);  in HAL_FDCAN_Init()
477   MODIFY_REG(hfdcan->Instance->CCCR, FDCAN_FRAME_FD_BRS, hfdcan->Init.FrameFormat);  in HAL_FDCAN_Init()
480   CLEAR_BIT(hfdcan->Instance->CCCR, (FDCAN_CCCR_TEST | FDCAN_CCCR_MON | FDCAN_CCCR_ASM));  in HAL_FDCAN_Init()
494     SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_ASM);  in HAL_FDCAN_Init()
501       SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_TEST);  in HAL_FDCAN_Init()
508         SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_MON);  in HAL_FDCAN_Init()
514       SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_MON);  in HAL_FDCAN_Init()
681   SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_CSR);  in HAL_FDCAN_EnterPowerDownMode()
687   while ((hfdcan->Instance->CCCR & FDCAN_CCCR_CSA) == 0U)  in HAL_FDCAN_EnterPowerDownMode()
716   CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_CSR);  in HAL_FDCAN_ExitPowerDownMode()
722   while ((hfdcan->Instance->CCCR & FDCAN_CCCR_CSA) == FDCAN_CCCR_CSA)  in HAL_FDCAN_ExitPowerDownMode()
737   CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_INIT);  in HAL_FDCAN_ExitPowerDownMode()
2476     CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_NISO);  in HAL_FDCAN_EnableISOMode()
2502     SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_NISO);  in HAL_FDCAN_DisableISOMode()
2528     SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_EFBI);  in HAL_FDCAN_EnableEdgeFiltering()
2554     CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_EFBI);  in HAL_FDCAN_DisableEdgeFiltering()
2621     CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_INIT);  in HAL_FDCAN_Start()
2651     SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_INIT);  in HAL_FDCAN_Stop()
2654     while ((hfdcan->Instance->CCCR & FDCAN_CCCR_INIT) == 0U)  in HAL_FDCAN_Stop()
2676     CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_CSR);  in HAL_FDCAN_Stop()
2679     while ((hfdcan->Instance->CCCR & FDCAN_CCCR_CSA) == FDCAN_CCCR_CSA)  in HAL_FDCAN_Stop()
2698     SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_CCE);  in HAL_FDCAN_Stop()
3421   OperationMode = ((hfdcan->Instance->CCCR & FDCAN_CCCR_ASM) >> FDCAN_CCCR_ASM_Pos);  in HAL_FDCAN_IsRestrictedOperationMode()
3439     CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_ASM);  in HAL_FDCAN_ExitRestrictedOperationMode()