Lines Matching refs:heth
259 static void ETH_SetMACConfig(ETH_HandleTypeDef *heth, const ETH_MACConfigTypeDef *macconf);
260 static void ETH_SetDMAConfig(ETH_HandleTypeDef *heth, const ETH_DMAConfigTypeDef *dmaconf);
261 static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth);
262 static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth);
263 static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth);
264 static uint32_t ETH_Prepare_Tx_Descriptors(ETH_HandleTypeDef *heth, const ETH_TxPacketConfigTypeDef…
266 static void ETH_UpdateDescriptor(ETH_HandleTypeDef *heth);
269 static void ETH_InitCallbacksToDefault(ETH_HandleTypeDef *heth);
314 HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth) in HAL_ETH_Init() argument
319 if (heth == NULL) in HAL_ETH_Init()
323 if (heth->gState == HAL_ETH_STATE_RESET) in HAL_ETH_Init()
325 heth->gState = HAL_ETH_STATE_BUSY; in HAL_ETH_Init()
329 ETH_InitCallbacksToDefault(heth); in HAL_ETH_Init()
331 if (heth->MspInitCallback == NULL) in HAL_ETH_Init()
333 heth->MspInitCallback = HAL_ETH_MspInit; in HAL_ETH_Init()
337 heth->MspInitCallback(heth); in HAL_ETH_Init()
340 HAL_ETH_MspInit(heth); in HAL_ETH_Init()
345 if (heth->Init.MediaInterface == HAL_ETH_MII_MODE) in HAL_ETH_Init()
349 else if (heth->Init.MediaInterface == HAL_ETH_RGMII_MODE) in HAL_ETH_Init()
361 SET_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR); in HAL_ETH_Init()
367 while (READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR) > 0U) in HAL_ETH_Init()
372 heth->ErrorCode = HAL_ETH_ERROR_TIMEOUT; in HAL_ETH_Init()
374 heth->gState = HAL_ETH_STATE_ERROR; in HAL_ETH_Init()
381 HAL_ETH_SetMDIOClockRange(heth); in HAL_ETH_Init()
384 WRITE_REG(heth->Instance->MAC1USTCR, (((uint32_t)HAL_RCC_GetHCLKFreq() / ETH_MAC_US_TICK) - 1U)); in HAL_ETH_Init()
387 ETH_MACDMAConfig(heth); in HAL_ETH_Init()
390 ETH_DMATxDescListInit(heth); in HAL_ETH_Init()
393 ETH_DMARxDescListInit(heth); in HAL_ETH_Init()
396 if ((heth->Init.RxBuffLen % 0x4U) != 0x0U) in HAL_ETH_Init()
399 heth->ErrorCode = HAL_ETH_ERROR_PARAM; in HAL_ETH_Init()
401 heth->gState = HAL_ETH_STATE_ERROR; in HAL_ETH_Init()
409 …MODIFY_REG(heth->Instance->DMA_CH[ch].DMACRXCR, ETH_DMACxRXCR_RBSZ, ((heth->Init.RxBuffLen) << 1)); in HAL_ETH_Init()
414 …heth->Instance->MACA0HR = (((uint32_t)(heth->Init.MACAddr[5]) << 8) | (uint32_t)heth->Init.MACAddr… in HAL_ETH_Init()
416 …heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACA… in HAL_ETH_Init()
417 … ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]); in HAL_ETH_Init()
421 SET_BIT(heth->Instance->MMCRIMR, ETH_MMCRIMR_RXLPITRCIM | ETH_MMCRIMR_RXLPIUSCIM | \ in HAL_ETH_Init()
425 SET_BIT(heth->Instance->MMCTIMR, ETH_MMCTIMR_TXLPITRCIM | ETH_MMCTIMR_TXLPIUSCIM | \ in HAL_ETH_Init()
428 heth->ErrorCode = HAL_ETH_ERROR_NONE; in HAL_ETH_Init()
429 heth->gState = HAL_ETH_STATE_READY; in HAL_ETH_Init()
439 HAL_StatusTypeDef HAL_ETH_DeInit(ETH_HandleTypeDef *heth) in HAL_ETH_DeInit() argument
442 heth->gState = HAL_ETH_STATE_BUSY; in HAL_ETH_DeInit()
446 if (heth->MspDeInitCallback == NULL) in HAL_ETH_DeInit()
448 heth->MspDeInitCallback = HAL_ETH_MspDeInit; in HAL_ETH_DeInit()
451 heth->MspDeInitCallback(heth); in HAL_ETH_DeInit()
455 HAL_ETH_MspDeInit(heth); in HAL_ETH_DeInit()
460 heth->gState = HAL_ETH_STATE_RESET; in HAL_ETH_DeInit()
472 __weak void HAL_ETH_MspInit(ETH_HandleTypeDef *heth) in HAL_ETH_MspInit() argument
475 UNUSED(heth); in HAL_ETH_MspInit()
487 __weak void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth) in HAL_ETH_MspDeInit() argument
490 UNUSED(heth); in HAL_ETH_MspDeInit()
514 HAL_StatusTypeDef HAL_ETH_RegisterCallback(ETH_HandleTypeDef *heth, HAL_ETH_CallbackIDTypeDef Callb… in HAL_ETH_RegisterCallback() argument
522 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_RegisterCallback()
526 if (heth->gState == HAL_ETH_STATE_READY) in HAL_ETH_RegisterCallback()
531 heth->TxCpltCallback = pCallback; in HAL_ETH_RegisterCallback()
535 heth->RxCpltCallback = pCallback; in HAL_ETH_RegisterCallback()
539 heth->ErrorCallback = pCallback; in HAL_ETH_RegisterCallback()
543 heth->PMTCallback = pCallback; in HAL_ETH_RegisterCallback()
547 heth->EEECallback = pCallback; in HAL_ETH_RegisterCallback()
551 heth->WakeUpCallback = pCallback; in HAL_ETH_RegisterCallback()
555 heth->MspInitCallback = pCallback; in HAL_ETH_RegisterCallback()
559 heth->MspDeInitCallback = pCallback; in HAL_ETH_RegisterCallback()
564 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_RegisterCallback()
570 else if (heth->gState == HAL_ETH_STATE_RESET) in HAL_ETH_RegisterCallback()
575 heth->MspInitCallback = pCallback; in HAL_ETH_RegisterCallback()
579 heth->MspDeInitCallback = pCallback; in HAL_ETH_RegisterCallback()
584 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_RegisterCallback()
593 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_RegisterCallback()
617 HAL_StatusTypeDef HAL_ETH_UnRegisterCallback(ETH_HandleTypeDef *heth, HAL_ETH_CallbackIDTypeDef Cal… in HAL_ETH_UnRegisterCallback() argument
621 if (heth->gState == HAL_ETH_STATE_READY) in HAL_ETH_UnRegisterCallback()
626 heth->TxCpltCallback = HAL_ETH_TxCpltCallback; in HAL_ETH_UnRegisterCallback()
630 heth->RxCpltCallback = HAL_ETH_RxCpltCallback; in HAL_ETH_UnRegisterCallback()
634 heth->ErrorCallback = HAL_ETH_ErrorCallback; in HAL_ETH_UnRegisterCallback()
638 heth->PMTCallback = HAL_ETH_PMTCallback; in HAL_ETH_UnRegisterCallback()
642 heth->EEECallback = HAL_ETH_EEECallback; in HAL_ETH_UnRegisterCallback()
646 heth->WakeUpCallback = HAL_ETH_WakeUpCallback; in HAL_ETH_UnRegisterCallback()
650 heth->MspInitCallback = HAL_ETH_MspInit; in HAL_ETH_UnRegisterCallback()
654 heth->MspDeInitCallback = HAL_ETH_MspDeInit; in HAL_ETH_UnRegisterCallback()
659 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_UnRegisterCallback()
665 else if (heth->gState == HAL_ETH_STATE_RESET) in HAL_ETH_UnRegisterCallback()
670 heth->MspInitCallback = HAL_ETH_MspInit; in HAL_ETH_UnRegisterCallback()
674 heth->MspDeInitCallback = HAL_ETH_MspDeInit; in HAL_ETH_UnRegisterCallback()
679 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_UnRegisterCallback()
688 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_UnRegisterCallback()
722 HAL_StatusTypeDef HAL_ETH_Start(ETH_HandleTypeDef *heth) in HAL_ETH_Start() argument
726 if (heth->gState == HAL_ETH_STATE_READY) in HAL_ETH_Start()
728 heth->gState = HAL_ETH_STATE_BUSY; in HAL_ETH_Start()
733 heth->RxOpCH = ch; in HAL_ETH_Start()
734 heth->RxDescList[ch].RxBuildDescCnt = ETH_RX_DESC_CNT; in HAL_ETH_Start()
736 ETH_UpdateDescriptor(heth); in HAL_ETH_Start()
740 heth->RxOpCH = 0; in HAL_ETH_Start()
745 SET_BIT(heth->Instance->MTL_QUEUE[ch].MTLTXQOMR, ETH_MTLTXQxOMR_FTQ); in HAL_ETH_Start()
747 SET_BIT(heth->Instance->DMA_CH[ch].DMACTXCR, ETH_DMACxTXCR_ST); in HAL_ETH_Start()
749 SET_BIT(heth->Instance->DMA_CH[ch].DMACRXCR, ETH_DMACxRXCR_SR); in HAL_ETH_Start()
751 heth->Instance->DMA_CH[ch].DMACSR |= (ETH_DMACxSR_TPS | ETH_DMACxSR_RPS); in HAL_ETH_Start()
755 SET_BIT(heth->Instance->MACCR, ETH_MACCR_TE); in HAL_ETH_Start()
758 SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Start()
760 heth->gState = HAL_ETH_STATE_STARTED; in HAL_ETH_Start()
776 HAL_StatusTypeDef HAL_ETH_Start_IT(ETH_HandleTypeDef *heth) in HAL_ETH_Start_IT() argument
780 if (heth->gState == HAL_ETH_STATE_READY) in HAL_ETH_Start_IT()
782 heth->gState = HAL_ETH_STATE_BUSY; in HAL_ETH_Start_IT()
788 heth->RxOpCH = ch; in HAL_ETH_Start_IT()
789 heth->RxDescList[ch].ItMode = 1U; in HAL_ETH_Start_IT()
791 heth->RxDescList[ch].RxBuildDescCnt = ETH_RX_DESC_CNT; in HAL_ETH_Start_IT()
793 ETH_UpdateDescriptor(heth); in HAL_ETH_Start_IT()
800 __HAL_ETH_DMA_CH_ENABLE_IT(heth, (ETH_DMACxIER_NIE | ETH_DMACxIER_RIE | ETH_DMACxIER_TIE | in HAL_ETH_Start_IT()
803 SET_BIT(heth->Instance->DMA_CH[ch].DMACRXCR, ETH_DMACxRXCR_SR); in HAL_ETH_Start_IT()
805 heth->Instance->DMA_CH[ch].DMACSR |= (ETH_DMACxSR_TPS | ETH_DMACxSR_RPS); in HAL_ETH_Start_IT()
807 SET_BIT(heth->Instance->MTL_QUEUE[ch].MTLTXQOMR, ETH_MTLTXQxOMR_FTQ); in HAL_ETH_Start_IT()
809 SET_BIT(heth->Instance->DMA_CH[ch].DMACTXCR, ETH_DMACxTXCR_ST); in HAL_ETH_Start_IT()
813 heth->RxOpCH = 0; in HAL_ETH_Start_IT()
816 SET_BIT(heth->Instance->MACCR, ETH_MACCR_TE); in HAL_ETH_Start_IT()
819 SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Start_IT()
821 heth->gState = HAL_ETH_STATE_STARTED; in HAL_ETH_Start_IT()
836 HAL_StatusTypeDef HAL_ETH_Stop(ETH_HandleTypeDef *heth) in HAL_ETH_Stop() argument
840 if (heth->gState == HAL_ETH_STATE_STARTED) in HAL_ETH_Stop()
843 heth->gState = HAL_ETH_STATE_BUSY; in HAL_ETH_Stop()
848 CLEAR_BIT(heth->Instance->DMA_CH[ch].DMACTXCR, ETH_DMACxTXCR_ST); in HAL_ETH_Stop()
850 CLEAR_BIT(heth->Instance->DMA_CH[ch].DMACRXCR, ETH_DMACxRXCR_SR); in HAL_ETH_Stop()
852 SET_BIT(heth->Instance->MTL_QUEUE[ch].MTLTXQOMR, ETH_MTLTXQxOMR_FTQ); in HAL_ETH_Stop()
856 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Stop()
859 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_TE); in HAL_ETH_Stop()
861 heth->gState = HAL_ETH_STATE_READY; in HAL_ETH_Stop()
878 HAL_StatusTypeDef HAL_ETH_Stop_IT(ETH_HandleTypeDef *heth) in HAL_ETH_Stop_IT() argument
884 if (heth->gState == HAL_ETH_STATE_STARTED) in HAL_ETH_Stop_IT()
887 heth->gState = HAL_ETH_STATE_BUSY; in HAL_ETH_Stop_IT()
897 __HAL_ETH_DMA_CH_DISABLE_IT(heth, (ETH_DMACxIER_NIE | ETH_DMACxIER_RIE | ETH_DMACxIER_TIE | in HAL_ETH_Stop_IT()
901 CLEAR_BIT(heth->Instance->DMA_CH[ch].DMACTXCR, ETH_DMACxTXCR_ST); in HAL_ETH_Stop_IT()
904 CLEAR_BIT(heth->Instance->DMA_CH[ch].DMACRXCR, ETH_DMACxRXCR_SR); in HAL_ETH_Stop_IT()
907 SET_BIT(heth->Instance->MTL_QUEUE[ch].MTLTXQOMR, ETH_MTLTXQxOMR_FTQ); in HAL_ETH_Stop_IT()
912 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Stop_IT()
915 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_TE); in HAL_ETH_Stop_IT()
922 dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList[ch].RxDesc[descindex]; in HAL_ETH_Stop_IT()
924 heth->RxDescList[ch].ItMode = 0U; in HAL_ETH_Stop_IT()
928 heth->gState = HAL_ETH_STATE_READY; in HAL_ETH_Stop_IT()
947 HAL_StatusTypeDef HAL_ETH_Transmit(ETH_HandleTypeDef *heth, ETH_TxPacketConfigTypeDef *pTxConfig, u… in HAL_ETH_Transmit() argument
955 heth->ErrorCode |= HAL_ETH_ERROR_PARAM; in HAL_ETH_Transmit()
959 if (heth->gState == HAL_ETH_STATE_STARTED) in HAL_ETH_Transmit()
964 if (ETH_Prepare_Tx_Descriptors(heth, pTxConfig, 0) != HAL_ETH_ERROR_NONE) in HAL_ETH_Transmit()
967 heth->ErrorCode |= HAL_ETH_ERROR_BUSY; in HAL_ETH_Transmit()
974 dmatxdesc = (ETH_DMADescTypeDef *)(&heth->TxDescList[ch])-> in HAL_ETH_Transmit()
975 TxDesc[heth->TxDescList[ch].CurTxDesc]; in HAL_ETH_Transmit()
978 INCR_TX_DESC_INDEX(heth->TxDescList[ch].CurTxDesc, 1U); in HAL_ETH_Transmit()
982 WRITE_REG(heth->Instance->DMA_CH[ch].DMACTXDTPR, in HAL_ETH_Transmit()
983 (uint32_t)(heth->TxDescList[ch].TxDesc[heth->TxDescList[ch].CurTxDesc])); in HAL_ETH_Transmit()
990 if ((heth->Instance->DMA_CH[ch].DMACSR & ETH_DMACxSR_FBE) != (uint32_t)RESET) in HAL_ETH_Transmit()
992 heth->ErrorCode |= (uint32_t)HAL_ETH_ERROR_DMA; in HAL_ETH_Transmit()
993 heth->DMAErrorCode = heth->Instance->DMA_CH[ch].DMACSR; in HAL_ETH_Transmit()
1003 heth->ErrorCode |= HAL_ETH_ERROR_TIMEOUT; in HAL_ETH_Transmit()
1027 HAL_StatusTypeDef HAL_ETH_Transmit_IT(ETH_HandleTypeDef *heth, ETH_TxPacketConfigTypeDef *pTxConfig) in HAL_ETH_Transmit_IT() argument
1033 heth->ErrorCode |= HAL_ETH_ERROR_PARAM; in HAL_ETH_Transmit_IT()
1037 if (heth->gState == HAL_ETH_STATE_STARTED) in HAL_ETH_Transmit_IT()
1042 heth->TxDescList[ch].CurrentPacketAddress = (uint32_t *)pTxConfig->pData; in HAL_ETH_Transmit_IT()
1045 if (ETH_Prepare_Tx_Descriptors(heth, pTxConfig, 1) != HAL_ETH_ERROR_NONE) in HAL_ETH_Transmit_IT()
1047 heth->ErrorCode |= HAL_ETH_ERROR_BUSY; in HAL_ETH_Transmit_IT()
1052 INCR_TX_DESC_INDEX(heth->TxDescList[ch].CurTxDesc, 1U); in HAL_ETH_Transmit_IT()
1059 WRITE_REG(heth->Instance->DMA_CH[ch].DMACTXDTPR, in HAL_ETH_Transmit_IT()
1060 (uint32_t)(heth->TxDescList[ch].TxDesc[heth->TxDescList[ch].CurTxDesc])); in HAL_ETH_Transmit_IT()
1076 HAL_StatusTypeDef HAL_ETH_ReadData(ETH_HandleTypeDef *heth, void **pAppBuff) in HAL_ETH_ReadData() argument
1078 uint32_t ch = heth->RxOpCH; in HAL_ETH_ReadData()
1090 heth->ErrorCode |= HAL_ETH_ERROR_PARAM; in HAL_ETH_ReadData()
1094 if (heth->gState != HAL_ETH_STATE_STARTED) in HAL_ETH_ReadData()
1099 descidx = heth->RxDescList[ch].RxDescIdx; in HAL_ETH_ReadData()
1100 dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList[ch].RxDesc[descidx]; in HAL_ETH_ReadData()
1101 desccntmax = ETH_RX_DESC_CNT - heth->RxDescList[ch].RxBuildDescCnt; in HAL_ETH_ReadData()
1108 (heth->RxDescList[ch].pRxStart != NULL)) in HAL_ETH_ReadData()
1113 heth->RxDescList[ch].RxDescCnt = 0; in HAL_ETH_ReadData()
1114 heth->RxDescList[ch].RxDataLength = 0; in HAL_ETH_ReadData()
1118 … bufflength = READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_PL) - heth->RxDescList[ch].RxDataLength; in HAL_ETH_ReadData()
1124 heth->RxDescList[ch].pRxLastRxDesc = dmarxdesc->DESC3; in HAL_ETH_ReadData()
1134 dmarxdesc_next = (ETH_DMADescTypeDef *)heth->RxDescList[ch].RxDesc[descidx_next]; in HAL_ETH_ReadData()
1139 heth->RxDescList[ch].TimeStamp.TimeStampHigh = dmarxdesc_next->DESC1; in HAL_ETH_ReadData()
1141 heth->RxDescList[ch].TimeStamp.TimeStampLow = dmarxdesc_next->DESC0; in HAL_ETH_ReadData()
1149 heth->rxLinkCallback(&heth->RxDescList[ch].pRxStart, &heth->RxDescList[ch].pRxEnd, in HAL_ETH_ReadData()
1153 HAL_ETH_RxLinkCallback(&heth->RxDescList[ch].pRxStart, &heth->RxDescList[ch].pRxEnd, in HAL_ETH_ReadData()
1156 heth->RxDescList[ch].RxDescCnt++; in HAL_ETH_ReadData()
1157 heth->RxDescList[ch].RxDataLength += bufflength; in HAL_ETH_ReadData()
1166 dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList[ch].RxDesc[descidx]; in HAL_ETH_ReadData()
1170 heth->RxDescList[ch].RxBuildDescCnt += desccnt; in HAL_ETH_ReadData()
1171 if ((heth->RxDescList[ch].RxBuildDescCnt) != 0U) in HAL_ETH_ReadData()
1174 ETH_UpdateDescriptor(heth); in HAL_ETH_ReadData()
1177 heth->RxDescList[ch].RxDescIdx = descidx; in HAL_ETH_ReadData()
1182 *pAppBuff = heth->RxDescList[ch].pRxStart; in HAL_ETH_ReadData()
1184 heth->RxDescList[ch].pRxStart = NULL; in HAL_ETH_ReadData()
1201 static void ETH_UpdateDescriptor(ETH_HandleTypeDef *heth) in ETH_UpdateDescriptor() argument
1203 uint32_t ch = heth -> RxOpCH; in ETH_UpdateDescriptor()
1211 descidx = heth->RxDescList[ch].RxBuildDescIdx; in ETH_UpdateDescriptor()
1212 dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList[ch].RxDesc[descidx]; in ETH_UpdateDescriptor()
1213 desccount = heth->RxDescList[ch].RxBuildDescCnt; in ETH_UpdateDescriptor()
1223 heth->rxAllocateCallback(&buff); in ETH_UpdateDescriptor()
1247 if (heth->RxDescList[ch].ItMode != 0U) in ETH_UpdateDescriptor()
1259 dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList[ch].RxDesc[descidx]; in ETH_UpdateDescriptor()
1264 if (heth->RxDescList[ch].RxBuildDescCnt != desccount) in ETH_UpdateDescriptor()
1273 … WRITE_REG(heth->Instance->DMA_CH[ch].DMACRXDTPR, ((uint32_t)(heth->Init.RxDesc[ch] + (tailidx)))); in ETH_UpdateDescriptor()
1275 heth->RxDescList[ch].RxBuildDescIdx = descidx; in ETH_UpdateDescriptor()
1276 heth->RxDescList[ch].RxBuildDescCnt = desccount; in ETH_UpdateDescriptor()
1287 HAL_StatusTypeDef HAL_ETH_RegisterRxAllocateCallback(ETH_HandleTypeDef *heth, in HAL_ETH_RegisterRxAllocateCallback() argument
1297 heth->rxAllocateCallback = rxAllocateCallback; in HAL_ETH_RegisterRxAllocateCallback()
1308 HAL_StatusTypeDef HAL_ETH_UnRegisterRxAllocateCallback(ETH_HandleTypeDef *heth) in HAL_ETH_UnRegisterRxAllocateCallback() argument
1311 heth->rxAllocateCallback = HAL_ETH_RxAllocateCallback; in HAL_ETH_UnRegisterRxAllocateCallback()
1357 HAL_StatusTypeDef HAL_ETH_RegisterRxLinkCallback(ETH_HandleTypeDef *heth, pETH_rxLinkCallbackTypeDe… in HAL_ETH_RegisterRxLinkCallback() argument
1366 heth->rxLinkCallback = rxLinkCallback; in HAL_ETH_RegisterRxLinkCallback()
1377 HAL_StatusTypeDef HAL_ETH_UnRegisterRxLinkCallback(ETH_HandleTypeDef *heth) in HAL_ETH_UnRegisterRxLinkCallback() argument
1380 heth->rxLinkCallback = HAL_ETH_RxLinkCallback; in HAL_ETH_UnRegisterRxLinkCallback()
1392 HAL_StatusTypeDef HAL_ETH_GetRxDataErrorCode(const ETH_HandleTypeDef *heth, uint32_t *pErrorCode) in HAL_ETH_GetRxDataErrorCode() argument
1394 uint32_t ch = heth->RxOpCH; in HAL_ETH_GetRxDataErrorCode()
1396 *pErrorCode = READ_BIT(heth->RxDescList[ch].pRxLastRxDesc, ETH_DMARXNDESCWBF_ERRORS_MASK); in HAL_ETH_GetRxDataErrorCode()
1408 HAL_StatusTypeDef HAL_ETH_RegisterTxFreeCallback(ETH_HandleTypeDef *heth, pETH_txFreeCallbackTypeDe… in HAL_ETH_RegisterTxFreeCallback() argument
1417 heth->txFreeCallback = txFreeCallback; in HAL_ETH_RegisterTxFreeCallback()
1428 HAL_StatusTypeDef HAL_ETH_UnRegisterTxFreeCallback(ETH_HandleTypeDef *heth) in HAL_ETH_UnRegisterTxFreeCallback() argument
1431 heth->txFreeCallback = HAL_ETH_TxFreeCallback; in HAL_ETH_UnRegisterTxFreeCallback()
1456 HAL_StatusTypeDef HAL_ETH_ReleaseTxPacket(ETH_HandleTypeDef *heth) in HAL_ETH_ReleaseTxPacket() argument
1458 uint32_t ch = heth->TxOpCH; in HAL_ETH_ReleaseTxPacket()
1459 ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList[ch]; in HAL_ETH_ReleaseTxPacket()
1465 ETH_TimeStampTypeDef *timestamp = &heth->TxTimestamp; in HAL_ETH_ReleaseTxPacket()
1484 if ((heth->Init.TxDesc[ch][idx].DESC3 & ETH_DMATXNDESCRF_OWN) == 0U) in HAL_ETH_ReleaseTxPacket()
1488 CLEAR_BIT(heth->Init.TxDesc[ch][idx].DESC2, ETH_DMATXNDESCRF_TTSE); in HAL_ETH_ReleaseTxPacket()
1490 if ((heth->Init.TxDesc[ch][idx].DESC3 & ETH_DMATXNDESCWBF_LD) in HAL_ETH_ReleaseTxPacket()
1491 && (heth->Init.TxDesc[ch][idx].DESC3 & ETH_DMATXNDESCWBF_TTSS)) in HAL_ETH_ReleaseTxPacket()
1494 timestamp->TimeStampLow = heth->Init.TxDesc[ch][idx].DESC0; in HAL_ETH_ReleaseTxPacket()
1496 timestamp->TimeStampHigh = heth->Init.TxDesc[ch][idx].DESC1; in HAL_ETH_ReleaseTxPacket()
1511 heth->txPtpCallback(dmatxdesclist->PacketAddress[idx], timestamp); in HAL_ETH_ReleaseTxPacket()
1515 heth->txFreeCallback(dmatxdesclist->PacketAddress[idx]); in HAL_ETH_ReleaseTxPacket()
1556 HAL_StatusTypeDef HAL_ETH_PTP_SetConfig(ETH_HandleTypeDef *heth, ETH_PTP_ConfigTypeDef *ptpconfig) in HAL_ETH_PTP_SetConfig() argument
1567 CLEAR_BIT(heth->Instance->MACIER, ETH_MACIER_TSIE); in HAL_ETH_PTP_SetConfig()
1586 MODIFY_REG(heth->Instance->MACTSCR, ETH_MACTSCR_MASK, tmpTSCR); in HAL_ETH_PTP_SetConfig()
1589 SET_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSENA); in HAL_ETH_PTP_SetConfig()
1590 WRITE_REG(heth->Instance->MACSSIR, ptpconfig->TimestampSubsecondInc); in HAL_ETH_PTP_SetConfig()
1591 WRITE_REG(heth->Instance->MACTSAR, ptpconfig->TimestampAddend); in HAL_ETH_PTP_SetConfig()
1596 SET_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSADDREG); in HAL_ETH_PTP_SetConfig()
1597 while ((heth->Instance->MACTSCR & ETH_MACTSCR_TSADDREG) != 0) in HAL_ETH_PTP_SetConfig()
1604 heth->IsPtpConfigured = HAL_ETH_PTP_CONFIGURED; in HAL_ETH_PTP_SetConfig()
1607 time.Seconds = heth->Instance->MACSTSR; in HAL_ETH_PTP_SetConfig()
1609 time.NanoSeconds = heth->Instance->MACSTNR; in HAL_ETH_PTP_SetConfig()
1611 HAL_ETH_PTP_SetTime(heth, &time); in HAL_ETH_PTP_SetConfig()
1614 SET_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSINIT); in HAL_ETH_PTP_SetConfig()
1628 HAL_StatusTypeDef HAL_ETH_PTP_GetConfig(ETH_HandleTypeDef *heth, ETH_PTP_ConfigTypeDef *ptpconfig) in HAL_ETH_PTP_GetConfig() argument
1634 ptpconfig->AV8021ASMEN = ((READ_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_AV8021ASMEN) >> in HAL_ETH_PTP_GetConfig()
1636 ptpconfig->Timestamp = ((READ_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSENA) >> in HAL_ETH_PTP_GetConfig()
1638 ptpconfig->TimestampUpdate = ((READ_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSCFUPDT) >> in HAL_ETH_PTP_GetConfig()
1640 ptpconfig->TimestampAll = ((READ_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSENALL) >> in HAL_ETH_PTP_GetConfig()
1642 ptpconfig->TimestampRolloverMode = ((READ_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSCTRLSSR) >> in HAL_ETH_PTP_GetConfig()
1644 ptpconfig->TimestampV2 = ((READ_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSVER2ENA) >> in HAL_ETH_PTP_GetConfig()
1646 ptpconfig->TimestampEthernet = ((READ_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSIPENA) >> in HAL_ETH_PTP_GetConfig()
1648 ptpconfig->TimestampIPv6 = ((READ_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSIPV6ENA) >> in HAL_ETH_PTP_GetConfig()
1650 ptpconfig->TimestampIPv4 = ((READ_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSIPV4ENA) >> in HAL_ETH_PTP_GetConfig()
1652 ptpconfig->TimestampEvent = ((READ_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSEVNTENA) >> in HAL_ETH_PTP_GetConfig()
1654 ptpconfig->TimestampMaster = ((READ_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSMSTRENA) >> in HAL_ETH_PTP_GetConfig()
1656 ptpconfig->TimestampSnapshots = ((READ_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_SNAPTYPSEL) >> in HAL_ETH_PTP_GetConfig()
1658 ptpconfig->TimestampFilter = ((READ_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSENMACADDR) >> in HAL_ETH_PTP_GetConfig()
1660 ptpconfig->TimestampStatusMode = ((READ_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TXTSSTSM) >> in HAL_ETH_PTP_GetConfig()
1662 ptpconfig->TimestampExternalSystemTime = ((READ_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_ESTI) >> in HAL_ETH_PTP_GetConfig()
1664 ptpconfig->TimestampAddend = READ_BIT(heth->Instance->MACTSAR, ETH_MACTSAR_TSAR); in HAL_ETH_PTP_GetConfig()
1665 ptpconfig->TimestampSubsecondInc = READ_BIT(heth->Instance->MACSSIR, ETH_MACSTSR_TSS); in HAL_ETH_PTP_GetConfig()
1679 HAL_StatusTypeDef HAL_ETH_PTP_SetTime(ETH_HandleTypeDef *heth, ETH_TimeTypeDef *time) in HAL_ETH_PTP_SetTime() argument
1681 if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) in HAL_ETH_PTP_SetTime()
1684 heth->Instance->MACSTSUR = time->Seconds; in HAL_ETH_PTP_SetTime()
1687 heth->Instance->MACSTNUR = time->NanoSeconds; in HAL_ETH_PTP_SetTime()
1690 SET_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSINIT); in HAL_ETH_PTP_SetTime()
1710 HAL_StatusTypeDef HAL_ETH_PTP_GetTime(ETH_HandleTypeDef *heth, ETH_TimeTypeDef *time) in HAL_ETH_PTP_GetTime() argument
1712 if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) in HAL_ETH_PTP_GetTime()
1715 time->Seconds = heth->Instance->MACSTSR; in HAL_ETH_PTP_GetTime()
1717 time->NanoSeconds = heth->Instance->MACSTNR; in HAL_ETH_PTP_GetTime()
1737 HAL_StatusTypeDef HAL_ETH_PTP_AddTimeOffset(ETH_HandleTypeDef *heth, ETH_PtpUpdateTypeDef ptpoffset… in HAL_ETH_PTP_AddTimeOffset() argument
1740 if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) in HAL_ETH_PTP_AddTimeOffset()
1745 heth->Instance->MACSTSUR = ETH_MACSTSUR_VALUE - timeoffset->Seconds + 1U; in HAL_ETH_PTP_AddTimeOffset()
1747 if (READ_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSCTRLSSR) == ETH_MACTSCR_TSCTRLSSR) in HAL_ETH_PTP_AddTimeOffset()
1750 heth->Instance->MACSTNUR = ETH_MACSTNUR_VALUE - timeoffset->NanoSeconds; in HAL_ETH_PTP_AddTimeOffset()
1755 heth->Instance->MACSTNUR = ETH_MACSTSUR_VALUE - timeoffset->NanoSeconds + 1U; in HAL_ETH_PTP_AddTimeOffset()
1761 heth->Instance->MACSTSUR = timeoffset->Seconds; in HAL_ETH_PTP_AddTimeOffset()
1763 heth->Instance->MACSTNUR = timeoffset->NanoSeconds; in HAL_ETH_PTP_AddTimeOffset()
1766 SET_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSUPDT); in HAL_ETH_PTP_AddTimeOffset()
1784 HAL_StatusTypeDef HAL_ETH_PTP_InsertTxTimestamp(ETH_HandleTypeDef *heth) in HAL_ETH_PTP_InsertTxTimestamp() argument
1786 uint32_t ch = heth->TxOpCH; in HAL_ETH_PTP_InsertTxTimestamp()
1787 ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList[ch]; in HAL_ETH_PTP_InsertTxTimestamp()
1791 if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) in HAL_ETH_PTP_InsertTxTimestamp()
1814 HAL_StatusTypeDef HAL_ETH_PTP_GetTxTimestamp(ETH_HandleTypeDef *heth, ETH_TimeStampTypeDef *timesta… in HAL_ETH_PTP_GetTxTimestamp() argument
1816 uint32_t ch = heth->TxOpCH; in HAL_ETH_PTP_GetTxTimestamp()
1817 ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList[ch]; in HAL_ETH_PTP_GetTxTimestamp()
1821 if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) in HAL_ETH_PTP_GetTxTimestamp()
1846 HAL_StatusTypeDef HAL_ETH_PTP_GetRxTimestamp(ETH_HandleTypeDef *heth, ETH_TimeStampTypeDef *timesta… in HAL_ETH_PTP_GetRxTimestamp() argument
1848 uint32_t ch = heth->RxOpCH; in HAL_ETH_PTP_GetRxTimestamp()
1850 if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) in HAL_ETH_PTP_GetRxTimestamp()
1853 timestamp->TimeStampLow = heth->RxDescList[ch].TimeStamp.TimeStampLow; in HAL_ETH_PTP_GetRxTimestamp()
1855 timestamp->TimeStampHigh = heth->RxDescList[ch].TimeStamp.TimeStampHigh; in HAL_ETH_PTP_GetRxTimestamp()
1874 HAL_StatusTypeDef HAL_ETH_RegisterTxPtpCallback(ETH_HandleTypeDef *heth, pETH_txPtpCallbackTypeDef … in HAL_ETH_RegisterTxPtpCallback() argument
1882 heth->txPtpCallback = txPtpCallback; in HAL_ETH_RegisterTxPtpCallback()
1893 HAL_StatusTypeDef HAL_ETH_UnRegisterTxPtpCallback(ETH_HandleTypeDef *heth) in HAL_ETH_UnRegisterTxPtpCallback() argument
1896 heth->txPtpCallback = HAL_ETH_TxPtpCallback; in HAL_ETH_UnRegisterTxPtpCallback()
1924 void HAL_ETH_IRQHandler(ETH_HandleTypeDef *heth) in HAL_ETH_IRQHandler() argument
1926 uint32_t mac_flag = READ_REG(heth->Instance->MACISR); in HAL_ETH_IRQHandler()
1928 uint32_t dma_ch0_flag = READ_REG(heth->Instance->DMA_CH[ETH_DMA_CH0_IDX].DMACSR); in HAL_ETH_IRQHandler()
1929 uint32_t dma_ch1_flag = READ_REG(heth->Instance->DMA_CH[ETH_DMA_CH1_IDX].DMACSR); in HAL_ETH_IRQHandler()
1930 uint32_t dma_ch0_itsource = READ_REG(heth->Instance->DMA_CH[ETH_DMA_CH0_IDX].DMACIER); in HAL_ETH_IRQHandler()
1931 uint32_t dma_ch1_itsource = READ_REG(heth->Instance->DMA_CH[ETH_DMA_CH1_IDX].DMACIER); in HAL_ETH_IRQHandler()
1939 __HAL_ETH_DMA_CH_CLEAR_IT(heth, ETH_DMACxSR_RI | ETH_DMACxSR_NIS, ETH_DMA_CH0_IDX); in HAL_ETH_IRQHandler()
1942 SET_BIT(heth->RxCH, ETH_DMA_CH0); in HAL_ETH_IRQHandler()
1946 heth->RxCpltCallback(heth); in HAL_ETH_IRQHandler()
1949 HAL_ETH_RxCpltCallback(heth); in HAL_ETH_IRQHandler()
1953 CLEAR_BIT(heth->RxCH, ETH_DMA_CH0); in HAL_ETH_IRQHandler()
1960 __HAL_ETH_DMA_CH_CLEAR_IT(heth, ETH_DMACxSR_RI | ETH_DMACxSR_NIS, ETH_DMA_CH1_IDX); in HAL_ETH_IRQHandler()
1963 SET_BIT(heth->RxCH, ETH_DMA_CH1); in HAL_ETH_IRQHandler()
1967 heth->RxCpltCallback(heth); in HAL_ETH_IRQHandler()
1970 HAL_ETH_RxCpltCallback(heth); in HAL_ETH_IRQHandler()
1974 CLEAR_BIT(heth->RxCH, ETH_DMA_CH1); in HAL_ETH_IRQHandler()
1981 __HAL_ETH_DMA_CH_CLEAR_IT(heth, ETH_DMACxSR_TI | ETH_DMACxSR_NIS, ETH_DMA_CH0_IDX); in HAL_ETH_IRQHandler()
1984 SET_BIT(heth->TxCH, ETH_DMA_CH0); in HAL_ETH_IRQHandler()
1988 heth->TxCpltCallback(heth); in HAL_ETH_IRQHandler()
1991 HAL_ETH_TxCpltCallback(heth); in HAL_ETH_IRQHandler()
1995 CLEAR_BIT(heth->TxCH, ETH_DMA_CH0); in HAL_ETH_IRQHandler()
2002 __HAL_ETH_DMA_CH_CLEAR_IT(heth, ETH_DMACxSR_TI | ETH_DMACxSR_NIS, ETH_DMA_CH1_IDX); in HAL_ETH_IRQHandler()
2005 SET_BIT(heth->TxCH, ETH_DMA_CH1); in HAL_ETH_IRQHandler()
2009 heth->TxCpltCallback(heth); in HAL_ETH_IRQHandler()
2012 HAL_ETH_TxCpltCallback(heth); in HAL_ETH_IRQHandler()
2016 CLEAR_BIT(heth->TxCH, ETH_DMA_CH1); in HAL_ETH_IRQHandler()
2022 heth->ErrorCode |= (uint32_t)HAL_ETH_ERROR_DMA_CH0; in HAL_ETH_IRQHandler()
2027 heth->DMAErrorCode = READ_BIT(heth->Instance->DMA_CH[ETH_DMA_CH0_IDX].DMACSR, in HAL_ETH_IRQHandler()
2030 __HAL_ETH_DMA_CH_DISABLE_IT(heth, ETH_DMACxIER_NIE | ETH_DMACxIER_AIE, ETH_DMA_CH0_IDX); in HAL_ETH_IRQHandler()
2033 heth->gState = HAL_ETH_STATE_ERROR; in HAL_ETH_IRQHandler()
2038 heth->DMAErrorCode = READ_BIT(heth->Instance->DMA_CH[ETH_DMA_CH0_IDX].DMACSR, in HAL_ETH_IRQHandler()
2043 __HAL_ETH_DMA_CH_CLEAR_IT(heth, (ETH_DMACxSR_CDE | ETH_DMACxSR_ETI | ETH_DMACxSR_RWT | in HAL_ETH_IRQHandler()
2049 heth->ErrorCallback(heth); in HAL_ETH_IRQHandler()
2052 HAL_ETH_ErrorCallback(heth); in HAL_ETH_IRQHandler()
2059 heth->ErrorCode |= (uint32_t)HAL_ETH_ERROR_DMA_CH1; in HAL_ETH_IRQHandler()
2064 heth->DMAErrorCode = READ_BIT(heth->Instance->DMA_CH[ETH_DMA_CH1_IDX].DMACSR, in HAL_ETH_IRQHandler()
2067 __HAL_ETH_DMA_CH_DISABLE_IT(heth, ETH_DMACxIER_NIE | ETH_DMACxIER_AIE, ETH_DMA_CH1_IDX); in HAL_ETH_IRQHandler()
2070 heth->gState = HAL_ETH_STATE_ERROR; in HAL_ETH_IRQHandler()
2075 heth->DMAErrorCode = READ_BIT(heth->Instance->DMA_CH[ETH_DMA_CH1_IDX].DMACSR, in HAL_ETH_IRQHandler()
2080 __HAL_ETH_DMA_CH_CLEAR_IT(heth, (ETH_DMACxSR_CDE | ETH_DMACxSR_ETI | ETH_DMACxSR_RWT | in HAL_ETH_IRQHandler()
2085 heth->ErrorCallback(heth); in HAL_ETH_IRQHandler()
2088 HAL_ETH_ErrorCallback(heth); in HAL_ETH_IRQHandler()
2096 heth->ErrorCode |= HAL_ETH_ERROR_MAC; in HAL_ETH_IRQHandler()
2099 heth->MACErrorCode = READ_REG(heth->Instance->MACRXTXSR); in HAL_ETH_IRQHandler()
2101 heth->gState = HAL_ETH_STATE_ERROR; in HAL_ETH_IRQHandler()
2105 heth->ErrorCallback(heth); in HAL_ETH_IRQHandler()
2108 HAL_ETH_ErrorCallback(heth); in HAL_ETH_IRQHandler()
2110 heth->MACErrorCode = (uint32_t)(0x0U); in HAL_ETH_IRQHandler()
2117 …heth->MACWakeUpEvent = READ_BIT(heth->Instance->MACPCSR, (ETH_MACPCSR_RWKPRCVD | ETH_MACPCSR_MGKPR… in HAL_ETH_IRQHandler()
2121 heth->PMTCallback(heth); in HAL_ETH_IRQHandler()
2124 HAL_ETH_PMTCallback(heth); in HAL_ETH_IRQHandler()
2127 heth->MACWakeUpEvent = (uint32_t)(0x0U); in HAL_ETH_IRQHandler()
2134 heth->MACLPIEvent = READ_BIT(heth->Instance->MACLCSR, 0x0000000FU); in HAL_ETH_IRQHandler()
2138 heth->EEECallback(heth); in HAL_ETH_IRQHandler()
2141 HAL_ETH_EEECallback(heth); in HAL_ETH_IRQHandler()
2144 heth->MACLPIEvent = (uint32_t)(0x0U); in HAL_ETH_IRQHandler()
2154 heth->WakeUpCallback(heth); in HAL_ETH_IRQHandler()
2157 HAL_ETH_WakeUpCallback(heth); in HAL_ETH_IRQHandler()
2168 __weak void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *heth) in HAL_ETH_TxCpltCallback() argument
2171 UNUSED(heth); in HAL_ETH_TxCpltCallback()
2183 __weak void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth) in HAL_ETH_RxCpltCallback() argument
2186 UNUSED(heth); in HAL_ETH_RxCpltCallback()
2198 __weak void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth) in HAL_ETH_ErrorCallback() argument
2201 UNUSED(heth); in HAL_ETH_ErrorCallback()
2213 __weak void HAL_ETH_PMTCallback(ETH_HandleTypeDef *heth) in HAL_ETH_PMTCallback() argument
2216 UNUSED(heth); in HAL_ETH_PMTCallback()
2228 __weak void HAL_ETH_EEECallback(ETH_HandleTypeDef *heth) in HAL_ETH_EEECallback() argument
2231 UNUSED(heth); in HAL_ETH_EEECallback()
2243 __weak void HAL_ETH_WakeUpCallback(ETH_HandleTypeDef *heth) in HAL_ETH_WakeUpCallback() argument
2246 UNUSED(heth); in HAL_ETH_WakeUpCallback()
2261 HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYRe… in HAL_ETH_ReadPHYRegister() argument
2268 if (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_GB) != (uint32_t)RESET) in HAL_ETH_ReadPHYRegister()
2274 WRITE_REG(tmpreg, heth->Instance->MACMDIOAR); in HAL_ETH_ReadPHYRegister()
2288 WRITE_REG(heth->Instance->MACMDIOAR, tmpreg); in HAL_ETH_ReadPHYRegister()
2293 while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_GB) > 0U) in HAL_ETH_ReadPHYRegister()
2302 WRITE_REG(*pRegValue, (uint16_t)heth->Instance->MACMDIODR); in HAL_ETH_ReadPHYRegister()
2316 HAL_StatusTypeDef HAL_ETH_WritePHYRegister(const ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_… in HAL_ETH_WritePHYRegister() argument
2323 if (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_GB) != (uint32_t)RESET) in HAL_ETH_WritePHYRegister()
2329 WRITE_REG(tmpreg, heth->Instance->MACMDIOAR); in HAL_ETH_WritePHYRegister()
2343 WRITE_REG(heth->Instance->MACMDIODR, (uint16_t)RegValue); in HAL_ETH_WritePHYRegister()
2346 WRITE_REG(heth->Instance->MACMDIOAR, tmpreg); in HAL_ETH_WritePHYRegister()
2351 while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_GB) > 0U) in HAL_ETH_WritePHYRegister()
2388 HAL_StatusTypeDef HAL_ETH_GetMACConfig(const ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *macconf) in HAL_ETH_GetMACConfig() argument
2396 macconf->PreambleLength = READ_BIT(heth->Instance->MACCR, ETH_MACCR_PRELEN); in HAL_ETH_GetMACConfig()
2397 …macconf->DeferralCheck = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DC) >> 4) > 0U) ? ENABLE : DI… in HAL_ETH_GetMACConfig()
2398 macconf->BackOffLimit = READ_BIT(heth->Instance->MACCR, ETH_MACCR_BL); in HAL_ETH_GetMACConfig()
2399 …macconf->RetryTransmission = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DR) >> 8) == 0U) ? ENABLE… in HAL_ETH_GetMACConfig()
2400 macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, in HAL_ETH_GetMACConfig()
2402 …macconf->ReceiveOwn = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DO) >> 10) == 0U) ? ENABLE : DIS… in HAL_ETH_GetMACConfig()
2403 macconf->CarrierSenseBeforeTransmit = ((READ_BIT(heth->Instance->MACCR, in HAL_ETH_GetMACConfig()
2405 …macconf->LoopbackMode = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_LM) >> 12) > 0U) ? ENABLE : DI… in HAL_ETH_GetMACConfig()
2406 macconf->DuplexMode = READ_BIT(heth->Instance->MACCR, ETH_MACCR_DM); in HAL_ETH_GetMACConfig()
2407 macconf->Speed = READ_BIT(heth->Instance->MACCR, ETH_MACCR_FES); in HAL_ETH_GetMACConfig()
2408 …macconf->PortSelect = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_PS) >> 15) > 0U) ? ENABLE : DISA… in HAL_ETH_GetMACConfig()
2409 …macconf->JumboPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JE) >> 16) > 0U) ? ENABLE : DIS… in HAL_ETH_GetMACConfig()
2410 …macconf->Jabber = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JD) >> 17) == 0U) ? ENABLE : DISABLE; in HAL_ETH_GetMACConfig()
2411 …macconf->PacketBurst = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_PB) >> 18) > 0U) ? ENABLE : DIS… in HAL_ETH_GetMACConfig()
2412 …macconf->Watchdog = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_WD) >> 19) == 0U) ? ENABLE : DISAB… in HAL_ETH_GetMACConfig()
2413 …macconf->AutomaticPadCRCStrip = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_ACS) >> 20) > 0U) ? EN… in HAL_ETH_GetMACConfig()
2414 …macconf->CRCStripTypePacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_CST) >> 21) > 0U) ? ENAB… in HAL_ETH_GetMACConfig()
2415 …macconf->Support2KPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_S2KP) >> 22) > 0U) ? ENABLE… in HAL_ETH_GetMACConfig()
2416 macconf->GiantPacketSizeLimitControl = ((READ_BIT(heth->Instance->MACCR, in HAL_ETH_GetMACConfig()
2418 macconf->InterPacketGapVal = READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPG); in HAL_ETH_GetMACConfig()
2419 …macconf->ChecksumOffload = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPC) >> 27) > 0U) ? ENABLE … in HAL_ETH_GetMACConfig()
2420 macconf->SourceAddrControl = READ_BIT(heth->Instance->MACCR, ETH_MACCR_SARC); in HAL_ETH_GetMACConfig()
2421 macconf->GiantPacketSizeLimit = READ_BIT(heth->Instance->MACECR, ETH_MACECR_GPSL); in HAL_ETH_GetMACConfig()
2422 macconf->CRCCheckingRxPackets = ((READ_BIT(heth->Instance->MACECR, in HAL_ETH_GetMACConfig()
2424 …macconf->SlowProtocolDetect = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_SPEN) >> 17) > 0U) ? E… in HAL_ETH_GetMACConfig()
2425 macconf->UnicastSlowProtocolPacketDetect = ((READ_BIT(heth->Instance->MACECR, in HAL_ETH_GetMACConfig()
2427 macconf->ExtendedInterPacketGap = ((READ_BIT(heth->Instance->MACECR, in HAL_ETH_GetMACConfig()
2429 macconf->ExtendedInterPacketGapVal = READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPG) >> 25; in HAL_ETH_GetMACConfig()
2430 …macconf->ProgrammableWatchdog = ((READ_BIT(heth->Instance->MACWTR, ETH_MACWTR_PWE) >> 8) > 0U) ? E… in HAL_ETH_GetMACConfig()
2431 macconf->WatchdogTimeout = READ_BIT(heth->Instance->MACWTR, ETH_MACWTR_WTO); in HAL_ETH_GetMACConfig()
2432 macconf->TransmitFlowControl = ((READ_BIT(heth->Instance->MACQ0TXFCR, in HAL_ETH_GetMACConfig()
2434 macconf->ZeroQuantaPause = ((READ_BIT(heth->Instance->MACQ0TXFCR, in HAL_ETH_GetMACConfig()
2436 macconf->PauseLowThreshold = READ_BIT(heth->Instance->MACQ0TXFCR, ETH_MACQ0TXFCR_PLT); in HAL_ETH_GetMACConfig()
2437 macconf->PauseTime = (READ_BIT(heth->Instance->MACQ0TXFCR, ETH_MACQ0TXFCR_PT) >> 16); in HAL_ETH_GetMACConfig()
2438 …macconf->ReceiveFlowControl = (READ_BIT(heth->Instance->MACRXFCR, ETH_MACRXFCR_RFE) > 0U) ? ENABLE… in HAL_ETH_GetMACConfig()
2439 macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACRXFCR, in HAL_ETH_GetMACConfig()
2453 HAL_StatusTypeDef HAL_ETH_GetDMAConfig(const ETH_HandleTypeDef *heth, ETH_DMAConfigTypeDef *dmaconf) in HAL_ETH_GetDMAConfig() argument
2462 …dmaconf->AddressAlignedBeats = ((READ_BIT(heth->Instance->DMASBMR, ETH_DMASBMR_AAL) >> 12) > 0U) ?… in HAL_ETH_GetDMAConfig()
2463 dmaconf->BurstMode = READ_BIT(heth->Instance->DMASBMR, ETH_DMASBMR_FB); in HAL_ETH_GetDMAConfig()
2464 …dmaconf->RxOSRLimit = READ_BIT(heth->Instance->DMASBMR, ETH_DMASBMR_RD_OSR_LMT_1 | ETH_DMASBMR_RD_… in HAL_ETH_GetDMAConfig()
2465 …dmaconf->TxOSRLimit = READ_BIT(heth->Instance->DMASBMR, ETH_DMASBMR_WR_OSR_LMT_1 | ETH_DMASBMR_WR_… in HAL_ETH_GetDMAConfig()
2466 …dmaconf->TransmitArbitrationAlgorithm = READ_BIT(heth->Instance->DMAMR, (ETH_DMAMR_TAA_WRR | ETH_D… in HAL_ETH_GetDMAConfig()
2467 …dmaconf->TransmitPriority = ((READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_TXPR) >> 11) > 0U) ? ENABL… in HAL_ETH_GetDMAConfig()
2468 …dmaconf->AXIBLENMaxSize = READ_BIT(heth->Instance->DMASBMR, ETH_DMASBMR_BLEN256 | ETH_DMASBMR_BLEN… in HAL_ETH_GetDMAConfig()
2474 …dmaconf->DMACh[ch].RxDMABurstLength = READ_BIT(heth->Instance->DMA_CH[ch].DMACRXCR, ETH_DMACxRXCR_… in HAL_ETH_GetDMAConfig()
2475 dmaconf->DMACh[ch].SecondPacketOperate = ((READ_BIT(heth->Instance->DMA_CH[ch].DMACTXCR, in HAL_ETH_GetDMAConfig()
2477 dmaconf->DMACh[ch].TCPSegmentation = ((READ_BIT(heth->Instance->DMA_CH[ch].DMACTXCR, in HAL_ETH_GetDMAConfig()
2479 …dmaconf->DMACh[ch].TxDMABurstLength = READ_BIT(heth->Instance->DMA_CH[ch].DMACTXCR, ETH_DMACxTXCR_… in HAL_ETH_GetDMAConfig()
2480 …dmaconf->DMACh[ch].DescriptorSkipLength = READ_BIT(heth->Instance->DMA_CH[ch].DMACCR, ETH_DMACxCR_… in HAL_ETH_GetDMAConfig()
2481 dmaconf->DMACh[ch].PBLx8Mode = ((READ_BIT(heth->Instance->DMA_CH[ch].DMACCR, in HAL_ETH_GetDMAConfig()
2483 dmaconf->DMACh[ch].FlushRxPacket = ((READ_BIT(heth->Instance->DMA_CH[ch].DMACRXCR, in HAL_ETH_GetDMAConfig()
2485 …dmaconf->DMACh[ch].MaximumSegmentSize = READ_BIT(heth->Instance->DMA_CH[ch].DMACCR, ETH_DMACxCR_MS… in HAL_ETH_GetDMAConfig()
2499 HAL_StatusTypeDef HAL_ETH_SetMACConfig(ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *macconf) in HAL_ETH_SetMACConfig() argument
2506 if (heth->gState == HAL_ETH_STATE_READY) in HAL_ETH_SetMACConfig()
2508 ETH_SetMACConfig(heth, macconf); in HAL_ETH_SetMACConfig()
2526 HAL_StatusTypeDef HAL_ETH_SetDMAConfig(ETH_HandleTypeDef *heth, ETH_DMAConfigTypeDef *dmaconf) in HAL_ETH_SetDMAConfig() argument
2533 if (heth->gState == HAL_ETH_STATE_READY) in HAL_ETH_SetDMAConfig()
2535 ETH_SetDMAConfig(heth, dmaconf); in HAL_ETH_SetDMAConfig()
2551 void HAL_ETH_SetMDIOClockRange(ETH_HandleTypeDef *heth) in HAL_ETH_SetMDIOClockRange() argument
2557 tmpreg = (heth->Instance)->MACMDIOAR; in HAL_ETH_SetMDIOClockRange()
2608 (heth->Instance)->MACMDIOAR = (uint32_t)tmpreg; in HAL_ETH_SetMDIOClockRange()
2619 HAL_StatusTypeDef HAL_ETH_SetMACFilterConfig(ETH_HandleTypeDef *heth, const ETH_MACFilterConfigType… in HAL_ETH_SetMACFilterConfig() argument
2640 MODIFY_REG(heth->Instance->MACPFR, ETH_MACPFR_MASK, filterconfig); in HAL_ETH_SetMACFilterConfig()
2653 HAL_StatusTypeDef HAL_ETH_GetMACFilterConfig(const ETH_HandleTypeDef *heth, ETH_MACFilterConfigType… in HAL_ETH_GetMACFilterConfig() argument
2660 …pFilterConfig->PromiscuousMode = ((READ_BIT(heth->Instance->MACPFR, ETH_MACPFR_PR)) > 0U) ? ENABLE… in HAL_ETH_GetMACFilterConfig()
2661 …pFilterConfig->HashUnicast = ((READ_BIT(heth->Instance->MACPFR, ETH_MACPFR_HUC) >> 1) > 0U) ? ENAB… in HAL_ETH_GetMACFilterConfig()
2662 …pFilterConfig->HashMulticast = ((READ_BIT(heth->Instance->MACPFR, ETH_MACPFR_HMC) >> 2) > 0U) ? EN… in HAL_ETH_GetMACFilterConfig()
2663 pFilterConfig->DestAddrInverseFiltering = ((READ_BIT(heth->Instance->MACPFR, in HAL_ETH_GetMACFilterConfig()
2665 …pFilterConfig->PassAllMulticast = ((READ_BIT(heth->Instance->MACPFR, ETH_MACPFR_PM) >> 4) > 0U) ? … in HAL_ETH_GetMACFilterConfig()
2666 …pFilterConfig->BroadcastFilter = ((READ_BIT(heth->Instance->MACPFR, ETH_MACPFR_DBF) >> 5) > 0U) ? … in HAL_ETH_GetMACFilterConfig()
2667 pFilterConfig->ControlPacketsFilter = READ_BIT(heth->Instance->MACPFR, ETH_MACPFR_PCF); in HAL_ETH_GetMACFilterConfig()
2668 pFilterConfig->SrcAddrInverseFiltering = ((READ_BIT(heth->Instance->MACPFR, in HAL_ETH_GetMACFilterConfig()
2670 …pFilterConfig->SrcAddrFiltering = ((READ_BIT(heth->Instance->MACPFR, ETH_MACPFR_SAF) >> 9) > 0U) ?… in HAL_ETH_GetMACFilterConfig()
2671 …pFilterConfig->HachOrPerfectFilter = ((READ_BIT(heth->Instance->MACPFR, ETH_MACPFR_HPF) >> 10) > 0… in HAL_ETH_GetMACFilterConfig()
2673 …pFilterConfig->ReceiveAllMode = ((READ_BIT(heth->Instance->MACPFR, ETH_MACPFR_RA) >> 31) > 0U) ? E… in HAL_ETH_GetMACFilterConfig()
2690 HAL_StatusTypeDef HAL_ETH_SetSourceMACAddrMatch(const ETH_HandleTypeDef *heth, uint32_t AddrNbr, in HAL_ETH_SetSourceMACAddrMatch() argument
2702 macaddrhr = ((uint32_t) &(heth->Instance->MACA0HR) + AddrNbr); in HAL_ETH_SetSourceMACAddrMatch()
2704 macaddrlr = ((uint32_t) &(heth->Instance->MACA0LR) + AddrNbr); in HAL_ETH_SetSourceMACAddrMatch()
2726 HAL_StatusTypeDef HAL_ETH_SetHashTable(ETH_HandleTypeDef *heth, uint32_t *pHashTable) in HAL_ETH_SetHashTable() argument
2733 heth->Instance->MACHT0R = pHashTable[0]; in HAL_ETH_SetHashTable()
2734 heth->Instance->MACHT1R = pHashTable[1]; in HAL_ETH_SetHashTable()
2748 void HAL_ETH_SetRxVLANIdentifier(ETH_HandleTypeDef *heth, uint32_t ComparisonBits, uint32_t VLANIde… in HAL_ETH_SetRxVLANIdentifier() argument
2752 MODIFY_REG(heth->Instance->MACVTDR, ETH_MACVTDR_VID_16BIT, VLANIdentifier); in HAL_ETH_SetRxVLANIdentifier()
2753 CLEAR_BIT(heth->Instance->MACVTCR, ETH_MACVTCR_ETV); in HAL_ETH_SetRxVLANIdentifier()
2757 MODIFY_REG(heth->Instance->MACVTDR, ETH_MACVTDR_VID_12BIT, VLANIdentifier); in HAL_ETH_SetRxVLANIdentifier()
2758 SET_BIT(heth->Instance->MACVTCR, ETH_MACVTCR_ETV); in HAL_ETH_SetRxVLANIdentifier()
2770 void HAL_ETH_EnterPowerDownMode(ETH_HandleTypeDef *heth, const ETH_PowerDownConfigTypeDef *pPowerDo… in HAL_ETH_EnterPowerDownMode() argument
2781 __HAL_ETH_MAC_ENABLE_IT(heth, ETH_MACIER_PMTIE); in HAL_ETH_EnterPowerDownMode()
2783 MODIFY_REG(heth->Instance->MACPCSR, ETH_MACPCSR_MASK, powerdownconfig); in HAL_ETH_EnterPowerDownMode()
2792 void HAL_ETH_ExitPowerDownMode(ETH_HandleTypeDef *heth) in HAL_ETH_ExitPowerDownMode() argument
2795 …CLEAR_BIT(heth->Instance->MACPCSR, ETH_MACPCSR_RWKPKTEN | ETH_MACPCSR_MGKPKTEN | ETH_MACPCSR_GLBLU… in HAL_ETH_ExitPowerDownMode()
2798 if (READ_BIT(heth->Instance->MACPCSR, ETH_MACPCSR_PWRDWN) != (uint32_t)RESET) in HAL_ETH_ExitPowerDownMode()
2801 CLEAR_BIT(heth->Instance->MACPCSR, ETH_MACPCSR_PWRDWN); in HAL_ETH_ExitPowerDownMode()
2805 __HAL_ETH_MAC_DISABLE_IT(heth, ETH_MACIER_PMTIE); in HAL_ETH_ExitPowerDownMode()
2816 HAL_StatusTypeDef HAL_ETH_SetWakeUpFilter(ETH_HandleTypeDef *heth, uint32_t *pFilter, uint32_t Coun… in HAL_ETH_SetWakeUpFilter() argument
2826 SET_BIT(heth->Instance->MACPCSR, ETH_MACPCSR_RWKFILTRST); in HAL_ETH_SetWakeUpFilter()
2832 WRITE_REG(heth->Instance->MACRWKPFR, pFilter[regindex]); in HAL_ETH_SetWakeUpFilter()
2865 HAL_ETH_StateTypeDef HAL_ETH_GetState(const ETH_HandleTypeDef *heth) in HAL_ETH_GetState() argument
2867 return heth->gState; in HAL_ETH_GetState()
2876 uint32_t HAL_ETH_GetError(const ETH_HandleTypeDef *heth) in HAL_ETH_GetError() argument
2878 return heth->ErrorCode; in HAL_ETH_GetError()
2887 uint32_t HAL_ETH_GetDMAError(const ETH_HandleTypeDef *heth) in HAL_ETH_GetDMAError() argument
2889 return heth->DMAErrorCode; in HAL_ETH_GetDMAError()
2898 uint32_t HAL_ETH_GetMACError(const ETH_HandleTypeDef *heth) in HAL_ETH_GetMACError() argument
2900 return heth->MACErrorCode; in HAL_ETH_GetMACError()
2909 uint32_t HAL_ETH_GetMACWakeUpSource(const ETH_HandleTypeDef *heth) in HAL_ETH_GetMACWakeUpSource() argument
2911 return heth->MACWakeUpEvent; in HAL_ETH_GetMACWakeUpSource()
2920 uint32_t HAL_ETH_GetTxBuffersNumber(const ETH_HandleTypeDef *heth) in HAL_ETH_GetTxBuffersNumber() argument
2922 uint32_t ch = heth->TxOpCH; in HAL_ETH_GetTxBuffersNumber()
2924 return heth->TxDescList[ch].BuffersInUse; in HAL_ETH_GetTxBuffersNumber()
2938 static void ETH_SetMACConfig(ETH_HandleTypeDef *heth, const ETH_MACConfigTypeDef *macconf) in ETH_SetMACConfig() argument
2967 MODIFY_REG(heth->Instance->MACCR, ETH_MACCR_MASK, macregval); in ETH_SetMACConfig()
2978 MODIFY_REG(heth->Instance->MACECR, ETH_MACECR_MASK, macregval); in ETH_SetMACConfig()
2985 MODIFY_REG(heth->Instance->MACWTR, ETH_MACWTR_MASK, macregval); in ETH_SetMACConfig()
2994 MODIFY_REG(heth->Instance->MACQ0TXFCR, ETH_MACQ0TXFCR_MASK, macregval); in ETH_SetMACConfig()
3001 MODIFY_REG(heth->Instance->MACRXFCR, ETH_MACRXFCR_MASK, macregval); in ETH_SetMACConfig()
3005 static void ETH_SetDMAConfig(ETH_HandleTypeDef *heth, const ETH_DMAConfigTypeDef *dmaconf) in ETH_SetDMAConfig() argument
3014 MODIFY_REG(heth->Instance->DMAMR, ETH_DMAMR_MASK, dmaregval); in ETH_SetDMAConfig()
3023 MODIFY_REG(heth->Instance->DMASBMR, ETH_DMASBMR_MASK, dmaregval); in ETH_SetDMAConfig()
3032 MODIFY_REG(heth->Instance->DMA_CH[ch].DMACCR, ETH_DMACxCR_MASK, dmaregval); in ETH_SetDMAConfig()
3039 MODIFY_REG(heth->Instance->DMA_CH[ch].DMACTXCR, in ETH_SetDMAConfig()
3046 …MODIFY_REG(heth->Instance->DMA_CH[ch].DMACRXCR, (ETH_DMACxRXCR_RXPBL_Msk | ETH_DMACxRXCR_RPF_Msk),… in ETH_SetDMAConfig()
3058 static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth) in ETH_MACDMAConfig() argument
3085 if (heth->Init.MediaInterface == HAL_ETH_RGMII_MODE) in ETH_MACDMAConfig()
3113 ETH_SetMACConfig(heth, &macDefaultConf); in ETH_MACDMAConfig()
3146 ETHEx_SetMTLConfig(heth, &mtlDefaultConf); in ETH_MACDMAConfig()
3171 ETH_SetDMAConfig(heth, &dmaDefaultConf); in ETH_MACDMAConfig()
3182 static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth) in ETH_DMATxDescListInit() argument
3193 dmatxdesc = heth->Init.TxDesc[ch] + i; in ETH_DMATxDescListInit()
3200 WRITE_REG(heth->TxDescList[ch].TxDesc[i], (uint32_t)dmatxdesc); in ETH_DMATxDescListInit()
3203 heth->TxDescList[ch].CurTxDesc = 0; in ETH_DMATxDescListInit()
3209 WRITE_REG(heth->Instance->DMA_CH[ch].DMACTXRLR, (ETH_TX_DESC_CNT - 1U)); in ETH_DMATxDescListInit()
3212 WRITE_REG(heth->Instance->DMA_CH[ch].DMACTXDLAR, (uint32_t) heth->Init.TxDesc[ch]); in ETH_DMATxDescListInit()
3215 WRITE_REG(heth->Instance->DMA_CH[ch].DMACTXDTPR, (uint32_t) heth->Init.TxDesc[ch]); in ETH_DMATxDescListInit()
3226 static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth) in ETH_DMARxDescListInit() argument
3237 dmarxdesc = heth->Init.RxDesc[ch] + i; in ETH_DMARxDescListInit()
3247 WRITE_REG(heth->RxDescList[ch].RxDesc[i], (uint32_t)dmarxdesc); in ETH_DMARxDescListInit()
3251 WRITE_REG(heth->RxDescList[ch].RxDescIdx, 0U); in ETH_DMARxDescListInit()
3252 WRITE_REG(heth->RxDescList[ch].RxDescCnt, 0U); in ETH_DMARxDescListInit()
3253 WRITE_REG(heth->RxDescList[ch].RxBuildDescIdx, 0U); in ETH_DMARxDescListInit()
3254 WRITE_REG(heth->RxDescList[ch].RxBuildDescCnt, 0U); in ETH_DMARxDescListInit()
3255 WRITE_REG(heth->RxDescList[ch].ItMode, 0U); in ETH_DMARxDescListInit()
3258 WRITE_REG(heth->Instance->DMA_CH[ch].DMACRXRLR, ((uint32_t)(ETH_RX_DESC_CNT - 1U))); in ETH_DMARxDescListInit()
3261 WRITE_REG(heth->Instance->DMA_CH[ch].DMACRXDLAR, (uint32_t) heth->Init.RxDesc[ch]); in ETH_DMARxDescListInit()
3264 WRITE_REG(heth->Instance->DMA_CH[ch].DMACRXDTPR, in ETH_DMARxDescListInit()
3265 ((uint32_t)(heth->Init.RxDesc[ch] + (uint32_t)(ETH_RX_DESC_CNT - 1U)))); in ETH_DMARxDescListInit()
3278 static uint32_t ETH_Prepare_Tx_Descriptors(ETH_HandleTypeDef *heth, const ETH_TxPacketConfigTypeDef… in ETH_Prepare_Tx_Descriptors() argument
3283 ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList[ch]; in ETH_Prepare_Tx_Descriptors()
3314 SET_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI); in ETH_Prepare_Tx_Descriptors()
3328 SET_BIT(heth->Instance->MACIVIR, ETH_MACIVIR_VLTI); in ETH_Prepare_Tx_Descriptors()
3330 SET_BIT(heth->Instance->MACVTCR, ETH_MACVTCR_EDVLP); in ETH_Prepare_Tx_Descriptors()
3569 static void ETH_InitCallbacksToDefault(ETH_HandleTypeDef *heth) in ETH_InitCallbacksToDefault() argument
3572 heth->TxCpltCallback = HAL_ETH_TxCpltCallback; /* Legacy weak TxCpltCallback */ in ETH_InitCallbacksToDefault()
3573 heth->RxCpltCallback = HAL_ETH_RxCpltCallback; /* Legacy weak RxCpltCallback */ in ETH_InitCallbacksToDefault()
3574 heth->ErrorCallback = HAL_ETH_ErrorCallback; /* Legacy weak ErrorCallback */ in ETH_InitCallbacksToDefault()
3575 heth->PMTCallback = HAL_ETH_PMTCallback; /* Legacy weak PMTCallback */ in ETH_InitCallbacksToDefault()
3576 heth->EEECallback = HAL_ETH_EEECallback; /* Legacy weak EEECallback */ in ETH_InitCallbacksToDefault()
3577 heth->WakeUpCallback = HAL_ETH_WakeUpCallback; /* Legacy weak WakeUpCallback */ in ETH_InitCallbacksToDefault()
3578 heth->rxLinkCallback = HAL_ETH_RxLinkCallback; /* Legacy weak RxLinkCallback */ in ETH_InitCallbacksToDefault()
3579 heth->txFreeCallback = HAL_ETH_TxFreeCallback; /* Legacy weak TxFreeCallback */ in ETH_InitCallbacksToDefault()
3581 heth->txPtpCallback = HAL_ETH_TxPtpCallback; /* Legacy weak TxPtpCallback */ in ETH_InitCallbacksToDefault()
3583 heth->rxAllocateCallback = HAL_ETH_RxAllocateCallback; /* Legacy weak RxAllocateCallback */ in ETH_InitCallbacksToDefault()