Lines Matching refs:dmatxdesc
951 ETH_DMADescTypeDef *dmatxdesc; in HAL_ETH_Transmit() local
974 dmatxdesc = (ETH_DMADescTypeDef *)(&heth->TxDescList[ch])-> in HAL_ETH_Transmit()
988 while ((dmatxdesc->DESC3 & ETH_DMATXNDESCWBF_OWN) != (uint32_t)RESET) in HAL_ETH_Transmit()
1005 dmatxdesc->DESC3 = (ETH_DMATXNDESCWBF_FD | ETH_DMATXNDESCWBF_LD); in HAL_ETH_Transmit()
1789 ETH_DMADescTypeDef *dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx]; in HAL_ETH_PTP_InsertTxTimestamp() local
1794 SET_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_TTSE); in HAL_ETH_PTP_InsertTxTimestamp()
1819 ETH_DMADescTypeDef *dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[idx]; in HAL_ETH_PTP_GetTxTimestamp() local
1824 timestamp->TimeStampLow = dmatxdesc->DESC0; in HAL_ETH_PTP_GetTxTimestamp()
1826 timestamp->TimeStampHigh = dmatxdesc->DESC1; in HAL_ETH_PTP_GetTxTimestamp()
3184 ETH_DMADescTypeDef *dmatxdesc; in ETH_DMATxDescListInit() local
3193 dmatxdesc = heth->Init.TxDesc[ch] + i; in ETH_DMATxDescListInit()
3195 WRITE_REG(dmatxdesc->DESC0, 0x0U); in ETH_DMATxDescListInit()
3196 WRITE_REG(dmatxdesc->DESC1, 0x0U); in ETH_DMATxDescListInit()
3197 WRITE_REG(dmatxdesc->DESC2, 0x0U); in ETH_DMATxDescListInit()
3198 WRITE_REG(dmatxdesc->DESC3, 0x0U); in ETH_DMATxDescListInit()
3200 WRITE_REG(heth->TxDescList[ch].TxDesc[i], (uint32_t)dmatxdesc); in ETH_DMATxDescListInit()
3290 ETH_DMADescTypeDef *dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx]; in ETH_Prepare_Tx_Descriptors() local
3297 if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN) in ETH_Prepare_Tx_Descriptors()
3310 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_VT, pTxConfig->VlanTag); in ETH_Prepare_Tx_Descriptors()
3312 SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_VLTV); in ETH_Prepare_Tx_Descriptors()
3320 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_IVT, (pTxConfig->InnerVlanTag << 16)); in ETH_Prepare_Tx_Descriptors()
3322 SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_IVLTV); in ETH_Prepare_Tx_Descriptors()
3325 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_IVTIR, pTxConfig->InnerVlanCtrl); in ETH_Prepare_Tx_Descriptors()
3338 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_MSS, pTxConfig->MaxSegmentSize); in ETH_Prepare_Tx_Descriptors()
3340 SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_TCMSSV); in ETH_Prepare_Tx_Descriptors()
3347 SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_CTXT); in ETH_Prepare_Tx_Descriptors()
3351 SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN); in ETH_Prepare_Tx_Descriptors()
3355 dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx]; in ETH_Prepare_Tx_Descriptors()
3360 if (READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN) in ETH_Prepare_Tx_Descriptors()
3362 dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[firstdescidx]; in ETH_Prepare_Tx_Descriptors()
3366 CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN); in ETH_Prepare_Tx_Descriptors()
3379 WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer); in ETH_Prepare_Tx_Descriptors()
3381 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len); in ETH_Prepare_Tx_Descriptors()
3387 WRITE_REG(dmatxdesc->DESC1, (uint32_t)txbuffer->buffer); in ETH_Prepare_Tx_Descriptors()
3389 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16)); in ETH_Prepare_Tx_Descriptors()
3393 WRITE_REG(dmatxdesc->DESC1, 0x0U); in ETH_Prepare_Tx_Descriptors()
3395 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U); in ETH_Prepare_Tx_Descriptors()
3401 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_THL, (pTxConfig->TCPHeaderLen << 19)); in ETH_Prepare_Tx_Descriptors()
3403 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen); in ETH_Prepare_Tx_Descriptors()
3405 SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE); in ETH_Prepare_Tx_Descriptors()
3409 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length); in ETH_Prepare_Tx_Descriptors()
3413 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl); in ETH_Prepare_Tx_Descriptors()
3418 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CPC, pTxConfig->CRCPadCtrl); in ETH_Prepare_Tx_Descriptors()
3425 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_VTIR, pTxConfig->VlanCtrl); in ETH_Prepare_Tx_Descriptors()
3429 SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD); in ETH_Prepare_Tx_Descriptors()
3431 CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT); in ETH_Prepare_Tx_Descriptors()
3435 SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN); in ETH_Prepare_Tx_Descriptors()
3440 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_SAIC, pTxConfig->SrcAddrCtrl); in ETH_Prepare_Tx_Descriptors()
3447 CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD); in ETH_Prepare_Tx_Descriptors()
3453 dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx]; in ETH_Prepare_Tx_Descriptors()
3456 CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD); in ETH_Prepare_Tx_Descriptors()
3459 if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN) == ETH_DMATXNDESCRF_OWN) in ETH_Prepare_Tx_Descriptors()
3463 dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx]; in ETH_Prepare_Tx_Descriptors()
3471 CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN); in ETH_Prepare_Tx_Descriptors()
3476 dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx]; in ETH_Prepare_Tx_Descriptors()
3488 WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer); in ETH_Prepare_Tx_Descriptors()
3490 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len); in ETH_Prepare_Tx_Descriptors()
3497 WRITE_REG(dmatxdesc->DESC1, (uint32_t)txbuffer->buffer); in ETH_Prepare_Tx_Descriptors()
3499 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16)); in ETH_Prepare_Tx_Descriptors()
3503 WRITE_REG(dmatxdesc->DESC1, 0x0U); in ETH_Prepare_Tx_Descriptors()
3505 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U); in ETH_Prepare_Tx_Descriptors()
3511 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen); in ETH_Prepare_Tx_Descriptors()
3513 SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE); in ETH_Prepare_Tx_Descriptors()
3518 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length); in ETH_Prepare_Tx_Descriptors()
3523 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl); in ETH_Prepare_Tx_Descriptors()
3532 SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN); in ETH_Prepare_Tx_Descriptors()
3534 CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT); in ETH_Prepare_Tx_Descriptors()
3540 SET_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC); in ETH_Prepare_Tx_Descriptors()
3545 CLEAR_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC); in ETH_Prepare_Tx_Descriptors()
3549 SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD); in ETH_Prepare_Tx_Descriptors()