Lines Matching refs:DESC3
923 CLEAR_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_IOC); in HAL_ETH_Stop_IT()
988 while ((dmatxdesc->DESC3 & ETH_DMATXNDESCWBF_OWN) != (uint32_t)RESET) in HAL_ETH_Transmit()
1005 dmatxdesc->DESC3 = (ETH_DMATXNDESCWBF_FD | ETH_DMATXNDESCWBF_LD); in HAL_ETH_Transmit()
1104 …while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccn… in HAL_ETH_ReadData()
1107 if ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET) || in HAL_ETH_ReadData()
1111 if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET) in HAL_ETH_ReadData()
1118 … bufflength = READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_PL) - heth->RxDescList[ch].RxDataLength; in HAL_ETH_ReadData()
1121 if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_LD) != (uint32_t)RESET) in HAL_ETH_ReadData()
1124 heth->RxDescList[ch].pRxLastRxDesc = dmarxdesc->DESC3; in HAL_ETH_ReadData()
1136 if (READ_BIT(dmarxdesc_next->DESC3, ETH_DMARXNDESCWBF_CTXT) != (uint32_t)RESET) in HAL_ETH_ReadData()
1249 … WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V | ETH_DMARXNDESCRF_IOC); in ETH_UpdateDescriptor()
1253 WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V); in ETH_UpdateDescriptor()
1484 if ((heth->Init.TxDesc[ch][idx].DESC3 & ETH_DMATXNDESCRF_OWN) == 0U) in HAL_ETH_ReleaseTxPacket()
1490 if ((heth->Init.TxDesc[ch][idx].DESC3 & ETH_DMATXNDESCWBF_LD) in HAL_ETH_ReleaseTxPacket()
1491 && (heth->Init.TxDesc[ch][idx].DESC3 & ETH_DMATXNDESCWBF_TTSS)) in HAL_ETH_ReleaseTxPacket()
3198 WRITE_REG(dmatxdesc->DESC3, 0x0U); in ETH_DMATxDescListInit()
3242 WRITE_REG(dmarxdesc->DESC3, 0x0U); in ETH_DMARxDescListInit()
3297 if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN) in ETH_Prepare_Tx_Descriptors()
3310 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_VT, pTxConfig->VlanTag); in ETH_Prepare_Tx_Descriptors()
3312 SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_VLTV); in ETH_Prepare_Tx_Descriptors()
3322 SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_IVLTV); in ETH_Prepare_Tx_Descriptors()
3325 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_IVTIR, pTxConfig->InnerVlanCtrl); in ETH_Prepare_Tx_Descriptors()
3340 SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_TCMSSV); in ETH_Prepare_Tx_Descriptors()
3347 SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_CTXT); in ETH_Prepare_Tx_Descriptors()
3351 SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN); in ETH_Prepare_Tx_Descriptors()
3360 if (READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN) in ETH_Prepare_Tx_Descriptors()
3366 CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN); in ETH_Prepare_Tx_Descriptors()
3401 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_THL, (pTxConfig->TCPHeaderLen << 19)); in ETH_Prepare_Tx_Descriptors()
3403 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen); in ETH_Prepare_Tx_Descriptors()
3405 SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE); in ETH_Prepare_Tx_Descriptors()
3409 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length); in ETH_Prepare_Tx_Descriptors()
3413 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl); in ETH_Prepare_Tx_Descriptors()
3418 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CPC, pTxConfig->CRCPadCtrl); in ETH_Prepare_Tx_Descriptors()
3429 SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD); in ETH_Prepare_Tx_Descriptors()
3431 CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT); in ETH_Prepare_Tx_Descriptors()
3435 SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN); in ETH_Prepare_Tx_Descriptors()
3440 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_SAIC, pTxConfig->SrcAddrCtrl); in ETH_Prepare_Tx_Descriptors()
3447 CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD); in ETH_Prepare_Tx_Descriptors()
3456 CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD); in ETH_Prepare_Tx_Descriptors()
3459 if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN) == ETH_DMATXNDESCRF_OWN) in ETH_Prepare_Tx_Descriptors()
3471 CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN); in ETH_Prepare_Tx_Descriptors()
3511 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen); in ETH_Prepare_Tx_Descriptors()
3513 SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE); in ETH_Prepare_Tx_Descriptors()
3518 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length); in ETH_Prepare_Tx_Descriptors()
3523 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl); in ETH_Prepare_Tx_Descriptors()
3532 SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN); in ETH_Prepare_Tx_Descriptors()
3534 CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT); in ETH_Prepare_Tx_Descriptors()
3549 SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD); in ETH_Prepare_Tx_Descriptors()