Lines Matching refs:DESC2
1488 CLEAR_BIT(heth->Init.TxDesc[ch][idx].DESC2, ETH_DMATXNDESCRF_TTSE); in HAL_ETH_ReleaseTxPacket()
1794 SET_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_TTSE); in HAL_ETH_PTP_InsertTxTimestamp()
3197 WRITE_REG(dmatxdesc->DESC2, 0x0U); in ETH_DMATxDescListInit()
3241 WRITE_REG(dmarxdesc->DESC2, 0x0U); in ETH_DMARxDescListInit()
3320 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_IVT, (pTxConfig->InnerVlanTag << 16)); in ETH_Prepare_Tx_Descriptors()
3338 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_MSS, pTxConfig->MaxSegmentSize); in ETH_Prepare_Tx_Descriptors()
3381 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len); in ETH_Prepare_Tx_Descriptors()
3389 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16)); in ETH_Prepare_Tx_Descriptors()
3395 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U); in ETH_Prepare_Tx_Descriptors()
3425 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_VTIR, pTxConfig->VlanCtrl); in ETH_Prepare_Tx_Descriptors()
3490 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len); in ETH_Prepare_Tx_Descriptors()
3499 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16)); in ETH_Prepare_Tx_Descriptors()
3505 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U); in ETH_Prepare_Tx_Descriptors()
3540 SET_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC); in ETH_Prepare_Tx_Descriptors()
3545 CLEAR_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC); in ETH_Prepare_Tx_Descriptors()