Lines Matching refs:PLL4CFGR3
6105 SET_BIT(RCC->PLL4CFGR3, RCC_PLL4CFGR3_PLL4MODSSRST); in LL_RCC_PLL4_AssertModulationSpreadSpectrumReset()
6116 CLEAR_BIT(RCC->PLL4CFGR3, RCC_PLL4CFGR3_PLL4MODSSRST); in LL_RCC_PLL4_ReleaseModulationSpreadSpectrumReset()
6127 SET_BIT(RCC->PLL4CFGR3, RCC_PLL4CFGR3_PLL4DACEN); in LL_RCC_PLL4_EnableDAC()
6138 CLEAR_BIT(RCC->PLL4CFGR3, RCC_PLL4CFGR3_PLL4DACEN); in LL_RCC_PLL4_DisableDAC()
6148 …return ((READ_BIT(RCC->PLL4CFGR3, RCC_PLL4CFGR3_PLL4DACEN) == RCC_PLL4CFGR3_PLL4DACEN) ? 1UL : 0UL… in LL_RCC_PLL4_IsEnabledDAC()
6159 CLEAR_BIT(RCC->PLL4CFGR3, RCC_PLL4CFGR3_PLL4MODSSDIS); in LL_RCC_PLL4_EnableModulationSpreadSpectrum()
6170 SET_BIT(RCC->PLL4CFGR3, RCC_PLL4CFGR3_PLL4MODSSDIS); in LL_RCC_PLL4_DisableModulationSpreadSpectrum()
6180 return ((READ_BIT(RCC->PLL4CFGR3, RCC_PLL4CFGR3_PLL4MODSSDIS) == 0UL) ? 1UL : 0UL); in LL_RCC_PLL4_IsEnabledModulationSpreadSpectrum()
6191 SET_BIT(RCC->PLL4CFGR3, RCC_PLL4CFGR3_PLL4MODDSEN); in LL_RCC_PLL4_EnableFractionalModulationSpreadSpectrum()
6202 CLEAR_BIT(RCC->PLL4CFGR3, RCC_PLL4CFGR3_PLL4MODDSEN); in LL_RCC_PLL4_DisableFractionalModulationSpreadSpectrum()
6212 …return ((READ_BIT(RCC->PLL4CFGR3, RCC_PLL4CFGR3_PLL4MODDSEN) == RCC_PLL4CFGR3_PLL4MODDSEN) ? 1UL :… in LL_RCC_PLL4_IsEnabledFractionalModulationSpreadSpectrum()
6267 MODIFY_REG(RCC->PLL4CFGR3, RCC_PLL4CFGR3_PLL4PDIV1, P1 << RCC_PLL4CFGR3_PLL4PDIV1_Pos); in LL_RCC_PLL4_SetP1()
6277 …return (uint32_t)(READ_BIT(RCC->PLL4CFGR3, RCC_PLL4CFGR3_PLL4PDIV1) >> RCC_PLL4CFGR3_PLL4PDIV1_Pos… in LL_RCC_PLL4_GetP1()
6288 MODIFY_REG(RCC->PLL4CFGR3, RCC_PLL4CFGR3_PLL4PDIV2, P2 << RCC_PLL4CFGR3_PLL4PDIV2_Pos); in LL_RCC_PLL4_SetP2()
6298 …return (uint32_t)(READ_BIT(RCC->PLL4CFGR3, RCC_PLL4CFGR3_PLL4PDIV2) >> RCC_PLL4CFGR3_PLL4PDIV2_Pos… in LL_RCC_PLL4_GetP2()
6309 SET_BIT(RCC->PLL4CFGR3, RCC_PLL4CFGR3_PLL4PDIVEN); in LL_RCC_PLL4P_Enable()
6320 CLEAR_BIT(RCC->PLL4CFGR3, RCC_PLL4CFGR3_PLL4PDIVEN); in LL_RCC_PLL4P_Disable()
6330 …return ((READ_BIT(RCC->PLL4CFGR3, RCC_PLL4CFGR3_PLL4PDIVEN) == RCC_PLL4CFGR3_PLL4PDIVEN) ? 1UL : 0… in LL_RCC_PLL4P_IsEnabled()