Lines Matching refs:PLL1CFGR3

5055   SET_BIT(RCC->PLL1CFGR3, RCC_PLL1CFGR3_PLL1MODSSRST);  in LL_RCC_PLL1_AssertModulationSpreadSpectrumReset()
5066 CLEAR_BIT(RCC->PLL1CFGR3, RCC_PLL1CFGR3_PLL1MODSSRST); in LL_RCC_PLL1_ReleaseModulationSpreadSpectrumReset()
5077 SET_BIT(RCC->PLL1CFGR3, RCC_PLL1CFGR3_PLL1DACEN); in LL_RCC_PLL1_EnableDAC()
5088 CLEAR_BIT(RCC->PLL1CFGR3, RCC_PLL1CFGR3_PLL1DACEN); in LL_RCC_PLL1_DisableDAC()
5098 …return ((READ_BIT(RCC->PLL1CFGR3, RCC_PLL1CFGR3_PLL1DACEN) == RCC_PLL1CFGR3_PLL1DACEN) ? 1UL : 0UL… in LL_RCC_PLL1_IsEnabledDAC()
5109 CLEAR_BIT(RCC->PLL1CFGR3, RCC_PLL1CFGR3_PLL1MODSSDIS); in LL_RCC_PLL1_EnableModulationSpreadSpectrum()
5120 SET_BIT(RCC->PLL1CFGR3, RCC_PLL1CFGR3_PLL1MODSSDIS); in LL_RCC_PLL1_DisableModulationSpreadSpectrum()
5130 return ((READ_BIT(RCC->PLL1CFGR3, RCC_PLL1CFGR3_PLL1MODSSDIS) == 0UL) ? 1UL : 0UL); in LL_RCC_PLL1_IsEnabledModulationSpreadSpectrum()
5141 SET_BIT(RCC->PLL1CFGR3, RCC_PLL1CFGR3_PLL1MODDSEN); in LL_RCC_PLL1_EnableFractionalModulationSpreadSpectrum()
5152 CLEAR_BIT(RCC->PLL1CFGR3, RCC_PLL1CFGR3_PLL1MODDSEN); in LL_RCC_PLL1_DisableFractionalModulationSpreadSpectrum()
5162 …return ((READ_BIT(RCC->PLL1CFGR3, RCC_PLL1CFGR3_PLL1MODDSEN) == RCC_PLL1CFGR3_PLL1MODDSEN) ? 1UL :… in LL_RCC_PLL1_IsEnabledFractionalModulationSpreadSpectrum()
5217 MODIFY_REG(RCC->PLL1CFGR3, RCC_PLL1CFGR3_PLL1PDIV1, P1 << RCC_PLL1CFGR3_PLL1PDIV1_Pos); in LL_RCC_PLL1_SetP1()
5227 …return (uint32_t)(READ_BIT(RCC->PLL1CFGR3, RCC_PLL1CFGR3_PLL1PDIV1) >> RCC_PLL1CFGR3_PLL1PDIV1_Pos… in LL_RCC_PLL1_GetP1()
5238 MODIFY_REG(RCC->PLL1CFGR3, RCC_PLL1CFGR3_PLL1PDIV2, P2 << RCC_PLL1CFGR3_PLL1PDIV2_Pos); in LL_RCC_PLL1_SetP2()
5248 …return (uint32_t)(READ_BIT(RCC->PLL1CFGR3, RCC_PLL1CFGR3_PLL1PDIV2) >> RCC_PLL1CFGR3_PLL1PDIV2_Pos… in LL_RCC_PLL1_GetP2()
5259 SET_BIT(RCC->PLL1CFGR3, RCC_PLL1CFGR3_PLL1PDIVEN); in LL_RCC_PLL1P_Enable()
5270 CLEAR_BIT(RCC->PLL1CFGR3, RCC_PLL1CFGR3_PLL1PDIVEN); in LL_RCC_PLL1P_Disable()
5280 …return ((READ_BIT(RCC->PLL1CFGR3, RCC_PLL1CFGR3_PLL1PDIVEN) == RCC_PLL1CFGR3_PLL1PDIVEN) ? 1UL : 0… in LL_RCC_PLL1P_IsEnabled()