Lines Matching refs:HSECFGR
1634 SET_BIT(RCC->HSECFGR, RCC_HSECFGR_HSECSSON); in LL_RCC_HSE_EnableCSS()
1644 return ((READ_BIT(RCC->HSECFGR, RCC_HSECFGR_HSECSSD) != 0UL) ? 1UL : 0UL); in LL_RCC_HSE_IsFailureDetected()
1656 SET_BIT(RCC->HSECFGR, RCC_HSECFGR_HSECSSBYP); in LL_RCC_HSE_EnableCSSBypass()
1666 CLEAR_BIT(RCC->HSECFGR, RCC_HSECFGR_HSECSSBYP); in LL_RCC_HSE_DisableCSSBypass()
1679 MODIFY_REG(RCC->HSECFGR, RCC_HSECFGR_HSECSSBPRE, Divider); in LL_RCC_HSE_SetCSSBypassDivider()
1691 return (READ_BIT(RCC->HSECFGR, RCC_HSECFGR_HSECSSBPRE)); in LL_RCC_HSE_GetCSSBypassDivider()
1701 SET_BIT(RCC->HSECFGR, RCC_HSECFGR_HSEBYP); in LL_RCC_HSE_EnableBypass()
1711 CLEAR_BIT(RCC->HSECFGR, RCC_HSECFGR_HSEBYP); in LL_RCC_HSE_DisableBypass()
1721 CLEAR_BIT(RCC->HSECFGR, RCC_HSECFGR_HSEEXT); in LL_RCC_HSE_SelectAnalogClock()
1731 SET_BIT(RCC->HSECFGR, RCC_HSECFGR_HSEEXT); in LL_RCC_HSE_SelectDigitalClock()
1741 CLEAR_BIT(RCC->HSECFGR, RCC_HSECFGR_HSEDIV2SEL); in LL_RCC_HSE_SelectHSEAsDiv2Clock()
1751 SET_BIT(RCC->HSECFGR, RCC_HSECFGR_HSEDIV2SEL); in LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock()
1761 return ((READ_BIT(RCC->HSECFGR, RCC_HSECFGR_HSEDIV2SEL) == RCC_HSECFGR_HSEDIV2SEL) ? 1UL : 0UL); in LL_RCC_HSE_IsSelectedHSEDiv2AsDiv2Clock()