Lines Matching refs:SVMCR2
754 SET_BIT(PWR->SVMCR2, PWR_SVMCR2_VDDIO5SV); in LL_PWR_EnableVddIO5()
764 CLEAR_BIT(PWR->SVMCR2, PWR_SVMCR2_VDDIO5SV); in LL_PWR_DisableVddIO5()
774 return ((READ_BIT(PWR->SVMCR2, PWR_SVMCR2_VDDIO5SV) == (PWR_SVMCR2_VDDIO5SV)) ? 1UL : 0UL); in LL_PWR_IsEnabledVddIO5()
934 SET_BIT(PWR->SVMCR2, PWR_SVMCR2_VDDIO5VMEN); in LL_PWR_EnableVddIO5Monitoring()
944 CLEAR_BIT(PWR->SVMCR2, PWR_SVMCR2_VDDIO5VMEN); in LL_PWR_DisableVddIO5Monitoring()
954 return ((READ_BIT(PWR->SVMCR2, PWR_SVMCR2_VDDIO5VMEN) == (PWR_SVMCR2_VDDIO5VMEN)) ? 1UL : 0UL); in LL_PWR_IsEnabledVddIO5Monitoring()
1142 MODIFY_REG(PWR->SVMCR2, PWR_SVMCR2_VDDIO5VRSEL, (VoltageRange << PWR_SVMCR2_VDDIO5VRSEL_Pos)); in LL_PWR_SetVddIO5VoltageRange()
1154 return (uint32_t)(READ_BIT(PWR->SVMCR2, PWR_SVMCR2_VDDIO5VRSEL) >> PWR_SVMCR2_VDDIO5VRSEL_Pos); in LL_PWR_GetVddIO5VoltageRange()
1194 SET_BIT(PWR->SVMCR2, PWR_SVMCR2_VDDIO5VRSTBY); in LL_PWR_EnableVddIO5VoltageRangeSB()
1204 CLEAR_BIT(PWR->SVMCR2, PWR_SVMCR2_VDDIO5VRSTBY); in LL_PWR_DisableVddIO5VoltageRangeSB()
1214 …return ((READ_BIT(PWR->SVMCR2, PWR_SVMCR2_VDDIO5VRSTBY) == (PWR_SVMCR2_VDDIO5VRSTBY)) ? 1UL : 0UL); in LL_PWR_IsEnabledVddIO5VoltageRangeSB()
1565 return ((READ_BIT(PWR->SVMCR2, PWR_SVMCR2_VDDIO5RDY) == (PWR_SVMCR2_VDDIO5RDY)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_VDDIO5RDY()