431   SET_BIT(I2Cx->CR1, I2C_CR1_PE);  in LL_I2C_Enable()
445   CLEAR_BIT(I2Cx->CR1, I2C_CR1_PE);  in LL_I2C_Disable()
456   return ((READ_BIT(I2Cx->CR1, I2C_CR1_PE) == (I2C_CR1_PE)) ? 1UL : 0UL);  in LL_I2C_IsEnabled()
477 …MODIFY_REG(I2Cx->CR1, I2C_CR1_ANFOFF | I2C_CR1_DNF, AnalogFilter | (DigitalFilter << I2C_CR1_DNF_P…  in LL_I2C_ConfigFilters()
494   MODIFY_REG(I2Cx->CR1, I2C_CR1_DNF, DigitalFilter << I2C_CR1_DNF_Pos);  in LL_I2C_SetDigitalFilter()
505   return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_DNF) >> I2C_CR1_DNF_Pos);  in LL_I2C_GetDigitalFilter()
517   CLEAR_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);  in LL_I2C_EnableAnalogFilter()
529   SET_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);  in LL_I2C_DisableAnalogFilter()
540   return ((READ_BIT(I2Cx->CR1, I2C_CR1_ANFOFF) != (I2C_CR1_ANFOFF)) ? 1UL : 0UL);  in LL_I2C_IsEnabledAnalogFilter()
551   SET_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);  in LL_I2C_EnableDMAReq_TX()
562   CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);  in LL_I2C_DisableDMAReq_TX()
573   return ((READ_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN) == (I2C_CR1_TXDMAEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledDMAReq_TX()
584   SET_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);  in LL_I2C_EnableDMAReq_RX()
595   CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);  in LL_I2C_DisableDMAReq_RX()
606   return ((READ_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN) == (I2C_CR1_RXDMAEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledDMAReq_RX()
646   CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);  in LL_I2C_EnableClockStretching()
658   SET_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);  in LL_I2C_DisableClockStretching()
669   return ((READ_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH) != (I2C_CR1_NOSTRETCH)) ? 1UL : 0UL);  in LL_I2C_IsEnabledClockStretching()
680   SET_BIT(I2Cx->CR1, I2C_CR1_SBC);  in LL_I2C_EnableSlaveByteControl()
691   CLEAR_BIT(I2Cx->CR1, I2C_CR1_SBC);  in LL_I2C_DisableSlaveByteControl()
702   return ((READ_BIT(I2Cx->CR1, I2C_CR1_SBC) == (I2C_CR1_SBC)) ? 1UL : 0UL);  in LL_I2C_IsEnabledSlaveByteControl()
716   SET_BIT(I2Cx->CR1, I2C_CR1_WUPEN);  in LL_I2C_EnableWakeUpFromStop()
729   CLEAR_BIT(I2Cx->CR1, I2C_CR1_WUPEN);  in LL_I2C_DisableWakeUpFromStop()
742   return ((READ_BIT(I2Cx->CR1, I2C_CR1_WUPEN) == (I2C_CR1_WUPEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledWakeUpFromStop()
754   SET_BIT(I2Cx->CR1, I2C_CR1_GCEN);  in LL_I2C_EnableGeneralCall()
766   CLEAR_BIT(I2Cx->CR1, I2C_CR1_GCEN);  in LL_I2C_DisableGeneralCall()
777   return ((READ_BIT(I2Cx->CR1, I2C_CR1_GCEN) == (I2C_CR1_GCEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledGeneralCall()
789   SET_BIT(I2Cx->CR1, I2C_CR1_FMP);  in LL_I2C_EnableFastModePlus()
801   CLEAR_BIT(I2Cx->CR1, I2C_CR1_FMP);  in LL_I2C_DisableFastModePlus()
812   return ((READ_BIT(I2Cx->CR1, I2C_CR1_FMP) == (I2C_CR1_FMP)) ? 1UL : 0UL);  in LL_I2C_IsEnabledFastModePlus()
823   SET_BIT(I2Cx->CR1, I2C_CR1_ADDRACLR);  in LL_I2C_EnableAutoClearFlag_ADDR()
834   CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRACLR);  in LL_I2C_DisableAutoClearFlag_ADDR()
845   return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRACLR) == (I2C_CR1_ADDRACLR)) ? 1UL : 0UL);  in LL_I2C_IsEnabledAutoClearFlag_ADDR()
856   SET_BIT(I2Cx->CR1, I2C_CR1_STOPFACLR);  in LL_I2C_EnableAutoClearFlag_STOP()
867   CLEAR_BIT(I2Cx->CR1, I2C_CR1_STOPFACLR);  in LL_I2C_DisableAutoClearFlag_STOP()
878   return ((READ_BIT(I2Cx->CR1, I2C_CR1_STOPFACLR) == (I2C_CR1_STOPFACLR)) ? 1UL : 0UL);  in LL_I2C_IsEnabledAutoClearFlag_STOP()
1099   MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN, PeripheralMode);  in LL_I2C_SetMode()
1117   return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN));  in LL_I2C_GetMode()
1135   SET_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);  in LL_I2C_EnableSMBusAlert()
1153   CLEAR_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);  in LL_I2C_DisableSMBusAlert()
1166   return ((READ_BIT(I2Cx->CR1, I2C_CR1_ALERTEN) == (I2C_CR1_ALERTEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledSMBusAlert()
1179   SET_BIT(I2Cx->CR1, I2C_CR1_PECEN);  in LL_I2C_EnableSMBusPEC()
1192   CLEAR_BIT(I2Cx->CR1, I2C_CR1_PECEN);  in LL_I2C_DisableSMBusPEC()
1205   return ((READ_BIT(I2Cx->CR1, I2C_CR1_PECEN) == (I2C_CR1_PECEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledSMBusPEC()
1390   SET_BIT(I2Cx->CR1, I2C_CR1_TXIE);  in LL_I2C_EnableIT_TX()
1401   CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXIE);  in LL_I2C_DisableIT_TX()
1412   return ((READ_BIT(I2Cx->CR1, I2C_CR1_TXIE) == (I2C_CR1_TXIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_TX()
1423   SET_BIT(I2Cx->CR1, I2C_CR1_RXIE);  in LL_I2C_EnableIT_RX()
1434   CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXIE);  in LL_I2C_DisableIT_RX()
1445   return ((READ_BIT(I2Cx->CR1, I2C_CR1_RXIE) == (I2C_CR1_RXIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_RX()
1456   SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);  in LL_I2C_EnableIT_ADDR()
1467   CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);  in LL_I2C_DisableIT_ADDR()
1478   return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_ADDR()
1489   SET_BIT(I2Cx->CR1, I2C_CR1_NACKIE);  in LL_I2C_EnableIT_NACK()
1500   CLEAR_BIT(I2Cx->CR1, I2C_CR1_NACKIE);  in LL_I2C_DisableIT_NACK()
1511   return ((READ_BIT(I2Cx->CR1, I2C_CR1_NACKIE) == (I2C_CR1_NACKIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_NACK()
1522   SET_BIT(I2Cx->CR1, I2C_CR1_STOPIE);  in LL_I2C_EnableIT_STOP()
1533   CLEAR_BIT(I2Cx->CR1, I2C_CR1_STOPIE);  in LL_I2C_DisableIT_STOP()
1544   return ((READ_BIT(I2Cx->CR1, I2C_CR1_STOPIE) == (I2C_CR1_STOPIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_STOP()
1558   SET_BIT(I2Cx->CR1, I2C_CR1_TCIE);  in LL_I2C_EnableIT_TC()
1572   CLEAR_BIT(I2Cx->CR1, I2C_CR1_TCIE);  in LL_I2C_DisableIT_TC()
1583   return ((READ_BIT(I2Cx->CR1, I2C_CR1_TCIE) == (I2C_CR1_TCIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_TC()
1603   SET_BIT(I2Cx->CR1, I2C_CR1_ERRIE);  in LL_I2C_EnableIT_ERR()
1623   CLEAR_BIT(I2Cx->CR1, I2C_CR1_ERRIE);  in LL_I2C_DisableIT_ERR()
1634   return ((READ_BIT(I2Cx->CR1, I2C_CR1_ERRIE) == (I2C_CR1_ERRIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_ERR()