642   uint32_t tmpcr2;  in LL_TIM_HALLSENSOR_Init()  local
657   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in LL_TIM_HALLSENSOR_Init()
669   tmpcr2 |= TIM_CR2_TI1S;  in LL_TIM_HALLSENSOR_Init()
672   tmpcr2 |= LL_TIM_TRGO_OC2REF;  in LL_TIM_HALLSENSOR_Init()
695   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in LL_TIM_HALLSENSOR_Init()
828   uint32_t tmpcr2;  in OC1Config()  local
845   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC1Config()
874     MODIFY_REG(tmpcr2, TIM_CR2_OIS1, TIM_OCInitStruct->OCIdleState);  in OC1Config()
877     MODIFY_REG(tmpcr2, TIM_CR2_OIS1N, TIM_OCInitStruct->OCNIdleState << 1U);  in OC1Config()
881   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC1Config()
907   uint32_t tmpcr2;  in OC2Config()  local
924   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC2Config()
953     MODIFY_REG(tmpcr2, TIM_CR2_OIS2, TIM_OCInitStruct->OCIdleState << 2U);  in OC2Config()
956     MODIFY_REG(tmpcr2, TIM_CR2_OIS2N, TIM_OCInitStruct->OCNIdleState << 3U);  in OC2Config()
960   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC2Config()
986   uint32_t tmpcr2;  in OC3Config()  local
1003   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC3Config()
1032     MODIFY_REG(tmpcr2, TIM_CR2_OIS3, TIM_OCInitStruct->OCIdleState << 4U);  in OC3Config()
1035     MODIFY_REG(tmpcr2, TIM_CR2_OIS3N, TIM_OCInitStruct->OCNIdleState << 5U);  in OC3Config()
1039   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC3Config()
1065   uint32_t tmpcr2;  in OC4Config()  local
1082   tmpcr2 =  LL_TIM_ReadReg(TIMx, CR2);  in OC4Config()
1105     MODIFY_REG(tmpcr2, TIM_CR2_OIS4, TIM_OCInitStruct->OCIdleState << 6U);  in OC4Config()
1109   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC4Config()