551   uint32_t tmpccmr1;  in LL_TIM_ENCODER_Init()  local
570   tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);  in LL_TIM_ENCODER_Init()
576   tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F  | TIM_CCMR1_IC1PSC);  in LL_TIM_ENCODER_Init()
577   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1ActiveInput >> 16U);  in LL_TIM_ENCODER_Init()
578   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Filter >> 16U);  in LL_TIM_ENCODER_Init()
579   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Prescaler >> 16U);  in LL_TIM_ENCODER_Init()
582   tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC2S | TIM_CCMR1_IC2F  | TIM_CCMR1_IC2PSC);  in LL_TIM_ENCODER_Init()
583   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2ActiveInput >> 8U);  in LL_TIM_ENCODER_Init()
584   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Filter >> 8U);  in LL_TIM_ENCODER_Init()
585   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Prescaler >> 8U);  in LL_TIM_ENCODER_Init()
597   LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);  in LL_TIM_ENCODER_Init()
643   uint32_t tmpccmr1;  in LL_TIM_HALLSENSOR_Init()  local
660   tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);  in LL_TIM_HALLSENSOR_Init()
680   tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F  | TIM_CCMR1_IC1PSC);  in LL_TIM_HALLSENSOR_Init()
681   tmpccmr1 |= (uint32_t)(LL_TIM_ACTIVEINPUT_TRC >> 16U);  in LL_TIM_HALLSENSOR_Init()
682   tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Filter >> 16U);  in LL_TIM_HALLSENSOR_Init()
683   tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Prescaler >> 16U);  in LL_TIM_HALLSENSOR_Init()
686   tmpccmr1 &= (uint32_t)~(TIM_CCMR1_OC2M | TIM_CCMR1_OC2FE  | TIM_CCMR1_OC2PE  | TIM_CCMR1_OC2CE);  in LL_TIM_HALLSENSOR_Init()
687   tmpccmr1 |= (uint32_t)(LL_TIM_OCMODE_PWM2 << 8U);  in LL_TIM_HALLSENSOR_Init()
701   LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);  in LL_TIM_HALLSENSOR_Init()
826   uint32_t tmpccmr1;  in OC1Config()  local
848   tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);  in OC1Config()
851   CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC1S);  in OC1Config()
854   MODIFY_REG(tmpccmr1, TIM_CCMR1_OC1M, TIM_OCInitStruct->OCMode);  in OC1Config()
884   LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);  in OC1Config()
905   uint32_t tmpccmr1;  in OC2Config()  local
927   tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);  in OC2Config()
930   CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC2S);  in OC2Config()
933   MODIFY_REG(tmpccmr1, TIM_CCMR1_OC2M, TIM_OCInitStruct->OCMode << 8U);  in OC2Config()
963   LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);  in OC2Config()