335 …_NORSRAM_Timing_Init(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank)  in FMC_NORSRAM_Timing_Init()  argument
341   assert_param(IS_FMC_ADDRESS_SETUP_TIME(Timing->AddressSetupTime));  in FMC_NORSRAM_Timing_Init()
342   assert_param(IS_FMC_ADDRESS_HOLD_TIME(Timing->AddressHoldTime));  in FMC_NORSRAM_Timing_Init()
343   assert_param(IS_FMC_DATAHOLD_DURATION(Timing->DataHoldTime));  in FMC_NORSRAM_Timing_Init()
344   assert_param(IS_FMC_DATASETUP_TIME(Timing->DataSetupTime));  in FMC_NORSRAM_Timing_Init()
345   assert_param(IS_FMC_TURNAROUND_TIME(Timing->BusTurnAroundDuration));  in FMC_NORSRAM_Timing_Init()
346   assert_param(IS_FMC_CLK_DIV(Timing->CLKDivision));  in FMC_NORSRAM_Timing_Init()
347   assert_param(IS_FMC_DATA_LATENCY(Timing->DataLatency));  in FMC_NORSRAM_Timing_Init()
348   assert_param(IS_FMC_ACCESS_MODE(Timing->AccessMode));  in FMC_NORSRAM_Timing_Init()
352 …MODIFY_REG(Device->BTCR[Bank + 1U], BTR_CLEAR_MASK, (Timing->AddressSetupTime                     …  in FMC_NORSRAM_Timing_Init()
353 …                                       ((Timing->AddressHoldTime)        << FMC_BTR1_ADDHLD_Pos)  |  in FMC_NORSRAM_Timing_Init()
354 …                                       ((Timing->DataSetupTime)          << FMC_BTR1_DATAST_Pos)  |  in FMC_NORSRAM_Timing_Init()
355 …                                       ((Timing->DataHoldTime)           << FMC_BTR1_DATAHLD_Pos) |  in FMC_NORSRAM_Timing_Init()
356 …                                       ((Timing->BusTurnAroundDuration)  << FMC_BTR1_BUSTURN_Pos) |  in FMC_NORSRAM_Timing_Init()
357 …                                       (((Timing->CLKDivision) - 1U)     << FMC_BTR1_CLKDIV_Pos)  |  in FMC_NORSRAM_Timing_Init()
358 …                                       (((Timing->DataLatency) - 2U)     << FMC_BTR1_DATLAT_Pos)  |  in FMC_NORSRAM_Timing_Init()
359                                                       (Timing->AccessMode)));  in FMC_NORSRAM_Timing_Init()
365     tmpr |= (uint32_t)(((Timing->CLKDivision) - 1U) << FMC_BTR1_CLKDIV_Pos);  in FMC_NORSRAM_Timing_Init()
384 …ng_Init(FMC_NORSRAM_EXTENDED_TypeDef *Device, FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, ui…  in FMC_NORSRAM_Extended_Timing_Init()  argument
394     assert_param(IS_FMC_ADDRESS_SETUP_TIME(Timing->AddressSetupTime));  in FMC_NORSRAM_Extended_Timing_Init()
395     assert_param(IS_FMC_ADDRESS_HOLD_TIME(Timing->AddressHoldTime));  in FMC_NORSRAM_Extended_Timing_Init()
396     assert_param(IS_FMC_DATASETUP_TIME(Timing->DataSetupTime));  in FMC_NORSRAM_Extended_Timing_Init()
397     assert_param(IS_FMC_DATAHOLD_DURATION(Timing->DataHoldTime));  in FMC_NORSRAM_Extended_Timing_Init()
399     assert_param(IS_FMC_TURNAROUND_TIME(Timing->BusTurnAroundDuration));  in FMC_NORSRAM_Extended_Timing_Init()
401     assert_param(IS_FMC_ACCESS_MODE(Timing->AccessMode));  in FMC_NORSRAM_Extended_Timing_Init()
405 …MODIFY_REG(Device->BWTR[Bank], BWTR_CLEAR_MASK, (Timing->AddressSetupTime                         …  in FMC_NORSRAM_Extended_Timing_Init()
406 …                                      ((Timing->AddressHoldTime)        << FMC_BWTR1_ADDHLD_Pos)  |  in FMC_NORSRAM_Extended_Timing_Init()
407 …                                      ((Timing->DataSetupTime)          << FMC_BWTR1_DATAST_Pos)  |  in FMC_NORSRAM_Extended_Timing_Init()
408 …                                      ((Timing->DataHoldTime)           << FMC_BWTR1_DATAHLD_Pos) |  in FMC_NORSRAM_Extended_Timing_Init()
410 …                                      Timing->AccessMode                                          |  in FMC_NORSRAM_Extended_Timing_Init()
411 …                                     ((Timing->BusTurnAroundDuration)  << FMC_BWTR1_BUSTURN_Pos)));  in FMC_NORSRAM_Extended_Timing_Init()
413                                                      Timing->AccessMode));  in FMC_NORSRAM_Extended_Timing_Init()