Lines Matching refs:DMAx

148 uint32_t LL_DMA_DeInit(DMA_TypeDef *DMAx, uint32_t Stream)  in LL_DMA_DeInit()  argument
154 assert_param(IS_LL_DMA_ALL_STREAM_INSTANCE(DMAx, Stream)); in LL_DMA_DeInit()
158 if (DMAx == DMA1) in LL_DMA_DeInit()
166 else if (DMAx == DMA2) in LL_DMA_DeInit()
182 LL_DMA_DisableStream(DMAx, Stream); in LL_DMA_DeInit()
185 tmp = (DMA_Stream_TypeDef *)(__LL_DMA_GET_STREAM_INSTANCE(DMAx, Stream)); in LL_DMA_DeInit()
206 LL_DMA_SetPeriphRequest(DMAx, Stream, LL_DMAMUX1_REQ_MEM2MEM); in LL_DMA_DeInit()
211 DMAx->LIFCR = 0x0000003FU; in LL_DMA_DeInit()
216 DMAx->LIFCR = 0x00000F40U; in LL_DMA_DeInit()
221 DMAx->LIFCR = 0x003F0000U; in LL_DMA_DeInit()
226 DMAx->LIFCR = 0x0F400000U; in LL_DMA_DeInit()
231 DMAx->HIFCR = 0x0000003FU; in LL_DMA_DeInit()
236 DMAx->HIFCR = 0x00000F40U; in LL_DMA_DeInit()
241 DMAx->HIFCR = 0x003F0000U; in LL_DMA_DeInit()
246 DMAx->HIFCR = 0x0F400000U; in LL_DMA_DeInit()
277 uint32_t LL_DMA_Init(DMA_TypeDef *DMAx, uint32_t Stream, LL_DMA_InitTypeDef *DMA_InitStruct) in LL_DMA_Init() argument
280 assert_param(IS_LL_DMA_ALL_STREAM_INSTANCE(DMAx, Stream)); in LL_DMA_Init()
290 if ((DMAx == DMA1) || (DMAx == DMA2)) in LL_DMA_Init()
305 if (IS_LL_DMA_ALL_STREAM_INSTANCE(DMAx, Stream)) in LL_DMA_Init()
319 LL_DMA_ConfigTransfer(DMAx, Stream, DMA_InitStruct->Direction | \ in LL_DMA_Init()
335 LL_DMA_ConfigFifo(DMAx, Stream, DMA_InitStruct->FIFOMode, DMA_InitStruct->FIFOThreshold); in LL_DMA_Init()
341 LL_DMA_SetMemoryBurstxfer(DMAx, Stream, DMA_InitStruct->MemBurst); in LL_DMA_Init()
347 LL_DMA_SetPeriphBurstxfer(DMAx, Stream, DMA_InitStruct->PeriphBurst); in LL_DMA_Init()
354 LL_DMA_SetMemoryAddress(DMAx, Stream, DMA_InitStruct->MemoryOrM2MDstAddress); in LL_DMA_Init()
360 LL_DMA_SetPeriphAddress(DMAx, Stream, DMA_InitStruct->PeriphOrM2MSrcAddress); in LL_DMA_Init()
366 LL_DMA_SetDataLength(DMAx, Stream, DMA_InitStruct->NbData); in LL_DMA_Init()
372 LL_DMA_SetPeriphRequest(DMAx, Stream, DMA_InitStruct->PeriphRequest); in LL_DMA_Init()