4760   uint32_t tmpcr2;  in HAL_TIM_ConfigTI1Input()  local
4767   tmpcr2 = htim->Instance->CR2;  in HAL_TIM_ConfigTI1Input()
4770   tmpcr2 &= ~TIM_CR2_TI1S;  in HAL_TIM_ConfigTI1Input()
4773   tmpcr2 |= TI1_Selection;  in HAL_TIM_ConfigTI1Input()
4776   htim->Instance->CR2 = tmpcr2;  in HAL_TIM_ConfigTI1Input()
5998   uint32_t tmpcr2;  in TIM_OC1_SetConfig()  local
6006   tmpcr2 =  TIMx->CR2;  in TIM_OC1_SetConfig()
6042     tmpcr2 &= ~TIM_CR2_OIS1;  in TIM_OC1_SetConfig()
6043     tmpcr2 &= ~TIM_CR2_OIS1N;  in TIM_OC1_SetConfig()
6045     tmpcr2 |= OC_Config->OCIdleState;  in TIM_OC1_SetConfig()
6047     tmpcr2 |= OC_Config->OCNIdleState;  in TIM_OC1_SetConfig()
6051   TIMx->CR2 = tmpcr2;  in TIM_OC1_SetConfig()
6073   uint32_t tmpcr2;  in TIM_OC2_SetConfig()  local
6081   tmpcr2 =  TIMx->CR2;  in TIM_OC2_SetConfig()
6118     tmpcr2 &= ~TIM_CR2_OIS2;  in TIM_OC2_SetConfig()
6119     tmpcr2 &= ~TIM_CR2_OIS2N;  in TIM_OC2_SetConfig()
6121     tmpcr2 |= (OC_Config->OCIdleState << 2U);  in TIM_OC2_SetConfig()
6123     tmpcr2 |= (OC_Config->OCNIdleState << 2U);  in TIM_OC2_SetConfig()
6127   TIMx->CR2 = tmpcr2;  in TIM_OC2_SetConfig()
6149   uint32_t tmpcr2;  in TIM_OC3_SetConfig()  local
6157   tmpcr2 =  TIMx->CR2;  in TIM_OC3_SetConfig()
6192     tmpcr2 &= ~TIM_CR2_OIS3;  in TIM_OC3_SetConfig()
6193     tmpcr2 &= ~TIM_CR2_OIS3N;  in TIM_OC3_SetConfig()
6195     tmpcr2 |= (OC_Config->OCIdleState << 4U);  in TIM_OC3_SetConfig()
6197     tmpcr2 |= (OC_Config->OCNIdleState << 4U);  in TIM_OC3_SetConfig()
6201   TIMx->CR2 = tmpcr2;  in TIM_OC3_SetConfig()
6223   uint32_t tmpcr2;  in TIM_OC4_SetConfig()  local
6231   tmpcr2 =  TIMx->CR2;  in TIM_OC4_SetConfig()
6254     tmpcr2 &= ~TIM_CR2_OIS4;  in TIM_OC4_SetConfig()
6257     tmpcr2 |= (OC_Config->OCIdleState << 6U);  in TIM_OC4_SetConfig()
6261   TIMx->CR2 = tmpcr2;  in TIM_OC4_SetConfig()
6284   uint32_t tmpcr2;  in TIM_OC5_SetConfig()  local
6292   tmpcr2 =  TIMx->CR2;  in TIM_OC5_SetConfig()
6309     tmpcr2 &= ~TIM_CR2_OIS5;  in TIM_OC5_SetConfig()
6311     tmpcr2 |= (OC_Config->OCIdleState << 8U);  in TIM_OC5_SetConfig()
6314   TIMx->CR2 = tmpcr2;  in TIM_OC5_SetConfig()
6337   uint32_t tmpcr2;  in TIM_OC6_SetConfig()  local
6345   tmpcr2 =  TIMx->CR2;  in TIM_OC6_SetConfig()
6362     tmpcr2 &= ~TIM_CR2_OIS6;  in TIM_OC6_SetConfig()
6364     tmpcr2 |= (OC_Config->OCIdleState << 10U);  in TIM_OC6_SetConfig()
6368   TIMx->CR2 = tmpcr2;  in TIM_OC6_SetConfig()