2611   uint32_t tmpccer;  in HAL_TIM_Encoder_Init()  local
2671   tmpccer = htim->Instance->CCER;  in HAL_TIM_Encoder_Init()
2687   tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P);  in HAL_TIM_Encoder_Init()
2688   tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP);  in HAL_TIM_Encoder_Init()
2689   tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U);  in HAL_TIM_Encoder_Init()
2698   htim->Instance->CCER = tmpccer;  in HAL_TIM_Encoder_Init()
5997   uint32_t tmpccer;  in TIM_OC1_SetConfig()  local
6004   tmpccer = TIMx->CCER;  in TIM_OC1_SetConfig()
6018   tmpccer &= ~TIM_CCER_CC1P;  in TIM_OC1_SetConfig()
6020   tmpccer |= OC_Config->OCPolarity;  in TIM_OC1_SetConfig()
6028     tmpccer &= ~TIM_CCER_CC1NP;  in TIM_OC1_SetConfig()
6030     tmpccer |= OC_Config->OCNPolarity;  in TIM_OC1_SetConfig()
6032     tmpccer &= ~TIM_CCER_CC1NE;  in TIM_OC1_SetConfig()
6060   TIMx->CCER = tmpccer;  in TIM_OC1_SetConfig()
6072   uint32_t tmpccer;  in TIM_OC2_SetConfig()  local
6079   tmpccer = TIMx->CCER;  in TIM_OC2_SetConfig()
6094   tmpccer &= ~TIM_CCER_CC2P;  in TIM_OC2_SetConfig()
6096   tmpccer |= (OC_Config->OCPolarity << 4U);  in TIM_OC2_SetConfig()
6103     tmpccer &= ~TIM_CCER_CC2NP;  in TIM_OC2_SetConfig()
6105     tmpccer |= (OC_Config->OCNPolarity << 4U);  in TIM_OC2_SetConfig()
6107     tmpccer &= ~TIM_CCER_CC2NE;  in TIM_OC2_SetConfig()
6136   TIMx->CCER = tmpccer;  in TIM_OC2_SetConfig()
6148   uint32_t tmpccer;  in TIM_OC3_SetConfig()  local
6155   tmpccer = TIMx->CCER;  in TIM_OC3_SetConfig()
6169   tmpccer &= ~TIM_CCER_CC3P;  in TIM_OC3_SetConfig()
6171   tmpccer |= (OC_Config->OCPolarity << 8U);  in TIM_OC3_SetConfig()
6178     tmpccer &= ~TIM_CCER_CC3NP;  in TIM_OC3_SetConfig()
6180     tmpccer |= (OC_Config->OCNPolarity << 8U);  in TIM_OC3_SetConfig()
6182     tmpccer &= ~TIM_CCER_CC3NE;  in TIM_OC3_SetConfig()
6210   TIMx->CCER = tmpccer;  in TIM_OC3_SetConfig()
6222   uint32_t tmpccer;  in TIM_OC4_SetConfig()  local
6229   tmpccer = TIMx->CCER;  in TIM_OC4_SetConfig()
6244   tmpccer &= ~TIM_CCER_CC4P;  in TIM_OC4_SetConfig()
6246   tmpccer |= (OC_Config->OCPolarity << 12U);  in TIM_OC4_SetConfig()
6270   TIMx->CCER = tmpccer;  in TIM_OC4_SetConfig()
6283   uint32_t tmpccer;  in TIM_OC5_SetConfig()  local
6290   tmpccer = TIMx->CCER;  in TIM_OC5_SetConfig()
6302   tmpccer &= ~TIM_CCER_CC5P;  in TIM_OC5_SetConfig()
6304   tmpccer |= (OC_Config->OCPolarity << 16U);  in TIM_OC5_SetConfig()
6323   TIMx->CCER = tmpccer;  in TIM_OC5_SetConfig()
6336   uint32_t tmpccer;  in TIM_OC6_SetConfig()  local
6343   tmpccer = TIMx->CCER;  in TIM_OC6_SetConfig()
6355   tmpccer &= (uint32_t)~TIM_CCER_CC6P;  in TIM_OC6_SetConfig()
6357   tmpccer |= (OC_Config->OCPolarity << 20U);  in TIM_OC6_SetConfig()
6377   TIMx->CCER = tmpccer;  in TIM_OC6_SetConfig()
6391   uint32_t tmpccer;  in TIM_SlaveTimer_SetConfig()  local
6439       tmpccer = htim->Instance->CCER;  in TIM_SlaveTimer_SetConfig()
6449       htim->Instance->CCER = tmpccer;  in TIM_SlaveTimer_SetConfig()
6521   uint32_t tmpccer;  in TIM_TI1_SetConfig()  local
6526   tmpccer = TIMx->CCER;  in TIM_TI1_SetConfig()
6544   tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);  in TIM_TI1_SetConfig()
6545   tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP));  in TIM_TI1_SetConfig()
6549   TIMx->CCER = tmpccer;  in TIM_TI1_SetConfig()
6567   uint32_t tmpccer;  in TIM_TI1_ConfigInputStage()  local
6570   tmpccer = TIMx->CCER;  in TIM_TI1_ConfigInputStage()
6579   tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);  in TIM_TI1_ConfigInputStage()
6580   tmpccer |= TIM_ICPolarity;  in TIM_TI1_ConfigInputStage()
6584   TIMx->CCER = tmpccer;  in TIM_TI1_ConfigInputStage()
6611   uint32_t tmpccer;  in TIM_TI2_SetConfig()  local
6616   tmpccer = TIMx->CCER;  in TIM_TI2_SetConfig()
6627   tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);  in TIM_TI2_SetConfig()
6628   tmpccer |= ((TIM_ICPolarity << 4U) & (TIM_CCER_CC2P | TIM_CCER_CC2NP));  in TIM_TI2_SetConfig()
6632   TIMx->CCER = tmpccer;  in TIM_TI2_SetConfig()
6650   uint32_t tmpccer;  in TIM_TI2_ConfigInputStage()  local
6655   tmpccer = TIMx->CCER;  in TIM_TI2_ConfigInputStage()
6662   tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);  in TIM_TI2_ConfigInputStage()
6663   tmpccer |= (TIM_ICPolarity << 4U);  in TIM_TI2_ConfigInputStage()
6667   TIMx->CCER = tmpccer;  in TIM_TI2_ConfigInputStage()
6694   uint32_t tmpccer;  in TIM_TI3_SetConfig()  local
6699   tmpccer = TIMx->CCER;  in TIM_TI3_SetConfig()
6710   tmpccer &= ~(TIM_CCER_CC3P | TIM_CCER_CC3NP);  in TIM_TI3_SetConfig()
6711   tmpccer |= ((TIM_ICPolarity << 8U) & (TIM_CCER_CC3P | TIM_CCER_CC3NP));  in TIM_TI3_SetConfig()
6715   TIMx->CCER = tmpccer;  in TIM_TI3_SetConfig()
6742   uint32_t tmpccer;  in TIM_TI4_SetConfig()  local
6747   tmpccer = TIMx->CCER;  in TIM_TI4_SetConfig()
6758   tmpccer &= ~(TIM_CCER_CC4P | TIM_CCER_CC4NP);  in TIM_TI4_SetConfig()
6759   tmpccer |= ((TIM_ICPolarity << 12U) & (TIM_CCER_CC4P | TIM_CCER_CC4NP));  in TIM_TI4_SetConfig()
6763   TIMx->CCER = tmpccer ;  in TIM_TI4_SetConfig()