Lines Matching refs:htim
226 static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
268 HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) in HAL_TIM_Base_Init() argument
271 if (htim == NULL) in HAL_TIM_Base_Init()
277 assert_param(IS_TIM_INSTANCE(htim->Instance)); in HAL_TIM_Base_Init()
278 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); in HAL_TIM_Base_Init()
279 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); in HAL_TIM_Base_Init()
280 assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); in HAL_TIM_Base_Init()
282 if (htim->State == HAL_TIM_STATE_RESET) in HAL_TIM_Base_Init()
285 htim->Lock = HAL_UNLOCKED; in HAL_TIM_Base_Init()
289 TIM_ResetCallback(htim); in HAL_TIM_Base_Init()
291 if (htim->Base_MspInitCallback == NULL) in HAL_TIM_Base_Init()
293 htim->Base_MspInitCallback = HAL_TIM_Base_MspInit; in HAL_TIM_Base_Init()
296 htim->Base_MspInitCallback(htim); in HAL_TIM_Base_Init()
299 HAL_TIM_Base_MspInit(htim); in HAL_TIM_Base_Init()
304 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_Base_Init()
307 TIM_Base_SetConfig(htim->Instance, &htim->Init); in HAL_TIM_Base_Init()
310 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_Base_Init()
320 HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim) in HAL_TIM_Base_DeInit() argument
323 assert_param(IS_TIM_INSTANCE(htim->Instance)); in HAL_TIM_Base_DeInit()
325 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_Base_DeInit()
328 __HAL_TIM_DISABLE(htim); in HAL_TIM_Base_DeInit()
331 if (htim->Base_MspDeInitCallback == NULL) in HAL_TIM_Base_DeInit()
333 htim->Base_MspDeInitCallback = HAL_TIM_Base_MspDeInit; in HAL_TIM_Base_DeInit()
336 htim->Base_MspDeInitCallback(htim); in HAL_TIM_Base_DeInit()
339 HAL_TIM_Base_MspDeInit(htim); in HAL_TIM_Base_DeInit()
343 htim->State = HAL_TIM_STATE_RESET; in HAL_TIM_Base_DeInit()
346 __HAL_UNLOCK(htim); in HAL_TIM_Base_DeInit()
356 __weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim) in HAL_TIM_Base_MspInit() argument
359 UNUSED(htim); in HAL_TIM_Base_MspInit()
371 __weak void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim) in HAL_TIM_Base_MspDeInit() argument
374 UNUSED(htim); in HAL_TIM_Base_MspDeInit()
387 HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim) in HAL_TIM_Base_Start() argument
392 assert_param(IS_TIM_INSTANCE(htim->Instance)); in HAL_TIM_Base_Start()
395 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_Base_Start()
398 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; in HAL_TIM_Base_Start()
401 __HAL_TIM_ENABLE(htim); in HAL_TIM_Base_Start()
405 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_Base_Start()
416 HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim) in HAL_TIM_Base_Stop() argument
419 assert_param(IS_TIM_INSTANCE(htim->Instance)); in HAL_TIM_Base_Stop()
422 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_Base_Stop()
425 __HAL_TIM_DISABLE(htim); in HAL_TIM_Base_Stop()
428 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_Base_Stop()
439 HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) in HAL_TIM_Base_Start_IT() argument
444 assert_param(IS_TIM_INSTANCE(htim->Instance)); in HAL_TIM_Base_Start_IT()
447 __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); in HAL_TIM_Base_Start_IT()
450 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; in HAL_TIM_Base_Start_IT()
453 __HAL_TIM_ENABLE(htim); in HAL_TIM_Base_Start_IT()
465 HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim) in HAL_TIM_Base_Stop_IT() argument
468 assert_param(IS_TIM_INSTANCE(htim->Instance)); in HAL_TIM_Base_Stop_IT()
470 __HAL_TIM_DISABLE_IT(htim, TIM_IT_UPDATE); in HAL_TIM_Base_Stop_IT()
473 __HAL_TIM_DISABLE(htim); in HAL_TIM_Base_Stop_IT()
486 HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length) in HAL_TIM_Base_Start_DMA() argument
491 assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); in HAL_TIM_Base_Start_DMA()
493 if (htim->State == HAL_TIM_STATE_BUSY) in HAL_TIM_Base_Start_DMA()
497 else if (htim->State == HAL_TIM_STATE_READY) in HAL_TIM_Base_Start_DMA()
505 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_Base_Start_DMA()
514 htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; in HAL_TIM_Base_Start_DMA()
515 htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; in HAL_TIM_Base_Start_DMA()
518 htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_Base_Start_DMA()
521 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)pData, (uint32_t)&htim->Instance->AR… in HAL_TIM_Base_Start_DMA()
527 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_UPDATE); in HAL_TIM_Base_Start_DMA()
530 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; in HAL_TIM_Base_Start_DMA()
533 __HAL_TIM_ENABLE(htim); in HAL_TIM_Base_Start_DMA()
545 HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim) in HAL_TIM_Base_Stop_DMA() argument
548 assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); in HAL_TIM_Base_Stop_DMA()
551 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_UPDATE); in HAL_TIM_Base_Stop_DMA()
553 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_UPDATE]); in HAL_TIM_Base_Stop_DMA()
556 __HAL_TIM_DISABLE(htim); in HAL_TIM_Base_Stop_DMA()
559 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_Base_Stop_DMA()
600 HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim) in HAL_TIM_OC_Init() argument
603 if (htim == NULL) in HAL_TIM_OC_Init()
609 assert_param(IS_TIM_INSTANCE(htim->Instance)); in HAL_TIM_OC_Init()
610 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); in HAL_TIM_OC_Init()
611 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); in HAL_TIM_OC_Init()
612 assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); in HAL_TIM_OC_Init()
614 if (htim->State == HAL_TIM_STATE_RESET) in HAL_TIM_OC_Init()
617 htim->Lock = HAL_UNLOCKED; in HAL_TIM_OC_Init()
621 TIM_ResetCallback(htim); in HAL_TIM_OC_Init()
623 if (htim->OC_MspInitCallback == NULL) in HAL_TIM_OC_Init()
625 htim->OC_MspInitCallback = HAL_TIM_OC_MspInit; in HAL_TIM_OC_Init()
628 htim->OC_MspInitCallback(htim); in HAL_TIM_OC_Init()
631 HAL_TIM_OC_MspInit(htim); in HAL_TIM_OC_Init()
636 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_OC_Init()
639 TIM_Base_SetConfig(htim->Instance, &htim->Init); in HAL_TIM_OC_Init()
642 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_OC_Init()
652 HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim) in HAL_TIM_OC_DeInit() argument
655 assert_param(IS_TIM_INSTANCE(htim->Instance)); in HAL_TIM_OC_DeInit()
657 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_OC_DeInit()
660 __HAL_TIM_DISABLE(htim); in HAL_TIM_OC_DeInit()
663 if (htim->OC_MspDeInitCallback == NULL) in HAL_TIM_OC_DeInit()
665 htim->OC_MspDeInitCallback = HAL_TIM_OC_MspDeInit; in HAL_TIM_OC_DeInit()
668 htim->OC_MspDeInitCallback(htim); in HAL_TIM_OC_DeInit()
671 HAL_TIM_OC_MspDeInit(htim); in HAL_TIM_OC_DeInit()
675 htim->State = HAL_TIM_STATE_RESET; in HAL_TIM_OC_DeInit()
678 __HAL_UNLOCK(htim); in HAL_TIM_OC_DeInit()
688 __weak void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim) in HAL_TIM_OC_MspInit() argument
691 UNUSED(htim); in HAL_TIM_OC_MspInit()
703 __weak void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim) in HAL_TIM_OC_MspDeInit() argument
706 UNUSED(htim); in HAL_TIM_OC_MspDeInit()
726 HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_OC_Start() argument
731 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); in HAL_TIM_OC_Start()
734 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); in HAL_TIM_OC_Start()
736 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) in HAL_TIM_OC_Start()
739 __HAL_TIM_MOE_ENABLE(htim); in HAL_TIM_OC_Start()
743 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; in HAL_TIM_OC_Start()
746 __HAL_TIM_ENABLE(htim); in HAL_TIM_OC_Start()
766 HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_OC_Stop() argument
769 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); in HAL_TIM_OC_Stop()
772 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); in HAL_TIM_OC_Stop()
774 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) in HAL_TIM_OC_Stop()
777 __HAL_TIM_MOE_DISABLE(htim); in HAL_TIM_OC_Stop()
781 __HAL_TIM_DISABLE(htim); in HAL_TIM_OC_Stop()
798 HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_OC_Start_IT() argument
803 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); in HAL_TIM_OC_Start_IT()
810 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); in HAL_TIM_OC_Start_IT()
817 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); in HAL_TIM_OC_Start_IT()
824 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); in HAL_TIM_OC_Start_IT()
831 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); in HAL_TIM_OC_Start_IT()
840 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); in HAL_TIM_OC_Start_IT()
842 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) in HAL_TIM_OC_Start_IT()
845 __HAL_TIM_MOE_ENABLE(htim); in HAL_TIM_OC_Start_IT()
849 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; in HAL_TIM_OC_Start_IT()
852 __HAL_TIM_ENABLE(htim); in HAL_TIM_OC_Start_IT()
870 HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_OC_Stop_IT() argument
873 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); in HAL_TIM_OC_Stop_IT()
880 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); in HAL_TIM_OC_Stop_IT()
887 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); in HAL_TIM_OC_Stop_IT()
894 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); in HAL_TIM_OC_Stop_IT()
901 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); in HAL_TIM_OC_Stop_IT()
910 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); in HAL_TIM_OC_Stop_IT()
912 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) in HAL_TIM_OC_Stop_IT()
915 __HAL_TIM_MOE_DISABLE(htim); in HAL_TIM_OC_Stop_IT()
919 __HAL_TIM_DISABLE(htim); in HAL_TIM_OC_Stop_IT()
938 HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, … in HAL_TIM_OC_Start_DMA() argument
943 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); in HAL_TIM_OC_Start_DMA()
945 if (htim->State == HAL_TIM_STATE_BUSY) in HAL_TIM_OC_Start_DMA()
949 else if (htim->State == HAL_TIM_STATE_READY) in HAL_TIM_OC_Start_DMA()
957 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_OC_Start_DMA()
970 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; in HAL_TIM_OC_Start_DMA()
971 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; in HAL_TIM_OC_Start_DMA()
974 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_OC_Start_DMA()
977 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,… in HAL_TIM_OC_Start_DMA()
983 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); in HAL_TIM_OC_Start_DMA()
990 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; in HAL_TIM_OC_Start_DMA()
991 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; in HAL_TIM_OC_Start_DMA()
994 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_OC_Start_DMA()
997 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,… in HAL_TIM_OC_Start_DMA()
1003 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); in HAL_TIM_OC_Start_DMA()
1010 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; in HAL_TIM_OC_Start_DMA()
1011 htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; in HAL_TIM_OC_Start_DMA()
1014 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_OC_Start_DMA()
1017 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,… in HAL_TIM_OC_Start_DMA()
1022 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); in HAL_TIM_OC_Start_DMA()
1029 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; in HAL_TIM_OC_Start_DMA()
1030 htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; in HAL_TIM_OC_Start_DMA()
1033 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_OC_Start_DMA()
1036 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4,… in HAL_TIM_OC_Start_DMA()
1041 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); in HAL_TIM_OC_Start_DMA()
1050 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); in HAL_TIM_OC_Start_DMA()
1052 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) in HAL_TIM_OC_Start_DMA()
1055 __HAL_TIM_MOE_ENABLE(htim); in HAL_TIM_OC_Start_DMA()
1059 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; in HAL_TIM_OC_Start_DMA()
1062 __HAL_TIM_ENABLE(htim); in HAL_TIM_OC_Start_DMA()
1080 HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_OC_Stop_DMA() argument
1083 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); in HAL_TIM_OC_Stop_DMA()
1090 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); in HAL_TIM_OC_Stop_DMA()
1091 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); in HAL_TIM_OC_Stop_DMA()
1098 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); in HAL_TIM_OC_Stop_DMA()
1099 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); in HAL_TIM_OC_Stop_DMA()
1106 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); in HAL_TIM_OC_Stop_DMA()
1107 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); in HAL_TIM_OC_Stop_DMA()
1114 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); in HAL_TIM_OC_Stop_DMA()
1115 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); in HAL_TIM_OC_Stop_DMA()
1124 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); in HAL_TIM_OC_Stop_DMA()
1126 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) in HAL_TIM_OC_Stop_DMA()
1129 __HAL_TIM_MOE_DISABLE(htim); in HAL_TIM_OC_Stop_DMA()
1133 __HAL_TIM_DISABLE(htim); in HAL_TIM_OC_Stop_DMA()
1136 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_OC_Stop_DMA()
1177 HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) in HAL_TIM_PWM_Init() argument
1180 if (htim == NULL) in HAL_TIM_PWM_Init()
1186 assert_param(IS_TIM_INSTANCE(htim->Instance)); in HAL_TIM_PWM_Init()
1187 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); in HAL_TIM_PWM_Init()
1188 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); in HAL_TIM_PWM_Init()
1189 assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); in HAL_TIM_PWM_Init()
1191 if (htim->State == HAL_TIM_STATE_RESET) in HAL_TIM_PWM_Init()
1194 htim->Lock = HAL_UNLOCKED; in HAL_TIM_PWM_Init()
1198 TIM_ResetCallback(htim); in HAL_TIM_PWM_Init()
1200 if (htim->PWM_MspInitCallback == NULL) in HAL_TIM_PWM_Init()
1202 htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit; in HAL_TIM_PWM_Init()
1205 htim->PWM_MspInitCallback(htim); in HAL_TIM_PWM_Init()
1208 HAL_TIM_PWM_MspInit(htim); in HAL_TIM_PWM_Init()
1213 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_PWM_Init()
1216 TIM_Base_SetConfig(htim->Instance, &htim->Init); in HAL_TIM_PWM_Init()
1219 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_PWM_Init()
1229 HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim) in HAL_TIM_PWM_DeInit() argument
1232 assert_param(IS_TIM_INSTANCE(htim->Instance)); in HAL_TIM_PWM_DeInit()
1234 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_PWM_DeInit()
1237 __HAL_TIM_DISABLE(htim); in HAL_TIM_PWM_DeInit()
1240 if (htim->PWM_MspDeInitCallback == NULL) in HAL_TIM_PWM_DeInit()
1242 htim->PWM_MspDeInitCallback = HAL_TIM_PWM_MspDeInit; in HAL_TIM_PWM_DeInit()
1245 htim->PWM_MspDeInitCallback(htim); in HAL_TIM_PWM_DeInit()
1248 HAL_TIM_PWM_MspDeInit(htim); in HAL_TIM_PWM_DeInit()
1252 htim->State = HAL_TIM_STATE_RESET; in HAL_TIM_PWM_DeInit()
1255 __HAL_UNLOCK(htim); in HAL_TIM_PWM_DeInit()
1265 __weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) in HAL_TIM_PWM_MspInit() argument
1268 UNUSED(htim); in HAL_TIM_PWM_MspInit()
1280 __weak void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim) in HAL_TIM_PWM_MspDeInit() argument
1283 UNUSED(htim); in HAL_TIM_PWM_MspDeInit()
1303 HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_PWM_Start() argument
1308 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); in HAL_TIM_PWM_Start()
1311 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); in HAL_TIM_PWM_Start()
1313 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) in HAL_TIM_PWM_Start()
1316 __HAL_TIM_MOE_ENABLE(htim); in HAL_TIM_PWM_Start()
1320 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; in HAL_TIM_PWM_Start()
1323 __HAL_TIM_ENABLE(htim); in HAL_TIM_PWM_Start()
1343 HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_PWM_Stop() argument
1346 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); in HAL_TIM_PWM_Stop()
1349 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); in HAL_TIM_PWM_Stop()
1351 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) in HAL_TIM_PWM_Stop()
1354 __HAL_TIM_MOE_DISABLE(htim); in HAL_TIM_PWM_Stop()
1358 __HAL_TIM_DISABLE(htim); in HAL_TIM_PWM_Stop()
1361 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_PWM_Stop()
1378 HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_PWM_Start_IT() argument
1382 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); in HAL_TIM_PWM_Start_IT()
1389 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); in HAL_TIM_PWM_Start_IT()
1396 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); in HAL_TIM_PWM_Start_IT()
1403 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); in HAL_TIM_PWM_Start_IT()
1410 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); in HAL_TIM_PWM_Start_IT()
1419 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); in HAL_TIM_PWM_Start_IT()
1421 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) in HAL_TIM_PWM_Start_IT()
1424 __HAL_TIM_MOE_ENABLE(htim); in HAL_TIM_PWM_Start_IT()
1428 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; in HAL_TIM_PWM_Start_IT()
1431 __HAL_TIM_ENABLE(htim); in HAL_TIM_PWM_Start_IT()
1449 HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_PWM_Stop_IT() argument
1452 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); in HAL_TIM_PWM_Stop_IT()
1459 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); in HAL_TIM_PWM_Stop_IT()
1466 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); in HAL_TIM_PWM_Stop_IT()
1473 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); in HAL_TIM_PWM_Stop_IT()
1480 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); in HAL_TIM_PWM_Stop_IT()
1489 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); in HAL_TIM_PWM_Stop_IT()
1491 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) in HAL_TIM_PWM_Stop_IT()
1494 __HAL_TIM_MOE_DISABLE(htim); in HAL_TIM_PWM_Stop_IT()
1498 __HAL_TIM_DISABLE(htim); in HAL_TIM_PWM_Stop_IT()
1517 HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData,… in HAL_TIM_PWM_Start_DMA() argument
1522 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); in HAL_TIM_PWM_Start_DMA()
1524 if (htim->State == HAL_TIM_STATE_BUSY) in HAL_TIM_PWM_Start_DMA()
1528 else if (htim->State == HAL_TIM_STATE_READY) in HAL_TIM_PWM_Start_DMA()
1536 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_PWM_Start_DMA()
1549 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; in HAL_TIM_PWM_Start_DMA()
1550 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; in HAL_TIM_PWM_Start_DMA()
1553 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_PWM_Start_DMA()
1556 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,… in HAL_TIM_PWM_Start_DMA()
1562 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); in HAL_TIM_PWM_Start_DMA()
1569 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; in HAL_TIM_PWM_Start_DMA()
1570 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; in HAL_TIM_PWM_Start_DMA()
1573 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_PWM_Start_DMA()
1576 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,… in HAL_TIM_PWM_Start_DMA()
1581 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); in HAL_TIM_PWM_Start_DMA()
1588 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; in HAL_TIM_PWM_Start_DMA()
1589 htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; in HAL_TIM_PWM_Start_DMA()
1592 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_PWM_Start_DMA()
1595 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,… in HAL_TIM_PWM_Start_DMA()
1600 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); in HAL_TIM_PWM_Start_DMA()
1607 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; in HAL_TIM_PWM_Start_DMA()
1608 htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; in HAL_TIM_PWM_Start_DMA()
1611 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_PWM_Start_DMA()
1614 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4,… in HAL_TIM_PWM_Start_DMA()
1619 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); in HAL_TIM_PWM_Start_DMA()
1628 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); in HAL_TIM_PWM_Start_DMA()
1630 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) in HAL_TIM_PWM_Start_DMA()
1633 __HAL_TIM_MOE_ENABLE(htim); in HAL_TIM_PWM_Start_DMA()
1637 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; in HAL_TIM_PWM_Start_DMA()
1640 __HAL_TIM_ENABLE(htim); in HAL_TIM_PWM_Start_DMA()
1658 HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_PWM_Stop_DMA() argument
1661 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); in HAL_TIM_PWM_Stop_DMA()
1668 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); in HAL_TIM_PWM_Stop_DMA()
1669 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); in HAL_TIM_PWM_Stop_DMA()
1676 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); in HAL_TIM_PWM_Stop_DMA()
1677 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); in HAL_TIM_PWM_Stop_DMA()
1684 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); in HAL_TIM_PWM_Stop_DMA()
1685 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); in HAL_TIM_PWM_Stop_DMA()
1692 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); in HAL_TIM_PWM_Stop_DMA()
1693 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); in HAL_TIM_PWM_Stop_DMA()
1702 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); in HAL_TIM_PWM_Stop_DMA()
1704 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) in HAL_TIM_PWM_Stop_DMA()
1707 __HAL_TIM_MOE_DISABLE(htim); in HAL_TIM_PWM_Stop_DMA()
1711 __HAL_TIM_DISABLE(htim); in HAL_TIM_PWM_Stop_DMA()
1714 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_PWM_Stop_DMA()
1755 HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim) in HAL_TIM_IC_Init() argument
1758 if (htim == NULL) in HAL_TIM_IC_Init()
1764 assert_param(IS_TIM_INSTANCE(htim->Instance)); in HAL_TIM_IC_Init()
1765 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); in HAL_TIM_IC_Init()
1766 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); in HAL_TIM_IC_Init()
1767 assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); in HAL_TIM_IC_Init()
1769 if (htim->State == HAL_TIM_STATE_RESET) in HAL_TIM_IC_Init()
1772 htim->Lock = HAL_UNLOCKED; in HAL_TIM_IC_Init()
1776 TIM_ResetCallback(htim); in HAL_TIM_IC_Init()
1778 if (htim->IC_MspInitCallback == NULL) in HAL_TIM_IC_Init()
1780 htim->IC_MspInitCallback = HAL_TIM_IC_MspInit; in HAL_TIM_IC_Init()
1783 htim->IC_MspInitCallback(htim); in HAL_TIM_IC_Init()
1786 HAL_TIM_IC_MspInit(htim); in HAL_TIM_IC_Init()
1791 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_IC_Init()
1794 TIM_Base_SetConfig(htim->Instance, &htim->Init); in HAL_TIM_IC_Init()
1797 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_IC_Init()
1807 HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim) in HAL_TIM_IC_DeInit() argument
1810 assert_param(IS_TIM_INSTANCE(htim->Instance)); in HAL_TIM_IC_DeInit()
1812 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_IC_DeInit()
1815 __HAL_TIM_DISABLE(htim); in HAL_TIM_IC_DeInit()
1818 if (htim->IC_MspDeInitCallback == NULL) in HAL_TIM_IC_DeInit()
1820 htim->IC_MspDeInitCallback = HAL_TIM_IC_MspDeInit; in HAL_TIM_IC_DeInit()
1823 htim->IC_MspDeInitCallback(htim); in HAL_TIM_IC_DeInit()
1826 HAL_TIM_IC_MspDeInit(htim); in HAL_TIM_IC_DeInit()
1830 htim->State = HAL_TIM_STATE_RESET; in HAL_TIM_IC_DeInit()
1833 __HAL_UNLOCK(htim); in HAL_TIM_IC_DeInit()
1843 __weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim) in HAL_TIM_IC_MspInit() argument
1846 UNUSED(htim); in HAL_TIM_IC_MspInit()
1858 __weak void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim) in HAL_TIM_IC_MspDeInit() argument
1861 UNUSED(htim); in HAL_TIM_IC_MspDeInit()
1879 HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_IC_Start() argument
1884 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); in HAL_TIM_IC_Start()
1887 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); in HAL_TIM_IC_Start()
1890 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; in HAL_TIM_IC_Start()
1893 __HAL_TIM_ENABLE(htim); in HAL_TIM_IC_Start()
1911 HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_IC_Stop() argument
1914 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); in HAL_TIM_IC_Stop()
1917 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); in HAL_TIM_IC_Stop()
1920 __HAL_TIM_DISABLE(htim); in HAL_TIM_IC_Stop()
1937 HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_IC_Start_IT() argument
1942 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); in HAL_TIM_IC_Start_IT()
1949 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); in HAL_TIM_IC_Start_IT()
1956 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); in HAL_TIM_IC_Start_IT()
1963 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); in HAL_TIM_IC_Start_IT()
1970 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); in HAL_TIM_IC_Start_IT()
1978 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); in HAL_TIM_IC_Start_IT()
1981 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; in HAL_TIM_IC_Start_IT()
1984 __HAL_TIM_ENABLE(htim); in HAL_TIM_IC_Start_IT()
2002 HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_IC_Stop_IT() argument
2005 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); in HAL_TIM_IC_Stop_IT()
2012 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); in HAL_TIM_IC_Stop_IT()
2019 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); in HAL_TIM_IC_Stop_IT()
2026 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); in HAL_TIM_IC_Stop_IT()
2033 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); in HAL_TIM_IC_Stop_IT()
2042 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); in HAL_TIM_IC_Stop_IT()
2045 __HAL_TIM_DISABLE(htim); in HAL_TIM_IC_Stop_IT()
2064 HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, … in HAL_TIM_IC_Start_DMA() argument
2069 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); in HAL_TIM_IC_Start_DMA()
2070 assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); in HAL_TIM_IC_Start_DMA()
2072 if (htim->State == HAL_TIM_STATE_BUSY) in HAL_TIM_IC_Start_DMA()
2076 else if (htim->State == HAL_TIM_STATE_READY) in HAL_TIM_IC_Start_DMA()
2084 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_IC_Start_DMA()
2097 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; in HAL_TIM_IC_Start_DMA()
2098 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; in HAL_TIM_IC_Start_DMA()
2101 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_IC_Start_DMA()
2104 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData,… in HAL_TIM_IC_Start_DMA()
2109 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); in HAL_TIM_IC_Start_DMA()
2116 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; in HAL_TIM_IC_Start_DMA()
2117 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; in HAL_TIM_IC_Start_DMA()
2120 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_IC_Start_DMA()
2123 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData,… in HAL_TIM_IC_Start_DMA()
2128 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); in HAL_TIM_IC_Start_DMA()
2135 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt; in HAL_TIM_IC_Start_DMA()
2136 htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; in HAL_TIM_IC_Start_DMA()
2139 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_IC_Start_DMA()
2142 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->CCR3, (uint32_t)pData,… in HAL_TIM_IC_Start_DMA()
2147 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); in HAL_TIM_IC_Start_DMA()
2154 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt; in HAL_TIM_IC_Start_DMA()
2155 htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; in HAL_TIM_IC_Start_DMA()
2158 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_IC_Start_DMA()
2161 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->CCR4, (uint32_t)pData,… in HAL_TIM_IC_Start_DMA()
2166 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); in HAL_TIM_IC_Start_DMA()
2175 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); in HAL_TIM_IC_Start_DMA()
2178 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; in HAL_TIM_IC_Start_DMA()
2181 __HAL_TIM_ENABLE(htim); in HAL_TIM_IC_Start_DMA()
2199 HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_IC_Stop_DMA() argument
2202 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); in HAL_TIM_IC_Stop_DMA()
2203 assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); in HAL_TIM_IC_Stop_DMA()
2210 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); in HAL_TIM_IC_Stop_DMA()
2211 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); in HAL_TIM_IC_Stop_DMA()
2218 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); in HAL_TIM_IC_Stop_DMA()
2219 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); in HAL_TIM_IC_Stop_DMA()
2226 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); in HAL_TIM_IC_Stop_DMA()
2227 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); in HAL_TIM_IC_Stop_DMA()
2234 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); in HAL_TIM_IC_Stop_DMA()
2235 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); in HAL_TIM_IC_Stop_DMA()
2244 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); in HAL_TIM_IC_Stop_DMA()
2247 __HAL_TIM_DISABLE(htim); in HAL_TIM_IC_Stop_DMA()
2250 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_IC_Stop_DMA()
2294 HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode) in HAL_TIM_OnePulse_Init() argument
2297 if (htim == NULL) in HAL_TIM_OnePulse_Init()
2303 assert_param(IS_TIM_INSTANCE(htim->Instance)); in HAL_TIM_OnePulse_Init()
2304 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); in HAL_TIM_OnePulse_Init()
2305 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); in HAL_TIM_OnePulse_Init()
2307 assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); in HAL_TIM_OnePulse_Init()
2309 if (htim->State == HAL_TIM_STATE_RESET) in HAL_TIM_OnePulse_Init()
2312 htim->Lock = HAL_UNLOCKED; in HAL_TIM_OnePulse_Init()
2316 TIM_ResetCallback(htim); in HAL_TIM_OnePulse_Init()
2318 if (htim->OnePulse_MspInitCallback == NULL) in HAL_TIM_OnePulse_Init()
2320 htim->OnePulse_MspInitCallback = HAL_TIM_OnePulse_MspInit; in HAL_TIM_OnePulse_Init()
2323 htim->OnePulse_MspInitCallback(htim); in HAL_TIM_OnePulse_Init()
2326 HAL_TIM_OnePulse_MspInit(htim); in HAL_TIM_OnePulse_Init()
2331 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_OnePulse_Init()
2334 TIM_Base_SetConfig(htim->Instance, &htim->Init); in HAL_TIM_OnePulse_Init()
2337 htim->Instance->CR1 &= ~TIM_CR1_OPM; in HAL_TIM_OnePulse_Init()
2340 htim->Instance->CR1 |= OnePulseMode; in HAL_TIM_OnePulse_Init()
2343 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_OnePulse_Init()
2353 HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim) in HAL_TIM_OnePulse_DeInit() argument
2356 assert_param(IS_TIM_INSTANCE(htim->Instance)); in HAL_TIM_OnePulse_DeInit()
2358 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_OnePulse_DeInit()
2361 __HAL_TIM_DISABLE(htim); in HAL_TIM_OnePulse_DeInit()
2364 if (htim->OnePulse_MspDeInitCallback == NULL) in HAL_TIM_OnePulse_DeInit()
2366 htim->OnePulse_MspDeInitCallback = HAL_TIM_OnePulse_MspDeInit; in HAL_TIM_OnePulse_DeInit()
2369 htim->OnePulse_MspDeInitCallback(htim); in HAL_TIM_OnePulse_DeInit()
2372 HAL_TIM_OnePulse_MspDeInit(htim); in HAL_TIM_OnePulse_DeInit()
2376 htim->State = HAL_TIM_STATE_RESET; in HAL_TIM_OnePulse_DeInit()
2379 __HAL_UNLOCK(htim); in HAL_TIM_OnePulse_DeInit()
2389 __weak void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim) in HAL_TIM_OnePulse_MspInit() argument
2392 UNUSED(htim); in HAL_TIM_OnePulse_MspInit()
2404 __weak void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim) in HAL_TIM_OnePulse_MspDeInit() argument
2407 UNUSED(htim); in HAL_TIM_OnePulse_MspDeInit()
2423 HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) in HAL_TIM_OnePulse_Start() argument
2437 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); in HAL_TIM_OnePulse_Start()
2438 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); in HAL_TIM_OnePulse_Start()
2440 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) in HAL_TIM_OnePulse_Start()
2443 __HAL_TIM_MOE_ENABLE(htim); in HAL_TIM_OnePulse_Start()
2459 HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) in HAL_TIM_OnePulse_Stop() argument
2470 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); in HAL_TIM_OnePulse_Stop()
2471 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); in HAL_TIM_OnePulse_Stop()
2473 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) in HAL_TIM_OnePulse_Stop()
2476 __HAL_TIM_MOE_DISABLE(htim); in HAL_TIM_OnePulse_Stop()
2480 __HAL_TIM_DISABLE(htim); in HAL_TIM_OnePulse_Stop()
2495 HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) in HAL_TIM_OnePulse_Start_IT() argument
2510 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); in HAL_TIM_OnePulse_Start_IT()
2513 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); in HAL_TIM_OnePulse_Start_IT()
2515 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); in HAL_TIM_OnePulse_Start_IT()
2516 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); in HAL_TIM_OnePulse_Start_IT()
2518 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) in HAL_TIM_OnePulse_Start_IT()
2521 __HAL_TIM_MOE_ENABLE(htim); in HAL_TIM_OnePulse_Start_IT()
2537 HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) in HAL_TIM_OnePulse_Stop_IT() argument
2543 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); in HAL_TIM_OnePulse_Stop_IT()
2546 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); in HAL_TIM_OnePulse_Stop_IT()
2553 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); in HAL_TIM_OnePulse_Stop_IT()
2554 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); in HAL_TIM_OnePulse_Stop_IT()
2556 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) in HAL_TIM_OnePulse_Stop_IT()
2559 __HAL_TIM_MOE_DISABLE(htim); in HAL_TIM_OnePulse_Stop_IT()
2563 __HAL_TIM_DISABLE(htim); in HAL_TIM_OnePulse_Stop_IT()
2607 HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef *sConfig) in HAL_TIM_Encoder_Init() argument
2614 if (htim == NULL) in HAL_TIM_Encoder_Init()
2620 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); in HAL_TIM_Encoder_Init()
2621 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); in HAL_TIM_Encoder_Init()
2622 assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); in HAL_TIM_Encoder_Init()
2623 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); in HAL_TIM_Encoder_Init()
2634 if (htim->State == HAL_TIM_STATE_RESET) in HAL_TIM_Encoder_Init()
2637 htim->Lock = HAL_UNLOCKED; in HAL_TIM_Encoder_Init()
2641 TIM_ResetCallback(htim); in HAL_TIM_Encoder_Init()
2643 if (htim->Encoder_MspInitCallback == NULL) in HAL_TIM_Encoder_Init()
2645 htim->Encoder_MspInitCallback = HAL_TIM_Encoder_MspInit; in HAL_TIM_Encoder_Init()
2648 htim->Encoder_MspInitCallback(htim); in HAL_TIM_Encoder_Init()
2651 HAL_TIM_Encoder_MspInit(htim); in HAL_TIM_Encoder_Init()
2656 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_Encoder_Init()
2659 htim->Instance->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_ECE); in HAL_TIM_Encoder_Init()
2662 TIM_Base_SetConfig(htim->Instance, &htim->Init); in HAL_TIM_Encoder_Init()
2665 tmpsmcr = htim->Instance->SMCR; in HAL_TIM_Encoder_Init()
2668 tmpccmr1 = htim->Instance->CCMR1; in HAL_TIM_Encoder_Init()
2671 tmpccer = htim->Instance->CCER; in HAL_TIM_Encoder_Init()
2692 htim->Instance->SMCR = tmpsmcr; in HAL_TIM_Encoder_Init()
2695 htim->Instance->CCMR1 = tmpccmr1; in HAL_TIM_Encoder_Init()
2698 htim->Instance->CCER = tmpccer; in HAL_TIM_Encoder_Init()
2701 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_Encoder_Init()
2712 HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim) in HAL_TIM_Encoder_DeInit() argument
2715 assert_param(IS_TIM_INSTANCE(htim->Instance)); in HAL_TIM_Encoder_DeInit()
2717 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_Encoder_DeInit()
2720 __HAL_TIM_DISABLE(htim); in HAL_TIM_Encoder_DeInit()
2723 if (htim->Encoder_MspDeInitCallback == NULL) in HAL_TIM_Encoder_DeInit()
2725 htim->Encoder_MspDeInitCallback = HAL_TIM_Encoder_MspDeInit; in HAL_TIM_Encoder_DeInit()
2728 htim->Encoder_MspDeInitCallback(htim); in HAL_TIM_Encoder_DeInit()
2731 HAL_TIM_Encoder_MspDeInit(htim); in HAL_TIM_Encoder_DeInit()
2735 htim->State = HAL_TIM_STATE_RESET; in HAL_TIM_Encoder_DeInit()
2738 __HAL_UNLOCK(htim); in HAL_TIM_Encoder_DeInit()
2748 __weak void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim) in HAL_TIM_Encoder_MspInit() argument
2751 UNUSED(htim); in HAL_TIM_Encoder_MspInit()
2763 __weak void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim) in HAL_TIM_Encoder_MspDeInit() argument
2766 UNUSED(htim); in HAL_TIM_Encoder_MspDeInit()
2783 HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_Encoder_Start() argument
2786 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); in HAL_TIM_Encoder_Start()
2793 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); in HAL_TIM_Encoder_Start()
2799 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); in HAL_TIM_Encoder_Start()
2805 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); in HAL_TIM_Encoder_Start()
2806 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); in HAL_TIM_Encoder_Start()
2811 __HAL_TIM_ENABLE(htim); in HAL_TIM_Encoder_Start()
2827 HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_Encoder_Stop() argument
2830 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); in HAL_TIM_Encoder_Stop()
2838 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); in HAL_TIM_Encoder_Stop()
2844 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); in HAL_TIM_Encoder_Stop()
2850 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); in HAL_TIM_Encoder_Stop()
2851 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); in HAL_TIM_Encoder_Stop()
2857 __HAL_TIM_DISABLE(htim); in HAL_TIM_Encoder_Stop()
2873 HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_Encoder_Start_IT() argument
2876 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); in HAL_TIM_Encoder_Start_IT()
2884 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); in HAL_TIM_Encoder_Start_IT()
2885 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); in HAL_TIM_Encoder_Start_IT()
2891 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); in HAL_TIM_Encoder_Start_IT()
2892 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); in HAL_TIM_Encoder_Start_IT()
2898 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); in HAL_TIM_Encoder_Start_IT()
2899 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); in HAL_TIM_Encoder_Start_IT()
2900 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); in HAL_TIM_Encoder_Start_IT()
2901 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); in HAL_TIM_Encoder_Start_IT()
2907 __HAL_TIM_ENABLE(htim); in HAL_TIM_Encoder_Start_IT()
2923 HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_Encoder_Stop_IT() argument
2926 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); in HAL_TIM_Encoder_Stop_IT()
2932 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); in HAL_TIM_Encoder_Stop_IT()
2935 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); in HAL_TIM_Encoder_Stop_IT()
2939 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); in HAL_TIM_Encoder_Stop_IT()
2942 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); in HAL_TIM_Encoder_Stop_IT()
2946 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); in HAL_TIM_Encoder_Stop_IT()
2947 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); in HAL_TIM_Encoder_Stop_IT()
2950 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); in HAL_TIM_Encoder_Stop_IT()
2951 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); in HAL_TIM_Encoder_Stop_IT()
2955 __HAL_TIM_DISABLE(htim); in HAL_TIM_Encoder_Stop_IT()
2958 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_Encoder_Stop_IT()
2977 HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pD… in HAL_TIM_Encoder_Start_DMA() argument
2981 assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); in HAL_TIM_Encoder_Start_DMA()
2983 if (htim->State == HAL_TIM_STATE_BUSY) in HAL_TIM_Encoder_Start_DMA()
2987 else if (htim->State == HAL_TIM_STATE_READY) in HAL_TIM_Encoder_Start_DMA()
2995 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_Encoder_Start_DMA()
3008 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; in HAL_TIM_Encoder_Start_DMA()
3009 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; in HAL_TIM_Encoder_Start_DMA()
3012 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_Encoder_Start_DMA()
3015 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1… in HAL_TIM_Encoder_Start_DMA()
3020 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); in HAL_TIM_Encoder_Start_DMA()
3023 __HAL_TIM_ENABLE(htim); in HAL_TIM_Encoder_Start_DMA()
3026 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); in HAL_TIM_Encoder_Start_DMA()
3033 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; in HAL_TIM_Encoder_Start_DMA()
3034 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; in HAL_TIM_Encoder_Start_DMA()
3037 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError; in HAL_TIM_Encoder_Start_DMA()
3039 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2… in HAL_TIM_Encoder_Start_DMA()
3044 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); in HAL_TIM_Encoder_Start_DMA()
3047 __HAL_TIM_ENABLE(htim); in HAL_TIM_Encoder_Start_DMA()
3050 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); in HAL_TIM_Encoder_Start_DMA()
3057 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; in HAL_TIM_Encoder_Start_DMA()
3058 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; in HAL_TIM_Encoder_Start_DMA()
3061 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_Encoder_Start_DMA()
3064 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1… in HAL_TIM_Encoder_Start_DMA()
3070 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; in HAL_TIM_Encoder_Start_DMA()
3071 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; in HAL_TIM_Encoder_Start_DMA()
3074 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_Encoder_Start_DMA()
3077 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2… in HAL_TIM_Encoder_Start_DMA()
3082 __HAL_TIM_ENABLE(htim); in HAL_TIM_Encoder_Start_DMA()
3085 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); in HAL_TIM_Encoder_Start_DMA()
3086 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); in HAL_TIM_Encoder_Start_DMA()
3089 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); in HAL_TIM_Encoder_Start_DMA()
3091 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); in HAL_TIM_Encoder_Start_DMA()
3112 HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_Encoder_Stop_DMA() argument
3115 assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); in HAL_TIM_Encoder_Stop_DMA()
3121 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); in HAL_TIM_Encoder_Stop_DMA()
3124 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); in HAL_TIM_Encoder_Stop_DMA()
3125 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); in HAL_TIM_Encoder_Stop_DMA()
3129 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); in HAL_TIM_Encoder_Stop_DMA()
3132 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); in HAL_TIM_Encoder_Stop_DMA()
3133 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); in HAL_TIM_Encoder_Stop_DMA()
3137 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); in HAL_TIM_Encoder_Stop_DMA()
3138 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); in HAL_TIM_Encoder_Stop_DMA()
3141 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); in HAL_TIM_Encoder_Stop_DMA()
3142 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); in HAL_TIM_Encoder_Stop_DMA()
3143 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); in HAL_TIM_Encoder_Stop_DMA()
3144 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); in HAL_TIM_Encoder_Stop_DMA()
3148 __HAL_TIM_DISABLE(htim); in HAL_TIM_Encoder_Stop_DMA()
3151 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_Encoder_Stop_DMA()
3178 void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) in HAL_TIM_IRQHandler() argument
3181 if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) in HAL_TIM_IRQHandler()
3183 if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) in HAL_TIM_IRQHandler()
3186 __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); in HAL_TIM_IRQHandler()
3187 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; in HAL_TIM_IRQHandler()
3190 if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) in HAL_TIM_IRQHandler()
3193 htim->IC_CaptureCallback(htim); in HAL_TIM_IRQHandler()
3195 HAL_TIM_IC_CaptureCallback(htim); in HAL_TIM_IRQHandler()
3202 htim->OC_DelayElapsedCallback(htim); in HAL_TIM_IRQHandler()
3203 htim->PWM_PulseFinishedCallback(htim); in HAL_TIM_IRQHandler()
3205 HAL_TIM_OC_DelayElapsedCallback(htim); in HAL_TIM_IRQHandler()
3206 HAL_TIM_PWM_PulseFinishedCallback(htim); in HAL_TIM_IRQHandler()
3209 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; in HAL_TIM_IRQHandler()
3214 if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) in HAL_TIM_IRQHandler()
3216 if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) in HAL_TIM_IRQHandler()
3218 __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); in HAL_TIM_IRQHandler()
3219 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; in HAL_TIM_IRQHandler()
3221 if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) in HAL_TIM_IRQHandler()
3224 htim->IC_CaptureCallback(htim); in HAL_TIM_IRQHandler()
3226 HAL_TIM_IC_CaptureCallback(htim); in HAL_TIM_IRQHandler()
3233 htim->OC_DelayElapsedCallback(htim); in HAL_TIM_IRQHandler()
3234 htim->PWM_PulseFinishedCallback(htim); in HAL_TIM_IRQHandler()
3236 HAL_TIM_OC_DelayElapsedCallback(htim); in HAL_TIM_IRQHandler()
3237 HAL_TIM_PWM_PulseFinishedCallback(htim); in HAL_TIM_IRQHandler()
3240 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; in HAL_TIM_IRQHandler()
3244 if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) in HAL_TIM_IRQHandler()
3246 if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) in HAL_TIM_IRQHandler()
3248 __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); in HAL_TIM_IRQHandler()
3249 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; in HAL_TIM_IRQHandler()
3251 if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) in HAL_TIM_IRQHandler()
3254 htim->IC_CaptureCallback(htim); in HAL_TIM_IRQHandler()
3256 HAL_TIM_IC_CaptureCallback(htim); in HAL_TIM_IRQHandler()
3263 htim->OC_DelayElapsedCallback(htim); in HAL_TIM_IRQHandler()
3264 htim->PWM_PulseFinishedCallback(htim); in HAL_TIM_IRQHandler()
3266 HAL_TIM_OC_DelayElapsedCallback(htim); in HAL_TIM_IRQHandler()
3267 HAL_TIM_PWM_PulseFinishedCallback(htim); in HAL_TIM_IRQHandler()
3270 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; in HAL_TIM_IRQHandler()
3274 if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) in HAL_TIM_IRQHandler()
3276 if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) in HAL_TIM_IRQHandler()
3278 __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); in HAL_TIM_IRQHandler()
3279 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; in HAL_TIM_IRQHandler()
3281 if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) in HAL_TIM_IRQHandler()
3284 htim->IC_CaptureCallback(htim); in HAL_TIM_IRQHandler()
3286 HAL_TIM_IC_CaptureCallback(htim); in HAL_TIM_IRQHandler()
3293 htim->OC_DelayElapsedCallback(htim); in HAL_TIM_IRQHandler()
3294 htim->PWM_PulseFinishedCallback(htim); in HAL_TIM_IRQHandler()
3296 HAL_TIM_OC_DelayElapsedCallback(htim); in HAL_TIM_IRQHandler()
3297 HAL_TIM_PWM_PulseFinishedCallback(htim); in HAL_TIM_IRQHandler()
3300 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; in HAL_TIM_IRQHandler()
3304 if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) in HAL_TIM_IRQHandler()
3306 if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) in HAL_TIM_IRQHandler()
3308 __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); in HAL_TIM_IRQHandler()
3310 htim->PeriodElapsedCallback(htim); in HAL_TIM_IRQHandler()
3312 HAL_TIM_PeriodElapsedCallback(htim); in HAL_TIM_IRQHandler()
3317 if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) in HAL_TIM_IRQHandler()
3319 if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) in HAL_TIM_IRQHandler()
3321 __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); in HAL_TIM_IRQHandler()
3323 htim->BreakCallback(htim); in HAL_TIM_IRQHandler()
3325 HAL_TIMEx_BreakCallback(htim); in HAL_TIM_IRQHandler()
3330 if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK2) != RESET) in HAL_TIM_IRQHandler()
3332 if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) in HAL_TIM_IRQHandler()
3334 __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2); in HAL_TIM_IRQHandler()
3336 htim->Break2Callback(htim); in HAL_TIM_IRQHandler()
3338 HAL_TIMEx_Break2Callback(htim); in HAL_TIM_IRQHandler()
3343 if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) in HAL_TIM_IRQHandler()
3345 if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) in HAL_TIM_IRQHandler()
3347 __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); in HAL_TIM_IRQHandler()
3349 htim->TriggerCallback(htim); in HAL_TIM_IRQHandler()
3351 HAL_TIM_TriggerCallback(htim); in HAL_TIM_IRQHandler()
3356 if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) in HAL_TIM_IRQHandler()
3358 if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET) in HAL_TIM_IRQHandler()
3360 __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); in HAL_TIM_IRQHandler()
3362 htim->CommutationCallback(htim); in HAL_TIM_IRQHandler()
3364 HAL_TIMEx_CommutCallback(htim); in HAL_TIM_IRQHandler()
3408 HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, in HAL_TIM_OC_ConfigChannel() argument
3418 __HAL_LOCK(htim); in HAL_TIM_OC_ConfigChannel()
3420 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_OC_ConfigChannel()
3427 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); in HAL_TIM_OC_ConfigChannel()
3430 TIM_OC1_SetConfig(htim->Instance, sConfig); in HAL_TIM_OC_ConfigChannel()
3437 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); in HAL_TIM_OC_ConfigChannel()
3440 TIM_OC2_SetConfig(htim->Instance, sConfig); in HAL_TIM_OC_ConfigChannel()
3447 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); in HAL_TIM_OC_ConfigChannel()
3450 TIM_OC3_SetConfig(htim->Instance, sConfig); in HAL_TIM_OC_ConfigChannel()
3457 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); in HAL_TIM_OC_ConfigChannel()
3460 TIM_OC4_SetConfig(htim->Instance, sConfig); in HAL_TIM_OC_ConfigChannel()
3467 assert_param(IS_TIM_CC5_INSTANCE(htim->Instance)); in HAL_TIM_OC_ConfigChannel()
3470 TIM_OC5_SetConfig(htim->Instance, sConfig); in HAL_TIM_OC_ConfigChannel()
3477 assert_param(IS_TIM_CC6_INSTANCE(htim->Instance)); in HAL_TIM_OC_ConfigChannel()
3480 TIM_OC6_SetConfig(htim->Instance, sConfig); in HAL_TIM_OC_ConfigChannel()
3488 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_OC_ConfigChannel()
3490 __HAL_UNLOCK(htim); in HAL_TIM_OC_ConfigChannel()
3508 HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef *sConfig, ui… in HAL_TIM_IC_ConfigChannel() argument
3511 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); in HAL_TIM_IC_ConfigChannel()
3518 __HAL_LOCK(htim); in HAL_TIM_IC_ConfigChannel()
3520 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_IC_ConfigChannel()
3525 TIM_TI1_SetConfig(htim->Instance, in HAL_TIM_IC_ConfigChannel()
3531 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; in HAL_TIM_IC_ConfigChannel()
3534 htim->Instance->CCMR1 |= sConfig->ICPrescaler; in HAL_TIM_IC_ConfigChannel()
3539 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); in HAL_TIM_IC_ConfigChannel()
3541 TIM_TI2_SetConfig(htim->Instance, in HAL_TIM_IC_ConfigChannel()
3547 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; in HAL_TIM_IC_ConfigChannel()
3550 htim->Instance->CCMR1 |= (sConfig->ICPrescaler << 8U); in HAL_TIM_IC_ConfigChannel()
3555 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); in HAL_TIM_IC_ConfigChannel()
3557 TIM_TI3_SetConfig(htim->Instance, in HAL_TIM_IC_ConfigChannel()
3563 htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC; in HAL_TIM_IC_ConfigChannel()
3566 htim->Instance->CCMR2 |= sConfig->ICPrescaler; in HAL_TIM_IC_ConfigChannel()
3571 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); in HAL_TIM_IC_ConfigChannel()
3573 TIM_TI4_SetConfig(htim->Instance, in HAL_TIM_IC_ConfigChannel()
3579 htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC; in HAL_TIM_IC_ConfigChannel()
3582 htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8U); in HAL_TIM_IC_ConfigChannel()
3585 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_IC_ConfigChannel()
3587 __HAL_UNLOCK(htim); in HAL_TIM_IC_ConfigChannel()
3607 HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, in HAL_TIM_PWM_ConfigChannel() argument
3618 __HAL_LOCK(htim); in HAL_TIM_PWM_ConfigChannel()
3620 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_PWM_ConfigChannel()
3627 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); in HAL_TIM_PWM_ConfigChannel()
3630 TIM_OC1_SetConfig(htim->Instance, sConfig); in HAL_TIM_PWM_ConfigChannel()
3633 htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; in HAL_TIM_PWM_ConfigChannel()
3636 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; in HAL_TIM_PWM_ConfigChannel()
3637 htim->Instance->CCMR1 |= sConfig->OCFastMode; in HAL_TIM_PWM_ConfigChannel()
3644 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); in HAL_TIM_PWM_ConfigChannel()
3647 TIM_OC2_SetConfig(htim->Instance, sConfig); in HAL_TIM_PWM_ConfigChannel()
3650 htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; in HAL_TIM_PWM_ConfigChannel()
3653 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; in HAL_TIM_PWM_ConfigChannel()
3654 htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; in HAL_TIM_PWM_ConfigChannel()
3661 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); in HAL_TIM_PWM_ConfigChannel()
3664 TIM_OC3_SetConfig(htim->Instance, sConfig); in HAL_TIM_PWM_ConfigChannel()
3667 htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; in HAL_TIM_PWM_ConfigChannel()
3670 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; in HAL_TIM_PWM_ConfigChannel()
3671 htim->Instance->CCMR2 |= sConfig->OCFastMode; in HAL_TIM_PWM_ConfigChannel()
3678 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); in HAL_TIM_PWM_ConfigChannel()
3681 TIM_OC4_SetConfig(htim->Instance, sConfig); in HAL_TIM_PWM_ConfigChannel()
3684 htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; in HAL_TIM_PWM_ConfigChannel()
3687 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; in HAL_TIM_PWM_ConfigChannel()
3688 htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; in HAL_TIM_PWM_ConfigChannel()
3695 assert_param(IS_TIM_CC5_INSTANCE(htim->Instance)); in HAL_TIM_PWM_ConfigChannel()
3698 TIM_OC5_SetConfig(htim->Instance, sConfig); in HAL_TIM_PWM_ConfigChannel()
3701 htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE; in HAL_TIM_PWM_ConfigChannel()
3704 htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE; in HAL_TIM_PWM_ConfigChannel()
3705 htim->Instance->CCMR3 |= sConfig->OCFastMode; in HAL_TIM_PWM_ConfigChannel()
3712 assert_param(IS_TIM_CC6_INSTANCE(htim->Instance)); in HAL_TIM_PWM_ConfigChannel()
3715 TIM_OC6_SetConfig(htim->Instance, sConfig); in HAL_TIM_PWM_ConfigChannel()
3718 htim->Instance->CCMR3 |= TIM_CCMR3_OC6PE; in HAL_TIM_PWM_ConfigChannel()
3721 htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6FE; in HAL_TIM_PWM_ConfigChannel()
3722 htim->Instance->CCMR3 |= sConfig->OCFastMode << 8U; in HAL_TIM_PWM_ConfigChannel()
3730 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_PWM_ConfigChannel()
3732 __HAL_UNLOCK(htim); in HAL_TIM_PWM_ConfigChannel()
3756 HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef… in HAL_TIM_OnePulse_ConfigChannel() argument
3768 __HAL_LOCK(htim); in HAL_TIM_OnePulse_ConfigChannel()
3770 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_OnePulse_ConfigChannel()
3784 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); in HAL_TIM_OnePulse_ConfigChannel()
3786 TIM_OC1_SetConfig(htim->Instance, &temp1); in HAL_TIM_OnePulse_ConfigChannel()
3791 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); in HAL_TIM_OnePulse_ConfigChannel()
3793 TIM_OC2_SetConfig(htim->Instance, &temp1); in HAL_TIM_OnePulse_ConfigChannel()
3804 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); in HAL_TIM_OnePulse_ConfigChannel()
3806 TIM_TI1_SetConfig(htim->Instance, sConfig->ICPolarity, in HAL_TIM_OnePulse_ConfigChannel()
3810 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; in HAL_TIM_OnePulse_ConfigChannel()
3813 htim->Instance->SMCR &= ~TIM_SMCR_TS; in HAL_TIM_OnePulse_ConfigChannel()
3814 htim->Instance->SMCR |= TIM_TS_TI1FP1; in HAL_TIM_OnePulse_ConfigChannel()
3817 htim->Instance->SMCR &= ~TIM_SMCR_SMS; in HAL_TIM_OnePulse_ConfigChannel()
3818 htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; in HAL_TIM_OnePulse_ConfigChannel()
3823 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); in HAL_TIM_OnePulse_ConfigChannel()
3825 TIM_TI2_SetConfig(htim->Instance, sConfig->ICPolarity, in HAL_TIM_OnePulse_ConfigChannel()
3829 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; in HAL_TIM_OnePulse_ConfigChannel()
3832 htim->Instance->SMCR &= ~TIM_SMCR_TS; in HAL_TIM_OnePulse_ConfigChannel()
3833 htim->Instance->SMCR |= TIM_TS_TI2FP2; in HAL_TIM_OnePulse_ConfigChannel()
3836 htim->Instance->SMCR &= ~TIM_SMCR_SMS; in HAL_TIM_OnePulse_ConfigChannel()
3837 htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; in HAL_TIM_OnePulse_ConfigChannel()
3845 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_OnePulse_ConfigChannel()
3847 __HAL_UNLOCK(htim); in HAL_TIM_OnePulse_ConfigChannel()
3901 HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, u… in HAL_TIM_DMABurst_WriteStart() argument
3905 assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance)); in HAL_TIM_DMABurst_WriteStart()
3910 if (htim->State == HAL_TIM_STATE_BUSY) in HAL_TIM_DMABurst_WriteStart()
3914 else if (htim->State == HAL_TIM_STATE_READY) in HAL_TIM_DMABurst_WriteStart()
3922 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_DMABurst_WriteStart()
3934 htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; in HAL_TIM_DMABurst_WriteStart()
3935 htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; in HAL_TIM_DMABurst_WriteStart()
3938 htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_DMABurst_WriteStart()
3941 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)BurstBuffer, (uint32_t)&htim->Instan… in HAL_TIM_DMABurst_WriteStart()
3950 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; in HAL_TIM_DMABurst_WriteStart()
3951 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; in HAL_TIM_DMABurst_WriteStart()
3954 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_DMABurst_WriteStart()
3957 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)BurstBuffer, in HAL_TIM_DMABurst_WriteStart()
3958 (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8U) + 1U) != HAL_OK) in HAL_TIM_DMABurst_WriteStart()
3967 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; in HAL_TIM_DMABurst_WriteStart()
3968 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; in HAL_TIM_DMABurst_WriteStart()
3971 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_DMABurst_WriteStart()
3974 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)BurstBuffer, in HAL_TIM_DMABurst_WriteStart()
3975 (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8U) + 1U) != HAL_OK) in HAL_TIM_DMABurst_WriteStart()
3984 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; in HAL_TIM_DMABurst_WriteStart()
3985 htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; in HAL_TIM_DMABurst_WriteStart()
3988 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_DMABurst_WriteStart()
3991 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)BurstBuffer, in HAL_TIM_DMABurst_WriteStart()
3992 (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8U) + 1U) != HAL_OK) in HAL_TIM_DMABurst_WriteStart()
4001 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; in HAL_TIM_DMABurst_WriteStart()
4002 htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; in HAL_TIM_DMABurst_WriteStart()
4005 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_DMABurst_WriteStart()
4008 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)BurstBuffer, in HAL_TIM_DMABurst_WriteStart()
4009 (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8U) + 1U) != HAL_OK) in HAL_TIM_DMABurst_WriteStart()
4018 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; in HAL_TIM_DMABurst_WriteStart()
4019 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; in HAL_TIM_DMABurst_WriteStart()
4022 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_DMABurst_WriteStart()
4025 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)BurstBuffer, in HAL_TIM_DMABurst_WriteStart()
4026 (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8U) + 1U) != HAL_OK) in HAL_TIM_DMABurst_WriteStart()
4035 htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt; in HAL_TIM_DMABurst_WriteStart()
4036 htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; in HAL_TIM_DMABurst_WriteStart()
4039 htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_DMABurst_WriteStart()
4042 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)BurstBuffer, in HAL_TIM_DMABurst_WriteStart()
4043 (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8U) + 1U) != HAL_OK) in HAL_TIM_DMABurst_WriteStart()
4053 htim->Instance->DCR = (BurstBaseAddress | BurstLength); in HAL_TIM_DMABurst_WriteStart()
4056 __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc); in HAL_TIM_DMABurst_WriteStart()
4058 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_DMABurst_WriteStart()
4070 HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc) in HAL_TIM_DMABurst_WriteStop() argument
4081 status = HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_UPDATE]); in HAL_TIM_DMABurst_WriteStop()
4086 status = HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); in HAL_TIM_DMABurst_WriteStop()
4091 status = HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); in HAL_TIM_DMABurst_WriteStop()
4096 status = HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); in HAL_TIM_DMABurst_WriteStop()
4101 status = HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); in HAL_TIM_DMABurst_WriteStop()
4106 status = HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_COMMUTATION]); in HAL_TIM_DMABurst_WriteStop()
4111 status = HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_TRIGGER]); in HAL_TIM_DMABurst_WriteStop()
4121 __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc); in HAL_TIM_DMABurst_WriteStop()
4172 HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, in HAL_TIM_DMABurst_ReadStart() argument
4176 assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance)); in HAL_TIM_DMABurst_ReadStart()
4181 if (htim->State == HAL_TIM_STATE_BUSY) in HAL_TIM_DMABurst_ReadStart()
4185 else if (htim->State == HAL_TIM_STATE_READY) in HAL_TIM_DMABurst_ReadStart()
4193 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_DMABurst_ReadStart()
4205 htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; in HAL_TIM_DMABurst_ReadStart()
4206 htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; in HAL_TIM_DMABurst_ReadStart()
4209 htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_DMABurst_ReadStart()
4212 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)&htim->Instance->DMAR, (uint32_t)Bur… in HAL_TIM_DMABurst_ReadStart()
4221 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; in HAL_TIM_DMABurst_ReadStart()
4222 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; in HAL_TIM_DMABurst_ReadStart()
4225 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_DMABurst_ReadStart()
4228 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstB… in HAL_TIM_DMABurst_ReadStart()
4237 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; in HAL_TIM_DMABurst_ReadStart()
4238 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; in HAL_TIM_DMABurst_ReadStart()
4241 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_DMABurst_ReadStart()
4244 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstB… in HAL_TIM_DMABurst_ReadStart()
4253 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt; in HAL_TIM_DMABurst_ReadStart()
4254 htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; in HAL_TIM_DMABurst_ReadStart()
4257 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_DMABurst_ReadStart()
4260 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstB… in HAL_TIM_DMABurst_ReadStart()
4269 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt; in HAL_TIM_DMABurst_ReadStart()
4270 htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; in HAL_TIM_DMABurst_ReadStart()
4273 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_DMABurst_ReadStart()
4276 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstB… in HAL_TIM_DMABurst_ReadStart()
4285 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; in HAL_TIM_DMABurst_ReadStart()
4286 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; in HAL_TIM_DMABurst_ReadStart()
4289 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_DMABurst_ReadStart()
4292 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)&htim->Instance->DMAR, (uint32_… in HAL_TIM_DMABurst_ReadStart()
4301 htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt; in HAL_TIM_DMABurst_ReadStart()
4302 htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; in HAL_TIM_DMABurst_ReadStart()
4305 htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ; in HAL_TIM_DMABurst_ReadStart()
4308 …if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)&htim->Instance->DMAR, (uint32_t)Bu… in HAL_TIM_DMABurst_ReadStart()
4319 htim->Instance->DCR = (BurstBaseAddress | BurstLength); in HAL_TIM_DMABurst_ReadStart()
4322 __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc); in HAL_TIM_DMABurst_ReadStart()
4324 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_DMABurst_ReadStart()
4336 HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc) in HAL_TIM_DMABurst_ReadStop() argument
4347 status = HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_UPDATE]); in HAL_TIM_DMABurst_ReadStop()
4352 status = HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); in HAL_TIM_DMABurst_ReadStop()
4357 status = HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); in HAL_TIM_DMABurst_ReadStop()
4362 status = HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); in HAL_TIM_DMABurst_ReadStop()
4367 status = HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); in HAL_TIM_DMABurst_ReadStop()
4372 status = HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_COMMUTATION]); in HAL_TIM_DMABurst_ReadStop()
4377 status = HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_TRIGGER]); in HAL_TIM_DMABurst_ReadStop()
4387 __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc); in HAL_TIM_DMABurst_ReadStop()
4415 HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource) in HAL_TIM_GenerateEvent() argument
4418 assert_param(IS_TIM_INSTANCE(htim->Instance)); in HAL_TIM_GenerateEvent()
4422 __HAL_LOCK(htim); in HAL_TIM_GenerateEvent()
4425 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_GenerateEvent()
4428 htim->Instance->EGR = EventSource; in HAL_TIM_GenerateEvent()
4431 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_GenerateEvent()
4433 __HAL_UNLOCK(htim); in HAL_TIM_GenerateEvent()
4454 HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, in HAL_TIM_ConfigOCrefClear() argument
4459 assert_param(IS_TIM_OCXREF_CLEAR_INSTANCE(htim->Instance)); in HAL_TIM_ConfigOCrefClear()
4463 __HAL_LOCK(htim); in HAL_TIM_ConfigOCrefClear()
4465 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_ConfigOCrefClear()
4472 CLEAR_BIT(htim->Instance->SMCR, (TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP)); in HAL_TIM_ConfigOCrefClear()
4486 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_ConfigOCrefClear()
4487 __HAL_UNLOCK(htim); in HAL_TIM_ConfigOCrefClear()
4491 TIM_ETR_SetConfig(htim->Instance, in HAL_TIM_ConfigOCrefClear()
4509 SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE); in HAL_TIM_ConfigOCrefClear()
4514 CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE); in HAL_TIM_ConfigOCrefClear()
4523 SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC2CE); in HAL_TIM_ConfigOCrefClear()
4528 CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC2CE); in HAL_TIM_ConfigOCrefClear()
4537 SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC3CE); in HAL_TIM_ConfigOCrefClear()
4542 CLEAR_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC3CE); in HAL_TIM_ConfigOCrefClear()
4551 SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE); in HAL_TIM_ConfigOCrefClear()
4556 CLEAR_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE); in HAL_TIM_ConfigOCrefClear()
4565 SET_BIT(htim->Instance->CCMR3, TIM_CCMR3_OC5CE); in HAL_TIM_ConfigOCrefClear()
4570 CLEAR_BIT(htim->Instance->CCMR3, TIM_CCMR3_OC5CE); in HAL_TIM_ConfigOCrefClear()
4579 SET_BIT(htim->Instance->CCMR3, TIM_CCMR3_OC6CE); in HAL_TIM_ConfigOCrefClear()
4584 CLEAR_BIT(htim->Instance->CCMR3, TIM_CCMR3_OC6CE); in HAL_TIM_ConfigOCrefClear()
4592 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_ConfigOCrefClear()
4594 __HAL_UNLOCK(htim); in HAL_TIM_ConfigOCrefClear()
4606 HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClock… in HAL_TIM_ConfigClockSource() argument
4611 __HAL_LOCK(htim); in HAL_TIM_ConfigClockSource()
4613 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_ConfigClockSource()
4619 tmpsmcr = htim->Instance->SMCR; in HAL_TIM_ConfigClockSource()
4622 htim->Instance->SMCR = tmpsmcr; in HAL_TIM_ConfigClockSource()
4628 assert_param(IS_TIM_INSTANCE(htim->Instance)); in HAL_TIM_ConfigClockSource()
4635 assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance)); in HAL_TIM_ConfigClockSource()
4643 TIM_ETR_SetConfig(htim->Instance, in HAL_TIM_ConfigClockSource()
4649 tmpsmcr = htim->Instance->SMCR; in HAL_TIM_ConfigClockSource()
4652 htim->Instance->SMCR = tmpsmcr; in HAL_TIM_ConfigClockSource()
4659 assert_param(IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(htim->Instance)); in HAL_TIM_ConfigClockSource()
4667 TIM_ETR_SetConfig(htim->Instance, in HAL_TIM_ConfigClockSource()
4672 htim->Instance->SMCR |= TIM_SMCR_ECE; in HAL_TIM_ConfigClockSource()
4679 assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); in HAL_TIM_ConfigClockSource()
4685 TIM_TI1_ConfigInputStage(htim->Instance, in HAL_TIM_ConfigClockSource()
4688 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); in HAL_TIM_ConfigClockSource()
4695 assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); in HAL_TIM_ConfigClockSource()
4701 TIM_TI2_ConfigInputStage(htim->Instance, in HAL_TIM_ConfigClockSource()
4704 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); in HAL_TIM_ConfigClockSource()
4711 assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); in HAL_TIM_ConfigClockSource()
4717 TIM_TI1_ConfigInputStage(htim->Instance, in HAL_TIM_ConfigClockSource()
4720 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); in HAL_TIM_ConfigClockSource()
4730 assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); in HAL_TIM_ConfigClockSource()
4732 TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); in HAL_TIM_ConfigClockSource()
4739 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_ConfigClockSource()
4741 __HAL_UNLOCK(htim); in HAL_TIM_ConfigClockSource()
4758 HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection) in HAL_TIM_ConfigTI1Input() argument
4763 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); in HAL_TIM_ConfigTI1Input()
4767 tmpcr2 = htim->Instance->CR2; in HAL_TIM_ConfigTI1Input()
4776 htim->Instance->CR2 = tmpcr2; in HAL_TIM_ConfigTI1Input()
4790 HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlav… in HAL_TIM_SlaveConfigSynchro() argument
4793 assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance)); in HAL_TIM_SlaveConfigSynchro()
4797 __HAL_LOCK(htim); in HAL_TIM_SlaveConfigSynchro()
4799 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_SlaveConfigSynchro()
4801 if (TIM_SlaveTimer_SetConfig(htim, sSlaveConfig) != HAL_OK) in HAL_TIM_SlaveConfigSynchro()
4803 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_SlaveConfigSynchro()
4804 __HAL_UNLOCK(htim); in HAL_TIM_SlaveConfigSynchro()
4809 __HAL_TIM_DISABLE_IT(htim, TIM_IT_TRIGGER); in HAL_TIM_SlaveConfigSynchro()
4812 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER); in HAL_TIM_SlaveConfigSynchro()
4814 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_SlaveConfigSynchro()
4816 __HAL_UNLOCK(htim); in HAL_TIM_SlaveConfigSynchro()
4830 HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim, in HAL_TIM_SlaveConfigSynchro_IT() argument
4834 assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance)); in HAL_TIM_SlaveConfigSynchro_IT()
4838 __HAL_LOCK(htim); in HAL_TIM_SlaveConfigSynchro_IT()
4840 htim->State = HAL_TIM_STATE_BUSY; in HAL_TIM_SlaveConfigSynchro_IT()
4842 if (TIM_SlaveTimer_SetConfig(htim, sSlaveConfig) != HAL_OK) in HAL_TIM_SlaveConfigSynchro_IT()
4844 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_SlaveConfigSynchro_IT()
4845 __HAL_UNLOCK(htim); in HAL_TIM_SlaveConfigSynchro_IT()
4850 __HAL_TIM_ENABLE_IT(htim, TIM_IT_TRIGGER); in HAL_TIM_SlaveConfigSynchro_IT()
4853 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER); in HAL_TIM_SlaveConfigSynchro_IT()
4855 htim->State = HAL_TIM_STATE_READY; in HAL_TIM_SlaveConfigSynchro_IT()
4857 __HAL_UNLOCK(htim); in HAL_TIM_SlaveConfigSynchro_IT()
4873 uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel) in HAL_TIM_ReadCapturedValue() argument
4882 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); in HAL_TIM_ReadCapturedValue()
4885 tmpreg = htim->Instance->CCR1; in HAL_TIM_ReadCapturedValue()
4892 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); in HAL_TIM_ReadCapturedValue()
4895 tmpreg = htim->Instance->CCR2; in HAL_TIM_ReadCapturedValue()
4903 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); in HAL_TIM_ReadCapturedValue()
4906 tmpreg = htim->Instance->CCR3; in HAL_TIM_ReadCapturedValue()
4914 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); in HAL_TIM_ReadCapturedValue()
4917 tmpreg = htim->Instance->CCR4; in HAL_TIM_ReadCapturedValue()
4957 __weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) in HAL_TIM_PeriodElapsedCallback() argument
4960 UNUSED(htim); in HAL_TIM_PeriodElapsedCallback()
4972 __weak void HAL_TIM_PeriodElapsedHalfCpltCallback(TIM_HandleTypeDef *htim) in HAL_TIM_PeriodElapsedHalfCpltCallback() argument
4975 UNUSED(htim); in HAL_TIM_PeriodElapsedHalfCpltCallback()
4987 __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) in HAL_TIM_OC_DelayElapsedCallback() argument
4990 UNUSED(htim); in HAL_TIM_OC_DelayElapsedCallback()
5002 __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) in HAL_TIM_IC_CaptureCallback() argument
5005 UNUSED(htim); in HAL_TIM_IC_CaptureCallback()
5017 __weak void HAL_TIM_IC_CaptureHalfCpltCallback(TIM_HandleTypeDef *htim) in HAL_TIM_IC_CaptureHalfCpltCallback() argument
5020 UNUSED(htim); in HAL_TIM_IC_CaptureHalfCpltCallback()
5032 __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) in HAL_TIM_PWM_PulseFinishedCallback() argument
5035 UNUSED(htim); in HAL_TIM_PWM_PulseFinishedCallback()
5047 __weak void HAL_TIM_PWM_PulseFinishedHalfCpltCallback(TIM_HandleTypeDef *htim) in HAL_TIM_PWM_PulseFinishedHalfCpltCallback() argument
5050 UNUSED(htim); in HAL_TIM_PWM_PulseFinishedHalfCpltCallback()
5062 __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) in HAL_TIM_TriggerCallback() argument
5065 UNUSED(htim); in HAL_TIM_TriggerCallback()
5077 __weak void HAL_TIM_TriggerHalfCpltCallback(TIM_HandleTypeDef *htim) in HAL_TIM_TriggerHalfCpltCallback() argument
5080 UNUSED(htim); in HAL_TIM_TriggerHalfCpltCallback()
5092 __weak void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim) in HAL_TIM_ErrorCallback() argument
5095 UNUSED(htim); in HAL_TIM_ErrorCallback()
5139 HAL_StatusTypeDef HAL_TIM_RegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_CallbackIDTypeDef Callb… in HAL_TIM_RegisterCallback() argument
5149 __HAL_LOCK(htim); in HAL_TIM_RegisterCallback()
5151 if (htim->State == HAL_TIM_STATE_READY) in HAL_TIM_RegisterCallback()
5156 htim->Base_MspInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5160 htim->Base_MspDeInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5164 htim->IC_MspInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5168 htim->IC_MspDeInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5172 htim->OC_MspInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5176 htim->OC_MspDeInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5180 htim->PWM_MspInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5184 htim->PWM_MspDeInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5188 htim->OnePulse_MspInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5192 htim->OnePulse_MspDeInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5196 htim->Encoder_MspInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5200 htim->Encoder_MspDeInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5204 htim->HallSensor_MspInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5208 htim->HallSensor_MspDeInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5212 htim->PeriodElapsedCallback = pCallback; in HAL_TIM_RegisterCallback()
5216 htim->PeriodElapsedHalfCpltCallback = pCallback; in HAL_TIM_RegisterCallback()
5220 htim->TriggerCallback = pCallback; in HAL_TIM_RegisterCallback()
5224 htim->TriggerHalfCpltCallback = pCallback; in HAL_TIM_RegisterCallback()
5228 htim->IC_CaptureCallback = pCallback; in HAL_TIM_RegisterCallback()
5232 htim->IC_CaptureHalfCpltCallback = pCallback; in HAL_TIM_RegisterCallback()
5236 htim->OC_DelayElapsedCallback = pCallback; in HAL_TIM_RegisterCallback()
5240 htim->PWM_PulseFinishedCallback = pCallback; in HAL_TIM_RegisterCallback()
5244 htim->PWM_PulseFinishedHalfCpltCallback = pCallback; in HAL_TIM_RegisterCallback()
5248 htim->ErrorCallback = pCallback; in HAL_TIM_RegisterCallback()
5252 htim->CommutationCallback = pCallback; in HAL_TIM_RegisterCallback()
5256 htim->CommutationHalfCpltCallback = pCallback; in HAL_TIM_RegisterCallback()
5260 htim->BreakCallback = pCallback; in HAL_TIM_RegisterCallback()
5264 htim->Break2Callback = pCallback; in HAL_TIM_RegisterCallback()
5273 else if (htim->State == HAL_TIM_STATE_RESET) in HAL_TIM_RegisterCallback()
5278 htim->Base_MspInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5282 htim->Base_MspDeInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5286 htim->IC_MspInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5290 htim->IC_MspDeInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5294 htim->OC_MspInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5298 htim->OC_MspDeInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5302 htim->PWM_MspInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5306 htim->PWM_MspDeInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5310 htim->OnePulse_MspInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5314 htim->OnePulse_MspDeInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5318 htim->Encoder_MspInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5322 htim->Encoder_MspDeInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5326 htim->HallSensor_MspInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5330 htim->HallSensor_MspDeInitCallback = pCallback; in HAL_TIM_RegisterCallback()
5346 __HAL_UNLOCK(htim); in HAL_TIM_RegisterCallback()
5387 HAL_StatusTypeDef HAL_TIM_UnRegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_CallbackIDTypeDef Cal… in HAL_TIM_UnRegisterCallback() argument
5392 __HAL_LOCK(htim); in HAL_TIM_UnRegisterCallback()
5394 if (htim->State == HAL_TIM_STATE_READY) in HAL_TIM_UnRegisterCallback()
5399 …htim->Base_MspInitCallback = HAL_TIM_Base_MspInit; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5403 …htim->Base_MspDeInitCallback = HAL_TIM_Base_MspDeInit; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5407 …htim->IC_MspInitCallback = HAL_TIM_IC_MspInit; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5411 …htim->IC_MspDeInitCallback = HAL_TIM_IC_MspDeInit; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5415 …htim->OC_MspInitCallback = HAL_TIM_OC_MspInit; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5419 …htim->OC_MspDeInitCallback = HAL_TIM_OC_MspDeInit; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5423 …htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5427 …htim->PWM_MspDeInitCallback = HAL_TIM_PWM_MspDeInit; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5431 …htim->OnePulse_MspInitCallback = HAL_TIM_OnePulse_MspInit; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5435 …htim->OnePulse_MspDeInitCallback = HAL_TIM_OnePulse_MspDeInit; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5439 …htim->Encoder_MspInitCallback = HAL_TIM_Encoder_MspInit; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5443 …htim->Encoder_MspDeInitCallback = HAL_TIM_Encoder_MspDeInit; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5447 …htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5451 …htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5455 …htim->PeriodElapsedCallback = HAL_TIM_PeriodElapsedCallback; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5459 …htim->PeriodElapsedHalfCpltCallback = HAL_TIM_PeriodElapsedHalfCpltCallback; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5463 …htim->TriggerCallback = HAL_TIM_TriggerCallback; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5467 …htim->TriggerHalfCpltCallback = HAL_TIM_TriggerHalfCpltCallback; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5471 …htim->IC_CaptureCallback = HAL_TIM_IC_CaptureCallback; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5475 …htim->IC_CaptureHalfCpltCallback = HAL_TIM_IC_CaptureHalfCpltCallback; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5479 …htim->OC_DelayElapsedCallback = HAL_TIM_OC_DelayElapsedCallback; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5483 …htim->PWM_PulseFinishedCallback = HAL_TIM_PWM_PulseFinishedCallback; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5487 …htim->PWM_PulseFinishedHalfCpltCallback = HAL_TIM_PWM_PulseFinishedHalfCpltCallback; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5491 …htim->ErrorCallback = HAL_TIM_ErrorCallback; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5495 …htim->CommutationCallback = HAL_TIMEx_CommutCallback; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5499 …htim->CommutationHalfCpltCallback = HAL_TIMEx_CommutHalfCpltCallback; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5503 …htim->BreakCallback = HAL_TIMEx_BreakCallback; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5507 …htim->Break2Callback = HAL_TIMEx_Break2Callback; /* Legacy wea… in HAL_TIM_UnRegisterCallback()
5516 else if (htim->State == HAL_TIM_STATE_RESET) in HAL_TIM_UnRegisterCallback()
5521 …htim->Base_MspInitCallback = HAL_TIM_Base_MspInit; /* Legacy weak Base MspIni… in HAL_TIM_UnRegisterCallback()
5525 …htim->Base_MspDeInitCallback = HAL_TIM_Base_MspDeInit; /* Legacy weak Base Msp De… in HAL_TIM_UnRegisterCallback()
5529 …htim->IC_MspInitCallback = HAL_TIM_IC_MspInit; /* Legacy weak IC Msp Init… in HAL_TIM_UnRegisterCallback()
5533 …htim->IC_MspDeInitCallback = HAL_TIM_IC_MspDeInit; /* Legacy weak IC Msp DeIn… in HAL_TIM_UnRegisterCallback()
5537 …htim->OC_MspInitCallback = HAL_TIM_OC_MspInit; /* Legacy weak OC Msp Init… in HAL_TIM_UnRegisterCallback()
5541 …htim->OC_MspDeInitCallback = HAL_TIM_OC_MspDeInit; /* Legacy weak OC Msp DeIn… in HAL_TIM_UnRegisterCallback()
5545 …htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit; /* Legacy weak PWM Msp Ini… in HAL_TIM_UnRegisterCallback()
5549 …htim->PWM_MspDeInitCallback = HAL_TIM_PWM_MspDeInit; /* Legacy weak PWM Msp DeI… in HAL_TIM_UnRegisterCallback()
5553 …htim->OnePulse_MspInitCallback = HAL_TIM_OnePulse_MspInit; /* Legacy weak One Pulse M… in HAL_TIM_UnRegisterCallback()
5557 …htim->OnePulse_MspDeInitCallback = HAL_TIM_OnePulse_MspDeInit; /* Legacy weak One Pulse M… in HAL_TIM_UnRegisterCallback()
5561 …htim->Encoder_MspInitCallback = HAL_TIM_Encoder_MspInit; /* Legacy weak Encoder Msp… in HAL_TIM_UnRegisterCallback()
5565 …htim->Encoder_MspDeInitCallback = HAL_TIM_Encoder_MspDeInit; /* Legacy weak Encoder Msp… in HAL_TIM_UnRegisterCallback()
5569 …htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit; /* Legacy weak Hall Sensor… in HAL_TIM_UnRegisterCallback()
5573 …htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit; /* Legacy weak Hall Sensor… in HAL_TIM_UnRegisterCallback()
5589 __HAL_UNLOCK(htim); in HAL_TIM_UnRegisterCallback()
5619 HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim) in HAL_TIM_Base_GetState() argument
5621 return htim->State; in HAL_TIM_Base_GetState()
5629 HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim) in HAL_TIM_OC_GetState() argument
5631 return htim->State; in HAL_TIM_OC_GetState()
5639 HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim) in HAL_TIM_PWM_GetState() argument
5641 return htim->State; in HAL_TIM_PWM_GetState()
5649 HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim) in HAL_TIM_IC_GetState() argument
5651 return htim->State; in HAL_TIM_IC_GetState()
5659 HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim) in HAL_TIM_OnePulse_GetState() argument
5661 return htim->State; in HAL_TIM_OnePulse_GetState()
5669 HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim) in HAL_TIM_Encoder_GetState() argument
5671 return htim->State; in HAL_TIM_Encoder_GetState()
5693 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; in TIM_DMAError() local
5695 htim->State = HAL_TIM_STATE_READY; in TIM_DMAError()
5698 htim->ErrorCallback(htim); in TIM_DMAError()
5700 HAL_TIM_ErrorCallback(htim); in TIM_DMAError()
5711 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; in TIM_DMADelayPulseCplt() local
5713 htim->State = HAL_TIM_STATE_READY; in TIM_DMADelayPulseCplt()
5715 if (hdma == htim->hdma[TIM_DMA_ID_CC1]) in TIM_DMADelayPulseCplt()
5717 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; in TIM_DMADelayPulseCplt()
5719 else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) in TIM_DMADelayPulseCplt()
5721 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; in TIM_DMADelayPulseCplt()
5723 else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) in TIM_DMADelayPulseCplt()
5725 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; in TIM_DMADelayPulseCplt()
5727 else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) in TIM_DMADelayPulseCplt()
5729 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; in TIM_DMADelayPulseCplt()
5737 htim->PWM_PulseFinishedCallback(htim); in TIM_DMADelayPulseCplt()
5739 HAL_TIM_PWM_PulseFinishedCallback(htim); in TIM_DMADelayPulseCplt()
5742 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; in TIM_DMADelayPulseCplt()
5752 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; in TIM_DMADelayPulseHalfCplt() local
5754 htim->State = HAL_TIM_STATE_READY; in TIM_DMADelayPulseHalfCplt()
5756 if (hdma == htim->hdma[TIM_DMA_ID_CC1]) in TIM_DMADelayPulseHalfCplt()
5758 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; in TIM_DMADelayPulseHalfCplt()
5760 else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) in TIM_DMADelayPulseHalfCplt()
5762 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; in TIM_DMADelayPulseHalfCplt()
5764 else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) in TIM_DMADelayPulseHalfCplt()
5766 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; in TIM_DMADelayPulseHalfCplt()
5768 else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) in TIM_DMADelayPulseHalfCplt()
5770 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; in TIM_DMADelayPulseHalfCplt()
5778 htim->PWM_PulseFinishedHalfCpltCallback(htim); in TIM_DMADelayPulseHalfCplt()
5780 HAL_TIM_PWM_PulseFinishedHalfCpltCallback(htim); in TIM_DMADelayPulseHalfCplt()
5783 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; in TIM_DMADelayPulseHalfCplt()
5793 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; in TIM_DMACaptureCplt() local
5795 htim->State = HAL_TIM_STATE_READY; in TIM_DMACaptureCplt()
5797 if (hdma == htim->hdma[TIM_DMA_ID_CC1]) in TIM_DMACaptureCplt()
5799 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; in TIM_DMACaptureCplt()
5801 else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) in TIM_DMACaptureCplt()
5803 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; in TIM_DMACaptureCplt()
5805 else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) in TIM_DMACaptureCplt()
5807 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; in TIM_DMACaptureCplt()
5809 else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) in TIM_DMACaptureCplt()
5811 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; in TIM_DMACaptureCplt()
5819 htim->IC_CaptureCallback(htim); in TIM_DMACaptureCplt()
5821 HAL_TIM_IC_CaptureCallback(htim); in TIM_DMACaptureCplt()
5824 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; in TIM_DMACaptureCplt()
5834 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; in TIM_DMACaptureHalfCplt() local
5836 htim->State = HAL_TIM_STATE_READY; in TIM_DMACaptureHalfCplt()
5838 if (hdma == htim->hdma[TIM_DMA_ID_CC1]) in TIM_DMACaptureHalfCplt()
5840 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; in TIM_DMACaptureHalfCplt()
5842 else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) in TIM_DMACaptureHalfCplt()
5844 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; in TIM_DMACaptureHalfCplt()
5846 else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) in TIM_DMACaptureHalfCplt()
5848 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; in TIM_DMACaptureHalfCplt()
5850 else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) in TIM_DMACaptureHalfCplt()
5852 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; in TIM_DMACaptureHalfCplt()
5860 htim->IC_CaptureHalfCpltCallback(htim); in TIM_DMACaptureHalfCplt()
5862 HAL_TIM_IC_CaptureHalfCpltCallback(htim); in TIM_DMACaptureHalfCplt()
5865 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; in TIM_DMACaptureHalfCplt()
5875 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; in TIM_DMAPeriodElapsedCplt() local
5877 htim->State = HAL_TIM_STATE_READY; in TIM_DMAPeriodElapsedCplt()
5880 htim->PeriodElapsedCallback(htim); in TIM_DMAPeriodElapsedCplt()
5882 HAL_TIM_PeriodElapsedCallback(htim); in TIM_DMAPeriodElapsedCplt()
5893 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; in TIM_DMAPeriodElapsedHalfCplt() local
5895 htim->State = HAL_TIM_STATE_READY; in TIM_DMAPeriodElapsedHalfCplt()
5898 htim->PeriodElapsedHalfCpltCallback(htim); in TIM_DMAPeriodElapsedHalfCplt()
5900 HAL_TIM_PeriodElapsedHalfCpltCallback(htim); in TIM_DMAPeriodElapsedHalfCplt()
5911 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; in TIM_DMATriggerCplt() local
5913 htim->State = HAL_TIM_STATE_READY; in TIM_DMATriggerCplt()
5916 htim->TriggerCallback(htim); in TIM_DMATriggerCplt()
5918 HAL_TIM_TriggerCallback(htim); in TIM_DMATriggerCplt()
5929 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; in TIM_DMATriggerHalfCplt() local
5931 htim->State = HAL_TIM_STATE_READY; in TIM_DMATriggerHalfCplt()
5934 htim->TriggerHalfCpltCallback(htim); in TIM_DMATriggerHalfCplt()
5936 HAL_TIM_TriggerHalfCpltCallback(htim); in TIM_DMATriggerHalfCplt()
6386 static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim, in TIM_SlaveTimer_SetConfig() argument
6394 tmpsmcr = htim->Instance->SMCR; in TIM_SlaveTimer_SetConfig()
6407 htim->Instance->SMCR = tmpsmcr; in TIM_SlaveTimer_SetConfig()
6415 assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance)); in TIM_SlaveTimer_SetConfig()
6420 TIM_ETR_SetConfig(htim->Instance, in TIM_SlaveTimer_SetConfig()
6430 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); in TIM_SlaveTimer_SetConfig()
6439 tmpccer = htim->Instance->CCER; in TIM_SlaveTimer_SetConfig()
6440 htim->Instance->CCER &= ~TIM_CCER_CC1E; in TIM_SlaveTimer_SetConfig()
6441 tmpccmr1 = htim->Instance->CCMR1; in TIM_SlaveTimer_SetConfig()
6448 htim->Instance->CCMR1 = tmpccmr1; in TIM_SlaveTimer_SetConfig()
6449 htim->Instance->CCER = tmpccer; in TIM_SlaveTimer_SetConfig()
6456 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); in TIM_SlaveTimer_SetConfig()
6461 TIM_TI1_ConfigInputStage(htim->Instance, in TIM_SlaveTimer_SetConfig()
6470 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); in TIM_SlaveTimer_SetConfig()
6475 TIM_TI2_ConfigInputStage(htim->Instance, in TIM_SlaveTimer_SetConfig()
6487 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); in TIM_SlaveTimer_SetConfig()
6867 void TIM_ResetCallback(TIM_HandleTypeDef *htim) in TIM_ResetCallback() argument
6870 …htim->PeriodElapsedCallback = HAL_TIM_PeriodElapsedCallback; /* Legacy wea… in TIM_ResetCallback()
6871 …htim->PeriodElapsedHalfCpltCallback = HAL_TIM_PeriodElapsedHalfCpltCallback; /* Legacy wea… in TIM_ResetCallback()
6872 …htim->TriggerCallback = HAL_TIM_TriggerCallback; /* Legacy wea… in TIM_ResetCallback()
6873 …htim->TriggerHalfCpltCallback = HAL_TIM_TriggerHalfCpltCallback; /* Legacy wea… in TIM_ResetCallback()
6874 …htim->IC_CaptureCallback = HAL_TIM_IC_CaptureCallback; /* Legacy wea… in TIM_ResetCallback()
6875 …htim->IC_CaptureHalfCpltCallback = HAL_TIM_IC_CaptureHalfCpltCallback; /* Legacy wea… in TIM_ResetCallback()
6876 …htim->OC_DelayElapsedCallback = HAL_TIM_OC_DelayElapsedCallback; /* Legacy wea… in TIM_ResetCallback()
6877 …htim->PWM_PulseFinishedCallback = HAL_TIM_PWM_PulseFinishedCallback; /* Legacy wea… in TIM_ResetCallback()
6878 …htim->PWM_PulseFinishedHalfCpltCallback = HAL_TIM_PWM_PulseFinishedHalfCpltCallback; /* Legacy wea… in TIM_ResetCallback()
6879 …htim->ErrorCallback = HAL_TIM_ErrorCallback; /* Legacy wea… in TIM_ResetCallback()
6880 …htim->CommutationCallback = HAL_TIMEx_CommutCallback; /* Legacy wea… in TIM_ResetCallback()
6881 …htim->CommutationHalfCpltCallback = HAL_TIMEx_CommutHalfCpltCallback; /* Legacy wea… in TIM_ResetCallback()
6882 …htim->BreakCallback = HAL_TIMEx_BreakCallback; /* Legacy wea… in TIM_ResetCallback()
6883 …htim->Break2Callback = HAL_TIMEx_Break2Callback; /* Legacy wea… in TIM_ResetCallback()