283   CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_CSR);  in HAL_FDCAN_Init()
289   while ((hfdcan->Instance->CCCR & FDCAN_CCCR_CSA) == FDCAN_CCCR_CSA)  in HAL_FDCAN_Init()
304   SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_INIT);  in HAL_FDCAN_Init()
310   while ((hfdcan->Instance->CCCR & FDCAN_CCCR_INIT) == 0U)  in HAL_FDCAN_Init()
326   SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_CCE);  in HAL_FDCAN_Init()
331     CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_DAR);  in HAL_FDCAN_Init()
335     SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_DAR);  in HAL_FDCAN_Init()
341     SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_TXP);  in HAL_FDCAN_Init()
345     CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_TXP);  in HAL_FDCAN_Init()
351     CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_PXHD);  in HAL_FDCAN_Init()
355     SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_PXHD);  in HAL_FDCAN_Init()
359   MODIFY_REG(hfdcan->Instance->CCCR, FDCAN_FRAME_FD_BRS, hfdcan->Init.FrameFormat);  in HAL_FDCAN_Init()
362   CLEAR_BIT(hfdcan->Instance->CCCR, (FDCAN_CCCR_TEST | FDCAN_CCCR_MON | FDCAN_CCCR_ASM));  in HAL_FDCAN_Init()
376     SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_ASM);  in HAL_FDCAN_Init()
383       SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_TEST);  in HAL_FDCAN_Init()
390         SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_MON);  in HAL_FDCAN_Init()
396       SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_MON);  in HAL_FDCAN_Init()
550   SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_CSR);  in HAL_FDCAN_EnterPowerDownMode()
556   while ((hfdcan->Instance->CCCR & FDCAN_CCCR_CSA) == 0U)  in HAL_FDCAN_EnterPowerDownMode()
585   CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_CSR);  in HAL_FDCAN_ExitPowerDownMode()
591   while ((hfdcan->Instance->CCCR & FDCAN_CCCR_CSA) == FDCAN_CCCR_CSA)  in HAL_FDCAN_ExitPowerDownMode()
606   CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_INIT);  in HAL_FDCAN_ExitPowerDownMode()
1454     CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_NISO);  in HAL_FDCAN_EnableISOMode()
1480     SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_NISO);  in HAL_FDCAN_DisableISOMode()
1506     SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_EFBI);  in HAL_FDCAN_EnableEdgeFiltering()
1532     CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_EFBI);  in HAL_FDCAN_DisableEdgeFiltering()
1595     CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_INIT);  in HAL_FDCAN_Start()
1625     SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_INIT);  in HAL_FDCAN_Stop()
1628     while ((hfdcan->Instance->CCCR & FDCAN_CCCR_INIT) == 0U)  in HAL_FDCAN_Stop()
1650     CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_CSR);  in HAL_FDCAN_Stop()
1653     while ((hfdcan->Instance->CCCR & FDCAN_CCCR_CSA) == FDCAN_CCCR_CSA)  in HAL_FDCAN_Stop()
1672     SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_CCE);  in HAL_FDCAN_Stop()
2365   OperationMode = ((hfdcan->Instance->CCCR & FDCAN_CCCR_ASM) >> FDCAN_CCCR_ASM_Pos);  in HAL_FDCAN_IsRestrictedOperationMode()
2383     CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_ASM);  in HAL_FDCAN_ExitRestrictedOperationMode()