Lines Matching refs:PLL3CR
4501 SET_BIT(RCC->PLL3CR, RCC_PLL3CR_PLLON); in LL_RCC_PLL3_Enable()
4514 CLEAR_BIT(RCC->PLL3CR, RCC_PLL3CR_PLLON); in LL_RCC_PLL3_Disable()
4524 return ((READ_BIT(RCC->PLL3CR, RCC_PLL3CR_PLL3RDY) == RCC_PLL3CR_PLL3RDY) ? 1UL : 0UL); in LL_RCC_PLL3_IsReady()
4535 SET_BIT(RCC->PLL3CR, RCC_PLL3CR_DIVPEN); in LL_RCC_PLL3P_Enable()
4546 SET_BIT(RCC->PLL3CR, RCC_PLL3CR_DIVQEN); in LL_RCC_PLL3Q_Enable()
4557 SET_BIT(RCC->PLL3CR, RCC_PLL3CR_DIVREN); in LL_RCC_PLL3R_Enable()
4577 SET_BIT(RCC->PLL3CR, RCC_PLL3CR_SSCG_CTRL); in LL_RCC_PLL3CSG_Enable()
4587 return (uint32_t)((READ_BIT(RCC->PLL3CR, RCC_PLL3CR_DIVPEN) == RCC_PLL3CR_DIVPEN) ? 1UL : 0UL); in LL_RCC_PLL3P_IsEnabled()
4597 return (uint32_t)((READ_BIT(RCC->PLL3CR, RCC_PLL3CR_DIVQEN) == RCC_PLL3CR_DIVQEN) ? 1UL : 0UL); in LL_RCC_PLL3Q_IsEnabled()
4607 return (uint32_t)((READ_BIT(RCC->PLL3CR, RCC_PLL3CR_DIVREN) == RCC_PLL3CR_DIVREN) ? 1UL : 0UL); in LL_RCC_PLL3R_IsEnabled()
4627 …return (uint32_t)((READ_BIT(RCC->PLL3CR, RCC_PLL3CR_SSCG_CTRL) == RCC_PLL3CR_SSCG_CTRL) ? 1UL : 0U… in LL_RCC_PLL3CSG_IsEnabled()
4637 CLEAR_BIT(RCC->PLL3CR, RCC_PLL3CR_DIVPEN); in LL_RCC_PLL3P_Disable()
4647 CLEAR_BIT(RCC->PLL3CR, RCC_PLL3CR_DIVQEN); in LL_RCC_PLL3Q_Disable()
4657 CLEAR_BIT(RCC->PLL3CR, RCC_PLL3CR_DIVREN); in LL_RCC_PLL3R_Disable()
4677 CLEAR_BIT(RCC->PLL3CR, RCC_PLL3CR_SSCG_CTRL); in LL_RCC_PLL3CSG_Disable()