Lines Matching refs:hdma
112 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32…
113 static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma);
114 static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma);
151 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) in HAL_DMA_Init() argument
156 if(hdma == NULL) in HAL_DMA_Init()
162 assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); in HAL_DMA_Init()
163 assert_param(IS_DMA_DIRECTION(hdma->Init.Direction)); in HAL_DMA_Init()
164 assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc)); in HAL_DMA_Init()
165 assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc)); in HAL_DMA_Init()
166 assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); in HAL_DMA_Init()
167 assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); in HAL_DMA_Init()
168 assert_param(IS_DMA_MODE(hdma->Init.Mode)); in HAL_DMA_Init()
169 assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); in HAL_DMA_Init()
171 assert_param(IS_DMA_ALL_REQUEST(hdma->Init.Request)); in HAL_DMA_Init()
174 if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) in HAL_DMA_Init()
177 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Chann… in HAL_DMA_Init()
178 hdma->DmaBaseAddress = DMA1; in HAL_DMA_Init()
183 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Chann… in HAL_DMA_Init()
184 hdma->DmaBaseAddress = DMA2; in HAL_DMA_Init()
188 hdma->State = HAL_DMA_STATE_BUSY; in HAL_DMA_Init()
191 tmp = hdma->Instance->CCR; in HAL_DMA_Init()
200 tmp |= hdma->Init.Direction | in HAL_DMA_Init()
201 hdma->Init.PeriphInc | hdma->Init.MemInc | in HAL_DMA_Init()
202 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | in HAL_DMA_Init()
203 hdma->Init.Mode | hdma->Init.Priority; in HAL_DMA_Init()
206 hdma->Instance->CCR = tmp; in HAL_DMA_Init()
211 DMA_CalcDMAMUXChannelBaseAndMask(hdma); in HAL_DMA_Init()
213 if(hdma->Init.Direction == DMA_MEMORY_TO_MEMORY) in HAL_DMA_Init()
216 hdma->Init.Request = DMA_REQUEST_MEM2MEM; in HAL_DMA_Init()
220 hdma->DMAmuxChannel->CCR = (hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID); in HAL_DMA_Init()
223 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_Init()
225 if(((hdma->Init.Request > 0U) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3))) in HAL_DMA_Init()
230 DMA_CalcDMAMUXRequestGenBaseAndMask(hdma); in HAL_DMA_Init()
233 hdma->DMAmuxRequestGen->RGCR = 0U; in HAL_DMA_Init()
236 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; in HAL_DMA_Init()
240 hdma->DMAmuxRequestGen = 0U; in HAL_DMA_Init()
241 hdma->DMAmuxRequestGenStatus = 0U; in HAL_DMA_Init()
242 hdma->DMAmuxRequestGenStatusMask = 0U; in HAL_DMA_Init()
246 hdma->ErrorCode = HAL_DMA_ERROR_NONE; in HAL_DMA_Init()
249 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_Init()
252 hdma->Lock = HAL_UNLOCKED; in HAL_DMA_Init()
263 HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma) in HAL_DMA_DeInit() argument
267 if (NULL == hdma ) in HAL_DMA_DeInit()
273 assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); in HAL_DMA_DeInit()
276 __HAL_DMA_DISABLE(hdma); in HAL_DMA_DeInit()
279 if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) in HAL_DMA_DeInit()
282 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Chann… in HAL_DMA_DeInit()
283 hdma->DmaBaseAddress = DMA1; in HAL_DMA_DeInit()
288 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Chann… in HAL_DMA_DeInit()
289 hdma->DmaBaseAddress = DMA2; in HAL_DMA_DeInit()
293 hdma->Instance->CCR = 0U; in HAL_DMA_DeInit()
296 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_DeInit()
301 DMA_CalcDMAMUXChannelBaseAndMask(hdma); in HAL_DMA_DeInit()
304 hdma->DMAmuxChannel->CCR = 0U; in HAL_DMA_DeInit()
307 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_DeInit()
310 if(((hdma->Init.Request > 0U) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3))) in HAL_DMA_DeInit()
315 DMA_CalcDMAMUXRequestGenBaseAndMask(hdma); in HAL_DMA_DeInit()
318 hdma->DMAmuxRequestGen->RGCR = 0U; in HAL_DMA_DeInit()
321 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; in HAL_DMA_DeInit()
324 hdma->DMAmuxRequestGen = 0U; in HAL_DMA_DeInit()
325 hdma->DMAmuxRequestGenStatus = 0U; in HAL_DMA_DeInit()
326 hdma->DMAmuxRequestGenStatusMask = 0U; in HAL_DMA_DeInit()
329 hdma->XferCpltCallback = NULL; in HAL_DMA_DeInit()
330 hdma->XferHalfCpltCallback = NULL; in HAL_DMA_DeInit()
331 hdma->XferM1CpltCallback = NULL; in HAL_DMA_DeInit()
332 hdma->XferM1HalfCpltCallback = NULL; in HAL_DMA_DeInit()
333 hdma->XferErrorCallback = NULL; in HAL_DMA_DeInit()
334 hdma->XferAbortCallback = NULL; in HAL_DMA_DeInit()
337 hdma->ErrorCode = HAL_DMA_ERROR_NONE; in HAL_DMA_DeInit()
340 hdma->State = HAL_DMA_STATE_RESET; in HAL_DMA_DeInit()
343 __HAL_UNLOCK(hdma); in HAL_DMA_DeInit()
380 HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, … in HAL_DMA_Start() argument
388 __HAL_LOCK(hdma); in HAL_DMA_Start()
390 if(HAL_DMA_STATE_READY == hdma->State) in HAL_DMA_Start()
393 hdma->State = HAL_DMA_STATE_BUSY; in HAL_DMA_Start()
394 hdma->ErrorCode = HAL_DMA_ERROR_NONE; in HAL_DMA_Start()
397 __HAL_DMA_DISABLE(hdma); in HAL_DMA_Start()
400 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); in HAL_DMA_Start()
403 __HAL_DMA_ENABLE(hdma); in HAL_DMA_Start()
408 __HAL_UNLOCK(hdma); in HAL_DMA_Start()
423 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddres… in HAL_DMA_Start_IT() argument
431 __HAL_LOCK(hdma); in HAL_DMA_Start_IT()
433 if(HAL_DMA_STATE_READY == hdma->State) in HAL_DMA_Start_IT()
436 hdma->State = HAL_DMA_STATE_BUSY; in HAL_DMA_Start_IT()
437 hdma->ErrorCode = HAL_DMA_ERROR_NONE; in HAL_DMA_Start_IT()
440 __HAL_DMA_DISABLE(hdma); in HAL_DMA_Start_IT()
443 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); in HAL_DMA_Start_IT()
447 if(NULL != hdma->XferHalfCpltCallback ) in HAL_DMA_Start_IT()
450 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); in HAL_DMA_Start_IT()
454 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); in HAL_DMA_Start_IT()
455 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); in HAL_DMA_Start_IT()
459 if((hdma->DMAmuxChannel->CCR & DMAMUX_CxCR_SE) != 0U) in HAL_DMA_Start_IT()
462 hdma->DMAmuxChannel->CCR |= DMAMUX_CxCR_SOIE; in HAL_DMA_Start_IT()
465 if(hdma->DMAmuxRequestGen != 0U) in HAL_DMA_Start_IT()
469 hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE; in HAL_DMA_Start_IT()
473 __HAL_DMA_ENABLE(hdma); in HAL_DMA_Start_IT()
478 __HAL_UNLOCK(hdma); in HAL_DMA_Start_IT()
492 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) in HAL_DMA_Abort() argument
497 if(hdma->State != HAL_DMA_STATE_BUSY) in HAL_DMA_Abort()
499 hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; in HAL_DMA_Abort()
502 __HAL_UNLOCK(hdma); in HAL_DMA_Abort()
509 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); in HAL_DMA_Abort()
512 hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; in HAL_DMA_Abort()
515 __HAL_DMA_DISABLE(hdma); in HAL_DMA_Abort()
518 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_Abort()
521 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_Abort()
523 if(hdma->DMAmuxRequestGen != 0U) in HAL_DMA_Abort()
527 hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; in HAL_DMA_Abort()
530 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; in HAL_DMA_Abort()
534 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_Abort()
537 __HAL_UNLOCK(hdma); in HAL_DMA_Abort()
549 HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) in HAL_DMA_Abort_IT() argument
553 if(HAL_DMA_STATE_BUSY != hdma->State) in HAL_DMA_Abort_IT()
556 hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; in HAL_DMA_Abort_IT()
563 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); in HAL_DMA_Abort_IT()
566 __HAL_DMA_DISABLE(hdma); in HAL_DMA_Abort_IT()
569 hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; in HAL_DMA_Abort_IT()
572 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_Abort_IT()
575 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_Abort_IT()
577 if(hdma->DMAmuxRequestGen != 0U) in HAL_DMA_Abort_IT()
581 hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; in HAL_DMA_Abort_IT()
584 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; in HAL_DMA_Abort_IT()
588 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_Abort_IT()
591 __HAL_UNLOCK(hdma); in HAL_DMA_Abort_IT()
594 if(hdma->XferAbortCallback != NULL) in HAL_DMA_Abort_IT()
596 hdma->XferAbortCallback(hdma); in HAL_DMA_Abort_IT()
610 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef Com… in HAL_DMA_PollForTransfer() argument
615 if(HAL_DMA_STATE_BUSY != hdma->State) in HAL_DMA_PollForTransfer()
618 hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; in HAL_DMA_PollForTransfer()
619 __HAL_UNLOCK(hdma); in HAL_DMA_PollForTransfer()
624 if ((hdma->Instance->CCR & DMA_CCR_CIRC) != 0U) in HAL_DMA_PollForTransfer()
626 hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED; in HAL_DMA_PollForTransfer()
634 temp = DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1CU); in HAL_DMA_PollForTransfer()
639 temp = DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU); in HAL_DMA_PollForTransfer()
645 while((hdma->DmaBaseAddress->ISR & temp) == 0U) in HAL_DMA_PollForTransfer()
647 if((hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << (hdma->ChannelIndex& 0x1CU))) != 0U) in HAL_DMA_PollForTransfer()
652 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_PollForTransfer()
655 hdma->ErrorCode = HAL_DMA_ERROR_TE; in HAL_DMA_PollForTransfer()
658 hdma->State= HAL_DMA_STATE_READY; in HAL_DMA_PollForTransfer()
661 __HAL_UNLOCK(hdma); in HAL_DMA_PollForTransfer()
671 hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT; in HAL_DMA_PollForTransfer()
674 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_PollForTransfer()
677 __HAL_UNLOCK(hdma); in HAL_DMA_PollForTransfer()
685 if(hdma->DMAmuxRequestGen != 0U) in HAL_DMA_PollForTransfer()
688 if((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U) in HAL_DMA_PollForTransfer()
691 hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE; in HAL_DMA_PollForTransfer()
694 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; in HAL_DMA_PollForTransfer()
697 hdma->ErrorCode |= HAL_DMA_ERROR_REQGEN; in HAL_DMA_PollForTransfer()
702 if((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U) in HAL_DMA_PollForTransfer()
705 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_PollForTransfer()
708 hdma->ErrorCode |= HAL_DMA_ERROR_SYNC; in HAL_DMA_PollForTransfer()
714 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_TC1 << (hdma->ChannelIndex& 0x1CU)); in HAL_DMA_PollForTransfer()
717 __HAL_UNLOCK(hdma); in HAL_DMA_PollForTransfer()
721 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_PollForTransfer()
726 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_PollForTransfer()
738 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) in HAL_DMA_IRQHandler() argument
740 uint32_t flag_it = hdma->DmaBaseAddress->ISR; in HAL_DMA_IRQHandler()
741 uint32_t source_it = hdma->Instance->CCR; in HAL_DMA_IRQHandler()
744 …if (((flag_it & (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_IT_HT)… in HAL_DMA_IRQHandler()
747 if(((hdma->Instance->CCR) & (uint32_t)(DMA_CCR_DBM)) != 0U) in HAL_DMA_IRQHandler()
750 hdma->DmaBaseAddress->IFCR = DMA_ISR_HTIF1 << (hdma->ChannelIndex & 0x1CU); in HAL_DMA_IRQHandler()
753 if((hdma->Instance->CCR & DMA_CCR_CT) == 0U) in HAL_DMA_IRQHandler()
755 if(hdma->XferHalfCpltCallback != NULL) in HAL_DMA_IRQHandler()
758 hdma->XferHalfCpltCallback(hdma); in HAL_DMA_IRQHandler()
764 if(hdma->XferM1HalfCpltCallback != NULL) in HAL_DMA_IRQHandler()
767 hdma->XferM1HalfCpltCallback(hdma); in HAL_DMA_IRQHandler()
774 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) in HAL_DMA_IRQHandler()
777 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); in HAL_DMA_IRQHandler()
780 hdma->DmaBaseAddress->IFCR = DMA_ISR_HTIF1 << (hdma->ChannelIndex & 0x1CU); in HAL_DMA_IRQHandler()
785 if(hdma->XferHalfCpltCallback != NULL) in HAL_DMA_IRQHandler()
788 hdma->XferHalfCpltCallback(hdma); in HAL_DMA_IRQHandler()
794 …else if (((flag_it & (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_I… in HAL_DMA_IRQHandler()
796 if(((hdma->Instance->CCR) & (uint32_t)(DMA_CCR_DBM)) != 0U) in HAL_DMA_IRQHandler()
799 if((hdma->Instance->CCR & DMA_CCR_CT) == 0U) in HAL_DMA_IRQHandler()
801 if(hdma->XferM1CpltCallback != NULL) in HAL_DMA_IRQHandler()
804 hdma->XferM1CpltCallback(hdma); in HAL_DMA_IRQHandler()
810 if(hdma->XferCpltCallback != NULL) in HAL_DMA_IRQHandler()
813 hdma->XferCpltCallback(hdma); in HAL_DMA_IRQHandler()
819 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) in HAL_DMA_IRQHandler()
824 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); in HAL_DMA_IRQHandler()
827 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_IRQHandler()
830 hdma->DmaBaseAddress->IFCR = (DMA_ISR_TCIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_IRQHandler()
833 __HAL_UNLOCK(hdma); in HAL_DMA_IRQHandler()
835 if(hdma->XferCpltCallback != NULL) in HAL_DMA_IRQHandler()
838 hdma->XferCpltCallback(hdma); in HAL_DMA_IRQHandler()
844 …else if (((flag_it & (DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_I… in HAL_DMA_IRQHandler()
849 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); in HAL_DMA_IRQHandler()
852 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_IRQHandler()
855 hdma->ErrorCode = HAL_DMA_ERROR_TE; in HAL_DMA_IRQHandler()
858 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_IRQHandler()
861 __HAL_UNLOCK(hdma); in HAL_DMA_IRQHandler()
863 if (hdma->XferErrorCallback != NULL) in HAL_DMA_IRQHandler()
866 hdma->XferErrorCallback(hdma); in HAL_DMA_IRQHandler()
886 HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Callb… in HAL_DMA_RegisterCallback() argument
891 __HAL_LOCK(hdma); in HAL_DMA_RegisterCallback()
893 if(HAL_DMA_STATE_READY == hdma->State) in HAL_DMA_RegisterCallback()
898 hdma->XferCpltCallback = pCallback; in HAL_DMA_RegisterCallback()
902 hdma->XferHalfCpltCallback = pCallback; in HAL_DMA_RegisterCallback()
906 hdma->XferM1CpltCallback = pCallback; in HAL_DMA_RegisterCallback()
910 hdma->XferM1HalfCpltCallback = pCallback; in HAL_DMA_RegisterCallback()
914 hdma->XferErrorCallback = pCallback; in HAL_DMA_RegisterCallback()
918 hdma->XferAbortCallback = pCallback; in HAL_DMA_RegisterCallback()
932 __HAL_UNLOCK(hdma); in HAL_DMA_RegisterCallback()
945 HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Cal… in HAL_DMA_UnRegisterCallback() argument
950 __HAL_LOCK(hdma); in HAL_DMA_UnRegisterCallback()
952 if(HAL_DMA_STATE_READY == hdma->State) in HAL_DMA_UnRegisterCallback()
957 hdma->XferCpltCallback = NULL; in HAL_DMA_UnRegisterCallback()
961 hdma->XferHalfCpltCallback = NULL; in HAL_DMA_UnRegisterCallback()
965 hdma->XferM1CpltCallback = NULL; in HAL_DMA_UnRegisterCallback()
969 hdma->XferM1HalfCpltCallback = NULL; in HAL_DMA_UnRegisterCallback()
973 hdma->XferErrorCallback = NULL; in HAL_DMA_UnRegisterCallback()
977 hdma->XferAbortCallback = NULL; in HAL_DMA_UnRegisterCallback()
981 hdma->XferCpltCallback = NULL; in HAL_DMA_UnRegisterCallback()
982 hdma->XferHalfCpltCallback = NULL; in HAL_DMA_UnRegisterCallback()
983 hdma->XferM1CpltCallback = NULL; in HAL_DMA_UnRegisterCallback()
984 hdma->XferM1HalfCpltCallback = NULL; in HAL_DMA_UnRegisterCallback()
985 hdma->XferErrorCallback = NULL; in HAL_DMA_UnRegisterCallback()
986 hdma->XferAbortCallback = NULL; in HAL_DMA_UnRegisterCallback()
1000 __HAL_UNLOCK(hdma); in HAL_DMA_UnRegisterCallback()
1033 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma) in HAL_DMA_GetState() argument
1036 return hdma->State; in HAL_DMA_GetState()
1045 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma) in HAL_DMA_GetError() argument
1047 return hdma->ErrorCode; in HAL_DMA_GetError()
1087 HAL_StatusTypeDef HAL_DMA_ConfigChannelAttributes(DMA_HandleTypeDef *hdma, uint32_t ChannelAttribut… in HAL_DMA_ConfigChannelAttributes() argument
1097 if(hdma == NULL) in HAL_DMA_ConfigChannelAttributes()
1107 ccr = READ_REG(hdma->Instance->CCR); in HAL_DMA_ConfigChannelAttributes()
1125 if ((hdma->Instance->CCR & DMA_CCR_SECM) == DMA_CCR_SECM) in HAL_DMA_ConfigChannelAttributes()
1203 WRITE_REG(hdma->Instance->CCR, ccr); in HAL_DMA_ConfigChannelAttributes()
1217 HAL_StatusTypeDef HAL_DMA_GetConfigChannelAttributes(DMA_HandleTypeDef *hdma, uint32_t *ChannelAttr… in HAL_DMA_GetConfigChannelAttributes() argument
1223 if((hdma == NULL) || (ChannelAttributes == NULL)) in HAL_DMA_GetConfigChannelAttributes()
1230 …read_attributes = READ_BIT(hdma->Instance->CCR, DMA_CCR_PRIV | DMA_CCR_SECM | DMA_CCR_SSEC | DMA_C… in HAL_DMA_GetConfigChannelAttributes()
1246 read_attributes = READ_BIT(hdma->Instance->CCR, DMA_CCR_PRIV); in HAL_DMA_GetConfigChannelAttributes()
1270 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32… in DMA_SetConfig() argument
1273 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in DMA_SetConfig()
1275 if(hdma->DMAmuxRequestGen != 0U) in DMA_SetConfig()
1278 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; in DMA_SetConfig()
1282 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in DMA_SetConfig()
1285 hdma->Instance->CNDTR = DataLength; in DMA_SetConfig()
1288 if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) in DMA_SetConfig()
1291 hdma->Instance->CPAR = DstAddress; in DMA_SetConfig()
1294 hdma->Instance->CM0AR = SrcAddress; in DMA_SetConfig()
1300 hdma->Instance->CPAR = SrcAddress; in DMA_SetConfig()
1303 hdma->Instance->CM0AR = DstAddress; in DMA_SetConfig()
1313 static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma) in DMA_CalcDMAMUXChannelBaseAndMask() argument
1318 if ((uint32_t)hdma->Instance < (uint32_t)DMA2_Channel1) in DMA_CalcDMAMUXChannelBaseAndMask()
1321 hdma->DMAmuxChannel = (DMAMUX1_Channel0 + (hdma->ChannelIndex >> 2U)); in DMA_CalcDMAMUXChannelBaseAndMask()
1326 hdma->DMAmuxChannel = (DMAMUX1_Channel8 + (hdma->ChannelIndex >> 2U)); in DMA_CalcDMAMUXChannelBaseAndMask()
1329 channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U; in DMA_CalcDMAMUXChannelBaseAndMask()
1330 hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus; in DMA_CalcDMAMUXChannelBaseAndMask()
1331 hdma->DMAmuxChannelStatusMask = 1UL << (channel_number & 0x1FU); in DMA_CalcDMAMUXChannelBaseAndMask()
1341 static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma) in DMA_CalcDMAMUXRequestGenBaseAndMask() argument
1343 uint32_t request = hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID; in DMA_CalcDMAMUXRequestGenBaseAndMask()
1346 …hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGenera… in DMA_CalcDMAMUXRequestGenBaseAndMask()
1348 hdma->DMAmuxRequestGenStatus = DMAMUX1_RequestGenStatus; in DMA_CalcDMAMUXRequestGenBaseAndMask()
1351 hdma->DMAmuxRequestGenStatusMask = 1UL << ((request - 1U) & 0x3U); in DMA_CalcDMAMUXRequestGenBaseAndMask()