614   uint32_t tmpcr2;  in LL_TIM_HALLSENSOR_Init()  local
629   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in LL_TIM_HALLSENSOR_Init()
641   tmpcr2 |= TIM_CR2_TI1S;  in LL_TIM_HALLSENSOR_Init()
644   tmpcr2 |= LL_TIM_TRGO_OC2REF;  in LL_TIM_HALLSENSOR_Init()
667   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in LL_TIM_HALLSENSOR_Init()
792   uint32_t tmpcr2;  in OC1Config()  local
807   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC1Config()
838     MODIFY_REG(tmpcr2, TIM_CR2_OIS1, TIM_OCInitStruct->OCIdleState);  in OC1Config()
841     MODIFY_REG(tmpcr2, TIM_CR2_OIS1N, TIM_OCInitStruct->OCNIdleState << 1U);  in OC1Config()
845   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC1Config()
871   uint32_t tmpcr2;  in OC2Config()  local
886   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC2Config()
917     MODIFY_REG(tmpcr2, TIM_CR2_OIS2, TIM_OCInitStruct->OCIdleState << 2U);  in OC2Config()
920     MODIFY_REG(tmpcr2, TIM_CR2_OIS2N, TIM_OCInitStruct->OCNIdleState << 3U);  in OC2Config()
924   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC2Config()
950   uint32_t tmpcr2;  in OC3Config()  local
965   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC3Config()
996     MODIFY_REG(tmpcr2, TIM_CR2_OIS3, TIM_OCInitStruct->OCIdleState << 4U);  in OC3Config()
999     MODIFY_REG(tmpcr2, TIM_CR2_OIS3N, TIM_OCInitStruct->OCNIdleState << 5U);  in OC3Config()
1003   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC3Config()
1029   uint32_t tmpcr2;  in OC4Config()  local
1044   tmpcr2 =  LL_TIM_ReadReg(TIMx, CR2);  in OC4Config()
1066     MODIFY_REG(tmpcr2, TIM_CR2_OIS4, TIM_OCInitStruct->OCIdleState << 6U);  in OC4Config()
1070   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC4Config()