Lines Matching refs:hdma
112 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32…
114 static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma);
115 static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma);
154 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) in HAL_DMA_Init() argument
159 if (hdma == NULL) in HAL_DMA_Init()
165 assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); in HAL_DMA_Init()
166 assert_param(IS_DMA_DIRECTION(hdma->Init.Direction)); in HAL_DMA_Init()
167 assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc)); in HAL_DMA_Init()
168 assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc)); in HAL_DMA_Init()
169 assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); in HAL_DMA_Init()
170 assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); in HAL_DMA_Init()
171 assert_param(IS_DMA_MODE(hdma->Init.Mode)); in HAL_DMA_Init()
172 assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); in HAL_DMA_Init()
174 assert_param(IS_DMA_ALL_REQUEST(hdma->Init.Request)); in HAL_DMA_Init()
177 if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) in HAL_DMA_Init()
180 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Chann… in HAL_DMA_Init()
181 hdma->DmaBaseAddress = DMA1; in HAL_DMA_Init()
186 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Chann… in HAL_DMA_Init()
187 hdma->DmaBaseAddress = DMA2; in HAL_DMA_Init()
191 hdma->State = HAL_DMA_STATE_BUSY; in HAL_DMA_Init()
194 tmp = hdma->Instance->CCR; in HAL_DMA_Init()
202 tmp |= hdma->Init.Direction | in HAL_DMA_Init()
203 hdma->Init.PeriphInc | hdma->Init.MemInc | in HAL_DMA_Init()
204 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | in HAL_DMA_Init()
205 hdma->Init.Mode | hdma->Init.Priority; in HAL_DMA_Init()
208 hdma->Instance->CCR = tmp; in HAL_DMA_Init()
214 DMA_CalcDMAMUXChannelBaseAndMask(hdma); in HAL_DMA_Init()
216 if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY) in HAL_DMA_Init()
219 hdma->Init.Request = DMA_REQUEST_MEM2MEM; in HAL_DMA_Init()
223 hdma->DMAmuxChannel->CCR = (hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID); in HAL_DMA_Init()
226 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_Init()
228 if (((hdma->Init.Request > 0U) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3))) in HAL_DMA_Init()
233 DMA_CalcDMAMUXRequestGenBaseAndMask(hdma); in HAL_DMA_Init()
236 hdma->DMAmuxRequestGen->RGCR = 0U; in HAL_DMA_Init()
239 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; in HAL_DMA_Init()
243 hdma->DMAmuxRequestGen = 0U; in HAL_DMA_Init()
244 hdma->DMAmuxRequestGenStatus = 0U; in HAL_DMA_Init()
245 hdma->DMAmuxRequestGenStatusMask = 0U; in HAL_DMA_Init()
252 if (hdma->Init.Direction != DMA_MEMORY_TO_MEMORY) in HAL_DMA_Init()
255 if (DMA1 == hdma->DmaBaseAddress) in HAL_DMA_Init()
258 DMA1_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_Init()
261 DMA1_CSELR->CSELR |= (uint32_t)(hdma->Init.Request << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_Init()
266 DMA2_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_Init()
269 DMA2_CSELR->CSELR |= (uint32_t)(hdma->Init.Request << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_Init()
278 hdma->ErrorCode = HAL_DMA_ERROR_NONE; in HAL_DMA_Init()
281 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_Init()
284 hdma->Lock = HAL_UNLOCKED; in HAL_DMA_Init()
295 HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma) in HAL_DMA_DeInit() argument
299 if (NULL == hdma) in HAL_DMA_DeInit()
305 assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); in HAL_DMA_DeInit()
308 __HAL_DMA_DISABLE(hdma); in HAL_DMA_DeInit()
311 if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) in HAL_DMA_DeInit()
314 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Chann… in HAL_DMA_DeInit()
315 hdma->DmaBaseAddress = DMA1; in HAL_DMA_DeInit()
320 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Chann… in HAL_DMA_DeInit()
321 hdma->DmaBaseAddress = DMA2; in HAL_DMA_DeInit()
325 hdma->Instance->CCR = 0U; in HAL_DMA_DeInit()
328 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_DeInit()
333 if (DMA1 == hdma->DmaBaseAddress) in HAL_DMA_DeInit()
336 DMA1_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_DeInit()
341 DMA2_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_DeInit()
352 DMA_CalcDMAMUXChannelBaseAndMask(hdma); in HAL_DMA_DeInit()
355 hdma->DMAmuxChannel->CCR = 0U; in HAL_DMA_DeInit()
358 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_DeInit()
361 if (((hdma->Init.Request > 0U) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3))) in HAL_DMA_DeInit()
366 DMA_CalcDMAMUXRequestGenBaseAndMask(hdma); in HAL_DMA_DeInit()
369 hdma->DMAmuxRequestGen->RGCR = 0U; in HAL_DMA_DeInit()
372 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; in HAL_DMA_DeInit()
375 hdma->DMAmuxRequestGen = 0U; in HAL_DMA_DeInit()
376 hdma->DMAmuxRequestGenStatus = 0U; in HAL_DMA_DeInit()
377 hdma->DMAmuxRequestGenStatusMask = 0U; in HAL_DMA_DeInit()
382 hdma->XferCpltCallback = NULL; in HAL_DMA_DeInit()
383 hdma->XferHalfCpltCallback = NULL; in HAL_DMA_DeInit()
384 hdma->XferErrorCallback = NULL; in HAL_DMA_DeInit()
385 hdma->XferAbortCallback = NULL; in HAL_DMA_DeInit()
388 hdma->ErrorCode = HAL_DMA_ERROR_NONE; in HAL_DMA_DeInit()
391 hdma->State = HAL_DMA_STATE_RESET; in HAL_DMA_DeInit()
394 __HAL_UNLOCK(hdma); in HAL_DMA_DeInit()
431 HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, … in HAL_DMA_Start() argument
439 __HAL_LOCK(hdma); in HAL_DMA_Start()
441 if (HAL_DMA_STATE_READY == hdma->State) in HAL_DMA_Start()
444 hdma->State = HAL_DMA_STATE_BUSY; in HAL_DMA_Start()
445 hdma->ErrorCode = HAL_DMA_ERROR_NONE; in HAL_DMA_Start()
448 __HAL_DMA_DISABLE(hdma); in HAL_DMA_Start()
451 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); in HAL_DMA_Start()
454 __HAL_DMA_ENABLE(hdma); in HAL_DMA_Start()
459 __HAL_UNLOCK(hdma); in HAL_DMA_Start()
474 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddres… in HAL_DMA_Start_IT() argument
482 __HAL_LOCK(hdma); in HAL_DMA_Start_IT()
484 if (HAL_DMA_STATE_READY == hdma->State) in HAL_DMA_Start_IT()
487 hdma->State = HAL_DMA_STATE_BUSY; in HAL_DMA_Start_IT()
488 hdma->ErrorCode = HAL_DMA_ERROR_NONE; in HAL_DMA_Start_IT()
491 __HAL_DMA_DISABLE(hdma); in HAL_DMA_Start_IT()
494 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); in HAL_DMA_Start_IT()
498 if (NULL != hdma->XferHalfCpltCallback) in HAL_DMA_Start_IT()
501 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); in HAL_DMA_Start_IT()
505 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); in HAL_DMA_Start_IT()
506 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); in HAL_DMA_Start_IT()
512 if ((hdma->DMAmuxChannel->CCR & DMAMUX_CxCR_SE) != 0U) in HAL_DMA_Start_IT()
515 hdma->DMAmuxChannel->CCR |= DMAMUX_CxCR_SOIE; in HAL_DMA_Start_IT()
518 if (hdma->DMAmuxRequestGen != 0U) in HAL_DMA_Start_IT()
522 hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE; in HAL_DMA_Start_IT()
528 __HAL_DMA_ENABLE(hdma); in HAL_DMA_Start_IT()
533 __HAL_UNLOCK(hdma); in HAL_DMA_Start_IT()
547 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) in HAL_DMA_Abort() argument
552 if (hdma->State != HAL_DMA_STATE_BUSY) in HAL_DMA_Abort()
554 hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; in HAL_DMA_Abort()
557 __HAL_UNLOCK(hdma); in HAL_DMA_Abort()
564 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); in HAL_DMA_Abort()
568 hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; in HAL_DMA_Abort()
572 __HAL_DMA_DISABLE(hdma); in HAL_DMA_Abort()
575 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_Abort()
579 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_Abort()
581 if (hdma->DMAmuxRequestGen != 0U) in HAL_DMA_Abort()
585 hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; in HAL_DMA_Abort()
588 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; in HAL_DMA_Abort()
594 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_Abort()
597 __HAL_UNLOCK(hdma); in HAL_DMA_Abort()
609 HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) in HAL_DMA_Abort_IT() argument
613 if (HAL_DMA_STATE_BUSY != hdma->State) in HAL_DMA_Abort_IT()
616 hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; in HAL_DMA_Abort_IT()
623 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); in HAL_DMA_Abort_IT()
626 __HAL_DMA_DISABLE(hdma); in HAL_DMA_Abort_IT()
630 hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; in HAL_DMA_Abort_IT()
633 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_Abort_IT()
636 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_Abort_IT()
638 if (hdma->DMAmuxRequestGen != 0U) in HAL_DMA_Abort_IT()
642 hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; in HAL_DMA_Abort_IT()
645 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; in HAL_DMA_Abort_IT()
650 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_Abort_IT()
654 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_Abort_IT()
657 __HAL_UNLOCK(hdma); in HAL_DMA_Abort_IT()
660 if (hdma->XferAbortCallback != NULL) in HAL_DMA_Abort_IT()
662 hdma->XferAbortCallback(hdma); in HAL_DMA_Abort_IT()
676 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef Com… in HAL_DMA_PollForTransfer() argument
681 if (HAL_DMA_STATE_BUSY != hdma->State) in HAL_DMA_PollForTransfer()
684 hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; in HAL_DMA_PollForTransfer()
685 __HAL_UNLOCK(hdma); in HAL_DMA_PollForTransfer()
690 if ((hdma->Instance->CCR & DMA_CCR_CIRC) != 0U) in HAL_DMA_PollForTransfer()
692 hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED; in HAL_DMA_PollForTransfer()
700 temp = DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1CU); in HAL_DMA_PollForTransfer()
705 temp = DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU); in HAL_DMA_PollForTransfer()
711 while ((hdma->DmaBaseAddress->ISR & temp) == 0U) in HAL_DMA_PollForTransfer()
713 if ((hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1CU))) != 0U) in HAL_DMA_PollForTransfer()
718 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_PollForTransfer()
721 hdma->ErrorCode = HAL_DMA_ERROR_TE; in HAL_DMA_PollForTransfer()
724 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_PollForTransfer()
727 __HAL_UNLOCK(hdma); in HAL_DMA_PollForTransfer()
737 hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT; in HAL_DMA_PollForTransfer()
740 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_PollForTransfer()
743 __HAL_UNLOCK(hdma); in HAL_DMA_PollForTransfer()
752 if (hdma->DMAmuxRequestGen != 0U) in HAL_DMA_PollForTransfer()
755 if ((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U) in HAL_DMA_PollForTransfer()
758 hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE; in HAL_DMA_PollForTransfer()
761 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; in HAL_DMA_PollForTransfer()
764 hdma->ErrorCode |= HAL_DMA_ERROR_REQGEN; in HAL_DMA_PollForTransfer()
769 if ((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U) in HAL_DMA_PollForTransfer()
772 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_PollForTransfer()
775 hdma->ErrorCode |= HAL_DMA_ERROR_SYNC; in HAL_DMA_PollForTransfer()
782 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_PollForTransfer()
785 __HAL_UNLOCK(hdma); in HAL_DMA_PollForTransfer()
789 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_PollForTransfer()
794 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_PollForTransfer()
806 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) in HAL_DMA_IRQHandler() argument
808 uint32_t flag_it = hdma->DmaBaseAddress->ISR; in HAL_DMA_IRQHandler()
809 uint32_t source_it = hdma->Instance->CCR; in HAL_DMA_IRQHandler()
812 …if (((flag_it & (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_IT_HT)… in HAL_DMA_IRQHandler()
815 if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) in HAL_DMA_IRQHandler()
818 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); in HAL_DMA_IRQHandler()
821 hdma->DmaBaseAddress->IFCR = DMA_ISR_HTIF1 << (hdma->ChannelIndex & 0x1CU); in HAL_DMA_IRQHandler()
826 if (hdma->XferHalfCpltCallback != NULL) in HAL_DMA_IRQHandler()
829 hdma->XferHalfCpltCallback(hdma); in HAL_DMA_IRQHandler()
834 …else if (((flag_it & (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_I… in HAL_DMA_IRQHandler()
836 if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) in HAL_DMA_IRQHandler()
841 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); in HAL_DMA_IRQHandler()
844 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_IRQHandler()
847 hdma->DmaBaseAddress->IFCR = (DMA_ISR_TCIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_IRQHandler()
850 __HAL_UNLOCK(hdma); in HAL_DMA_IRQHandler()
852 if (hdma->XferCpltCallback != NULL) in HAL_DMA_IRQHandler()
855 hdma->XferCpltCallback(hdma); in HAL_DMA_IRQHandler()
860 …else if (((flag_it & (DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_I… in HAL_DMA_IRQHandler()
865 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); in HAL_DMA_IRQHandler()
868 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_IRQHandler()
871 hdma->ErrorCode = HAL_DMA_ERROR_TE; in HAL_DMA_IRQHandler()
874 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_IRQHandler()
877 __HAL_UNLOCK(hdma); in HAL_DMA_IRQHandler()
879 if (hdma->XferErrorCallback != NULL) in HAL_DMA_IRQHandler()
882 hdma->XferErrorCallback(hdma); in HAL_DMA_IRQHandler()
902 HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Callb… in HAL_DMA_RegisterCallback() argument
907 __HAL_LOCK(hdma); in HAL_DMA_RegisterCallback()
909 if (HAL_DMA_STATE_READY == hdma->State) in HAL_DMA_RegisterCallback()
914 hdma->XferCpltCallback = pCallback; in HAL_DMA_RegisterCallback()
918 hdma->XferHalfCpltCallback = pCallback; in HAL_DMA_RegisterCallback()
922 hdma->XferErrorCallback = pCallback; in HAL_DMA_RegisterCallback()
926 hdma->XferAbortCallback = pCallback; in HAL_DMA_RegisterCallback()
940 __HAL_UNLOCK(hdma); in HAL_DMA_RegisterCallback()
953 HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Cal… in HAL_DMA_UnRegisterCallback() argument
958 __HAL_LOCK(hdma); in HAL_DMA_UnRegisterCallback()
960 if (HAL_DMA_STATE_READY == hdma->State) in HAL_DMA_UnRegisterCallback()
965 hdma->XferCpltCallback = NULL; in HAL_DMA_UnRegisterCallback()
969 hdma->XferHalfCpltCallback = NULL; in HAL_DMA_UnRegisterCallback()
973 hdma->XferErrorCallback = NULL; in HAL_DMA_UnRegisterCallback()
977 hdma->XferAbortCallback = NULL; in HAL_DMA_UnRegisterCallback()
981 hdma->XferCpltCallback = NULL; in HAL_DMA_UnRegisterCallback()
982 hdma->XferHalfCpltCallback = NULL; in HAL_DMA_UnRegisterCallback()
983 hdma->XferErrorCallback = NULL; in HAL_DMA_UnRegisterCallback()
984 hdma->XferAbortCallback = NULL; in HAL_DMA_UnRegisterCallback()
998 __HAL_UNLOCK(hdma); in HAL_DMA_UnRegisterCallback()
1031 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma) in HAL_DMA_GetState() argument
1034 return hdma->State; in HAL_DMA_GetState()
1043 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma) in HAL_DMA_GetError() argument
1045 return hdma->ErrorCode; in HAL_DMA_GetError()
1069 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32… in DMA_SetConfig() argument
1073 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in DMA_SetConfig()
1075 if (hdma->DMAmuxRequestGen != 0U) in DMA_SetConfig()
1078 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; in DMA_SetConfig()
1083 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in DMA_SetConfig()
1086 hdma->Instance->CNDTR = DataLength; in DMA_SetConfig()
1089 if ((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) in DMA_SetConfig()
1092 hdma->Instance->CPAR = DstAddress; in DMA_SetConfig()
1095 hdma->Instance->CMAR = SrcAddress; in DMA_SetConfig()
1101 hdma->Instance->CPAR = SrcAddress; in DMA_SetConfig()
1104 hdma->Instance->CMAR = DstAddress; in DMA_SetConfig()
1116 static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma) in DMA_CalcDMAMUXChannelBaseAndMask() argument
1121 if ((uint32_t)hdma->Instance < (uint32_t)DMA2_Channel1) in DMA_CalcDMAMUXChannelBaseAndMask()
1124 hdma->DMAmuxChannel = (DMAMUX1_Channel0 + (hdma->ChannelIndex >> 2U)); in DMA_CalcDMAMUXChannelBaseAndMask()
1129 hdma->DMAmuxChannel = (DMAMUX1_Channel7 + (hdma->ChannelIndex >> 2U)); in DMA_CalcDMAMUXChannelBaseAndMask()
1132 channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U; in DMA_CalcDMAMUXChannelBaseAndMask()
1133 hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus; in DMA_CalcDMAMUXChannelBaseAndMask()
1134 hdma->DMAmuxChannelStatusMask = 1UL << (channel_number & 0x1FU); in DMA_CalcDMAMUXChannelBaseAndMask()
1144 static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma) in DMA_CalcDMAMUXRequestGenBaseAndMask() argument
1146 uint32_t request = hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID; in DMA_CalcDMAMUXRequestGenBaseAndMask()
1149 …hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGenera… in DMA_CalcDMAMUXRequestGenBaseAndMask()
1151 hdma->DMAmuxRequestGenStatus = DMAMUX1_RequestGenStatus; in DMA_CalcDMAMUXRequestGenBaseAndMask()
1154 hdma->DMAmuxRequestGenStatusMask = 1UL << ((request - 1U) & 0x3U); in DMA_CalcDMAMUXRequestGenBaseAndMask()