441   MODIFY_REG(SPIx->CR2, SPI_CR2_FRF, Standard);  in LL_SPI_SetStandard()
454   return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRF));  in LL_SPI_GetStandard()
642   MODIFY_REG(SPIx->CR2, SPI_CR2_DS, DataWidth);  in LL_SPI_SetDataWidth()
666   return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_DS));  in LL_SPI_GetDataWidth()
680   MODIFY_REG(SPIx->CR2, SPI_CR2_FRXTH, Threshold);  in LL_SPI_SetRxFIFOThreshold()
693   return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRXTH));  in LL_SPI_GetRxFIFOThreshold()
848   MODIFY_REG(SPIx->CR2, SPI_CR2_SSOE, ((uint32_t)(NSS >> 16U)));  in LL_SPI_SetNSSMode()
864   uint32_t Ssoe = (READ_BIT(SPIx->CR2,  SPI_CR2_SSOE) << 16U);  in LL_SPI_GetNSSMode()
877   SET_BIT(SPIx->CR2, SPI_CR2_NSSP);  in LL_SPI_EnableNSSPulseMgt()
889   CLEAR_BIT(SPIx->CR2, SPI_CR2_NSSP);  in LL_SPI_DisableNSSPulseMgt()
901   return ((READ_BIT(SPIx->CR2, SPI_CR2_NSSP) == (SPI_CR2_NSSP)) ? 1UL : 0UL);  in LL_SPI_IsEnabledNSSPulse()
1102   SET_BIT(SPIx->CR2, SPI_CR2_ERRIE);  in LL_SPI_EnableIT_ERR()
1113   SET_BIT(SPIx->CR2, SPI_CR2_RXNEIE);  in LL_SPI_EnableIT_RXNE()
1124   SET_BIT(SPIx->CR2, SPI_CR2_TXEIE);  in LL_SPI_EnableIT_TXE()
1137   CLEAR_BIT(SPIx->CR2, SPI_CR2_ERRIE);  in LL_SPI_DisableIT_ERR()
1148   CLEAR_BIT(SPIx->CR2, SPI_CR2_RXNEIE);  in LL_SPI_DisableIT_RXNE()
1159   CLEAR_BIT(SPIx->CR2, SPI_CR2_TXEIE);  in LL_SPI_DisableIT_TXE()
1170   return ((READ_BIT(SPIx->CR2, SPI_CR2_ERRIE) == (SPI_CR2_ERRIE)) ? 1UL : 0UL);  in LL_SPI_IsEnabledIT_ERR()
1181   return ((READ_BIT(SPIx->CR2, SPI_CR2_RXNEIE) == (SPI_CR2_RXNEIE)) ? 1UL : 0UL);  in LL_SPI_IsEnabledIT_RXNE()
1192   return ((READ_BIT(SPIx->CR2, SPI_CR2_TXEIE) == (SPI_CR2_TXEIE)) ? 1UL : 0UL);  in LL_SPI_IsEnabledIT_TXE()
1211   SET_BIT(SPIx->CR2, SPI_CR2_RXDMAEN);  in LL_SPI_EnableDMAReq_RX()
1222   CLEAR_BIT(SPIx->CR2, SPI_CR2_RXDMAEN);  in LL_SPI_DisableDMAReq_RX()
1233   return ((READ_BIT(SPIx->CR2, SPI_CR2_RXDMAEN) == (SPI_CR2_RXDMAEN)) ? 1UL : 0UL);  in LL_SPI_IsEnabledDMAReq_RX()
1244   SET_BIT(SPIx->CR2, SPI_CR2_TXDMAEN);  in LL_SPI_EnableDMAReq_TX()
1255   CLEAR_BIT(SPIx->CR2, SPI_CR2_TXDMAEN);  in LL_SPI_DisableDMAReq_TX()
1266   return ((READ_BIT(SPIx->CR2, SPI_CR2_TXDMAEN) == (SPI_CR2_TXDMAEN)) ? 1UL : 0UL);  in LL_SPI_IsEnabledDMAReq_TX()
1280   MODIFY_REG(SPIx->CR2, SPI_CR2_LDMARX, (Parity << SPI_CR2_LDMARX_Pos));  in LL_SPI_SetDMAParity_RX()
1293   return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_LDMARX) >> SPI_CR2_LDMARX_Pos);  in LL_SPI_GetDMAParity_RX()
1307   MODIFY_REG(SPIx->CR2, SPI_CR2_LDMATX, (Parity << SPI_CR2_LDMATX_Pos));  in LL_SPI_SetDMAParity_TX()
1320   return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_LDMATX) >> SPI_CR2_LDMATX_Pos);  in LL_SPI_GetDMAParity_TX()