Lines Matching refs:PWR
34 #if defined(PWR)
195 #define LL_PWR_GPIO_A ((uint32_t)(&(PWR->PUCRA)))
196 #define LL_PWR_GPIO_B ((uint32_t)(&(PWR->PUCRB)))
197 #define LL_PWR_GPIO_C ((uint32_t)(&(PWR->PUCRC)))
198 #define LL_PWR_GPIO_D ((uint32_t)(&(PWR->PUCRD)))
199 #define LL_PWR_GPIO_E ((uint32_t)(&(PWR->PUCRE)))
201 #define LL_PWR_GPIO_F ((uint32_t)(&(PWR->PUCRF)))
204 #define LL_PWR_GPIO_G ((uint32_t)(&(PWR->PUCRG)))
207 #define LL_PWR_GPIO_H ((uint32_t)(&(PWR->PUCRH)))
210 #define LL_PWR_GPIO_I ((uint32_t)(&(PWR->PUCRI)))
258 #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
265 #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
291 SET_BIT(PWR->CR1, PWR_CR1_LPR); in LL_PWR_EnableLowPowerRunMode()
301 CLEAR_BIT(PWR->CR1, PWR_CR1_LPR); in LL_PWR_DisableLowPowerRunMode()
331 return ((READ_BIT(PWR->CR1, PWR_CR1_LPR) == (PWR_CR1_LPR)) ? 1UL : 0UL); in LL_PWR_IsEnabledLowPowerRunMode()
345 MODIFY_REG(PWR->CR1, PWR_CR1_VOS, VoltageScaling); in LL_PWR_SetRegulVoltageScaling()
357 return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_VOS)); in LL_PWR_GetRegulVoltageScaling()
368 CLEAR_BIT(PWR->CR5, PWR_CR5_R1MODE); in LL_PWR_EnableRange1BoostMode()
378 SET_BIT(PWR->CR5, PWR_CR5_R1MODE); in LL_PWR_DisableRange1BoostMode()
388 return ((READ_BIT(PWR->CR5, PWR_CR5_R1MODE) == 0x0U) ? 1UL : 0UL); in LL_PWR_IsEnabledRange1BoostMode()
399 SET_BIT(PWR->CR1, PWR_CR1_DBP); in LL_PWR_EnableBkUpAccess()
409 CLEAR_BIT(PWR->CR1, PWR_CR1_DBP); in LL_PWR_DisableBkUpAccess()
419 return ((READ_BIT(PWR->CR1, PWR_CR1_DBP) == (PWR_CR1_DBP)) ? 1UL : 0UL); in LL_PWR_IsEnabledBkUpAccess()
435 MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, LowPowerMode); in LL_PWR_SetPowerMode()
450 return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_LPMS)); in LL_PWR_GetPowerMode()
461 SET_BIT(PWR->CR1, PWR_CR1_RRSTP); in LL_PWR_EnableSRAM3Retention()
471 CLEAR_BIT(PWR->CR1, PWR_CR1_RRSTP); in LL_PWR_DisableSRAM3Retention()
481 return ((READ_BIT(PWR->CR1, PWR_CR1_RRSTP) == (PWR_CR1_RRSTP)) ? 1UL : 0UL); in LL_PWR_IsEnabledSRAM3Retention()
493 SET_BIT(PWR->CR3, PWR_CR3_DSIPDEN); in LL_PWR_EnableDSIPinsPDActivation()
503 CLEAR_BIT(PWR->CR3, PWR_CR3_DSIPDEN); in LL_PWR_DisableDSIPinsPDActivation()
513 return ((READ_BIT(PWR->CR3, PWR_CR3_DSIPDEN) == (PWR_CR3_DSIPDEN)) ? 1UL : 0UL); in LL_PWR_IsEnabledDSIPinsPDActivation()
525 SET_BIT(PWR->CR2, PWR_CR2_USV); in LL_PWR_EnableVddUSB()
535 CLEAR_BIT(PWR->CR2, PWR_CR2_USV); in LL_PWR_DisableVddUSB()
545 return ((READ_BIT(PWR->CR2, PWR_CR2_USV) == (PWR_CR2_USV)) ? 1UL : 0UL); in LL_PWR_IsEnabledVddUSB()
557 SET_BIT(PWR->CR2, PWR_CR2_IOSV); in LL_PWR_EnableVddIO2()
567 CLEAR_BIT(PWR->CR2, PWR_CR2_IOSV); in LL_PWR_DisableVddIO2()
577 return ((READ_BIT(PWR->CR2, PWR_CR2_IOSV) == (PWR_CR2_IOSV)) ? 1UL : 0UL); in LL_PWR_IsEnabledVddIO2()
598 SET_BIT(PWR->CR2, PeriphVoltage); in LL_PWR_EnablePVM()
618 CLEAR_BIT(PWR->CR2, PeriphVoltage); in LL_PWR_DisablePVM()
638 return ((READ_BIT(PWR->CR2, PeriphVoltage) == (PeriphVoltage)) ? 1UL : 0UL); in LL_PWR_IsEnabledPVM()
657 MODIFY_REG(PWR->CR2, PWR_CR2_PLS, PVDLevel); in LL_PWR_SetPVDLevel()
675 return (uint32_t)(READ_BIT(PWR->CR2, PWR_CR2_PLS)); in LL_PWR_GetPVDLevel()
685 SET_BIT(PWR->CR2, PWR_CR2_PVDE); in LL_PWR_EnablePVD()
695 CLEAR_BIT(PWR->CR2, PWR_CR2_PVDE); in LL_PWR_DisablePVD()
705 return ((READ_BIT(PWR->CR2, PWR_CR2_PVDE) == (PWR_CR2_PVDE)) ? 1UL : 0UL); in LL_PWR_IsEnabledPVD()
715 SET_BIT(PWR->CR3, PWR_CR3_EIWF); in LL_PWR_EnableInternWU()
725 CLEAR_BIT(PWR->CR3, PWR_CR3_EIWF); in LL_PWR_DisableInternWU()
735 return ((READ_BIT(PWR->CR3, PWR_CR3_EIWF) == (PWR_CR3_EIWF)) ? 1UL : 0UL); in LL_PWR_IsEnabledInternWU()
745 SET_BIT(PWR->CR3, PWR_CR3_APC); in LL_PWR_EnablePUPDCfg()
755 CLEAR_BIT(PWR->CR3, PWR_CR3_APC); in LL_PWR_DisablePUPDCfg()
765 return ((READ_BIT(PWR->CR3, PWR_CR3_APC) == (PWR_CR3_APC)) ? 1UL : 0UL); in LL_PWR_IsEnabledPUPDCfg()
776 SET_BIT(PWR->CR3, PWR_CR3_DSIPDEN); in LL_PWR_EnableDSIPullDown()
786 CLEAR_BIT(PWR->CR3, PWR_CR3_DSIPDEN); in LL_PWR_DisableDSIPullDown()
796 return ((READ_BIT(PWR->CR3, PWR_CR3_DSIPDEN) == (PWR_CR3_DSIPDEN)) ? 1UL : 0UL); in LL_PWR_IsEnabledDSIPullDown()
808 SET_BIT(PWR->CR3, PWR_CR3_ENULP); in LL_PWR_EnableBORPVD_ULP()
818 CLEAR_BIT(PWR->CR3, PWR_CR3_ENULP); in LL_PWR_DisableBORPVD_ULP()
828 return ((READ_BIT(PWR->CR3, PWR_CR3_ENULP) == (PWR_CR3_ENULP)) ? 1UL : 0UL); in LL_PWR_IsEnabledBORPVD_ULP()
839 MODIFY_REG(PWR->CR3, PWR_CR3_RRS, LL_PWR_FULL_SRAM2_RETENTION); in LL_PWR_EnableSRAM2Retention()
849 CLEAR_BIT(PWR->CR3, PWR_CR3_RRS); in LL_PWR_DisableSRAM2Retention()
859 return ((READ_BIT(PWR->CR3, PWR_CR3_RRS) == (LL_PWR_FULL_SRAM2_RETENTION)) ? 1UL : 0UL); in LL_PWR_IsEnabledSRAM2Retention()
876 MODIFY_REG(PWR->CR3, PWR_CR3_RRS, SRAM2Size); in LL_PWR_SetSRAM2ContentRetention()
890 return (uint32_t)(READ_BIT(PWR->CR3, PWR_CR3_RRS)); in LL_PWR_GetSRAM2ContentRetention()
910 SET_BIT(PWR->CR3, WakeUpPin); in LL_PWR_EnableWakeUpPin()
930 CLEAR_BIT(PWR->CR3, WakeUpPin); in LL_PWR_DisableWakeUpPin()
950 return ((READ_BIT(PWR->CR3, WakeUpPin) == (WakeUpPin)) ? 1UL : 0UL); in LL_PWR_IsEnabledWakeUpPin()
963 SET_BIT(PWR->CR4, PWR_CR4_EXT_SMPS_ON); in LL_PWR_EnableExtSMPS_0V95()
975 CLEAR_BIT(PWR->CR4, PWR_CR4_EXT_SMPS_ON); in LL_PWR_DisableExtSMPS_0V95()
987 return ((READ_BIT(PWR->CR4, PWR_CR4_EXT_SMPS_ON) == (PWR_CR4_EXT_SMPS_ON)) ? 1UL : 0UL); in LL_PWR_IsEnabledExtSMPS_0V95()
1001 MODIFY_REG(PWR->CR4, PWR_CR4_VBRS, Resistor); in LL_PWR_SetBattChargResistor()
1013 return (uint32_t)(READ_BIT(PWR->CR4, PWR_CR4_VBRS)); in LL_PWR_GetBattChargResistor()
1023 SET_BIT(PWR->CR4, PWR_CR4_VBE); in LL_PWR_EnableBatteryCharging()
1033 CLEAR_BIT(PWR->CR4, PWR_CR4_VBE); in LL_PWR_DisableBatteryCharging()
1043 return ((READ_BIT(PWR->CR4, PWR_CR4_VBE) == (PWR_CR4_VBE)) ? 1UL : 0UL); in LL_PWR_IsEnabledBatteryCharging()
1063 SET_BIT(PWR->CR4, WakeUpPin); in LL_PWR_SetWakeUpPinPolarityLow()
1083 CLEAR_BIT(PWR->CR4, WakeUpPin); in LL_PWR_SetWakeUpPinPolarityHigh()
1103 return ((READ_BIT(PWR->CR4, WakeUpPin) == (WakeUpPin)) ? 1UL : 0UL); in LL_PWR_IsWakeUpPinPolarityLow()
1403 return ((READ_BIT(PWR->SR1, PWR_SR1_WUFI) == (PWR_SR1_WUFI)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_InternWU()
1414 return ((READ_BIT(PWR->SR1, PWR_SR1_EXT_SMPS_RDY) == (PWR_SR1_EXT_SMPS_RDY)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_ExtSMPSReady()
1425 return ((READ_BIT(PWR->SR1, PWR_SR1_SBF) == (PWR_SR1_SBF)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_SB()
1435 return ((READ_BIT(PWR->SR1, PWR_SR1_WUF5) == (PWR_SR1_WUF5)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU5()
1445 return ((READ_BIT(PWR->SR1, PWR_SR1_WUF4) == (PWR_SR1_WUF4)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU4()
1455 return ((READ_BIT(PWR->SR1, PWR_SR1_WUF3) == (PWR_SR1_WUF3)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU3()
1465 return ((READ_BIT(PWR->SR1, PWR_SR1_WUF2) == (PWR_SR1_WUF2)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU2()
1475 return ((READ_BIT(PWR->SR1, PWR_SR1_WUF1) == (PWR_SR1_WUF1)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU1()
1485 WRITE_REG(PWR->SCR, PWR_SCR_CSBF); in LL_PWR_ClearFlag_SB()
1495 WRITE_REG(PWR->SCR, PWR_SCR_CWUF); in LL_PWR_ClearFlag_WU()
1505 WRITE_REG(PWR->SCR, PWR_SCR_CWUF5); in LL_PWR_ClearFlag_WU5()
1515 WRITE_REG(PWR->SCR, PWR_SCR_CWUF4); in LL_PWR_ClearFlag_WU4()
1525 WRITE_REG(PWR->SCR, PWR_SCR_CWUF3); in LL_PWR_ClearFlag_WU3()
1535 WRITE_REG(PWR->SCR, PWR_SCR_CWUF2); in LL_PWR_ClearFlag_WU2()
1545 WRITE_REG(PWR->SCR, PWR_SCR_CWUF1); in LL_PWR_ClearFlag_WU1()
1555 return ((READ_BIT(PWR->SR2, PWR_SR2_PVMO4) == (PWR_SR2_PVMO4)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_PVMO4()
1565 return ((READ_BIT(PWR->SR2, PWR_SR2_PVMO3) == (PWR_SR2_PVMO3)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_PVMO3()
1576 return ((READ_BIT(PWR->SR2, PWR_SR2_PVMO2) == (PWR_SR2_PVMO2)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_PVMO2()
1588 return ((READ_BIT(PWR->SR2, PWR_SR2_PVMO1) == (PWR_SR2_PVMO1)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_PVMO1()
1599 return ((READ_BIT(PWR->SR2, PWR_SR2_PVDO) == (PWR_SR2_PVDO)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_PVDO()
1609 return ((READ_BIT(PWR->SR2, PWR_SR2_VOSF) == (PWR_SR2_VOSF)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_VOS()
1620 return ((READ_BIT(PWR->SR2, PWR_SR2_REGLPF) == (PWR_SR2_REGLPF)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_REGLPF()
1630 return ((READ_BIT(PWR->SR2, PWR_SR2_REGLPS) == (PWR_SR2_REGLPS)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_REGLPS()