276                                           FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank)  in FSMC_NORSRAM_Timing_Init()  argument
281   assert_param(IS_FSMC_ADDRESS_SETUP_TIME(Timing->AddressSetupTime));  in FSMC_NORSRAM_Timing_Init()
282   assert_param(IS_FSMC_ADDRESS_HOLD_TIME(Timing->AddressHoldTime));  in FSMC_NORSRAM_Timing_Init()
283   assert_param(IS_FSMC_DATASETUP_TIME(Timing->DataSetupTime));  in FSMC_NORSRAM_Timing_Init()
284   assert_param(IS_FSMC_TURNAROUND_TIME(Timing->BusTurnAroundDuration));  in FSMC_NORSRAM_Timing_Init()
285   assert_param(IS_FSMC_CLK_DIV(Timing->CLKDivision));  in FSMC_NORSRAM_Timing_Init()
286   assert_param(IS_FSMC_DATA_LATENCY(Timing->DataLatency));  in FSMC_NORSRAM_Timing_Init()
287   assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode));  in FSMC_NORSRAM_Timing_Init()
291 …MODIFY_REG(Device->BTCR[Bank + 1U], BTR_CLEAR_MASK, (Timing->AddressSetupTime                     …  in FSMC_NORSRAM_Timing_Init()
292 …                                      ((Timing->AddressHoldTime)        << FSMC_BTRx_ADDHLD_Pos)  |  in FSMC_NORSRAM_Timing_Init()
293 …                                      ((Timing->DataSetupTime)          << FSMC_BTRx_DATAST_Pos)  |  in FSMC_NORSRAM_Timing_Init()
294 …                                      ((Timing->BusTurnAroundDuration)  << FSMC_BTRx_BUSTURN_Pos) |  in FSMC_NORSRAM_Timing_Init()
295 …                                      (((Timing->CLKDivision) - 1U)     << FSMC_BTRx_CLKDIV_Pos)  |  in FSMC_NORSRAM_Timing_Init()
296 …                                      (((Timing->DataLatency) - 2U)     << FSMC_BTRx_DATLAT_Pos)  |  in FSMC_NORSRAM_Timing_Init()
297                                                        (Timing->AccessMode)));  in FSMC_NORSRAM_Timing_Init()
315 …                                                 FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank,  in FSMC_NORSRAM_Extended_Timing_Init()  argument
326     assert_param(IS_FSMC_ADDRESS_SETUP_TIME(Timing->AddressSetupTime));  in FSMC_NORSRAM_Extended_Timing_Init()
327     assert_param(IS_FSMC_ADDRESS_HOLD_TIME(Timing->AddressHoldTime));  in FSMC_NORSRAM_Extended_Timing_Init()
328     assert_param(IS_FSMC_DATASETUP_TIME(Timing->DataSetupTime));  in FSMC_NORSRAM_Extended_Timing_Init()
329     assert_param(IS_FSMC_TURNAROUND_TIME(Timing->BusTurnAroundDuration));  in FSMC_NORSRAM_Extended_Timing_Init()
330     assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode));  in FSMC_NORSRAM_Extended_Timing_Init()
334 …MODIFY_REG(Device->BWTR[Bank], BWTR_CLEAR_MASK, (Timing->AddressSetupTime                         …  in FSMC_NORSRAM_Extended_Timing_Init()
335 …                                     ((Timing->AddressHoldTime)        << FSMC_BWTRx_ADDHLD_Pos)  |  in FSMC_NORSRAM_Extended_Timing_Init()
336 …                                     ((Timing->DataSetupTime)          << FSMC_BWTRx_DATAST_Pos)  |  in FSMC_NORSRAM_Extended_Timing_Init()
337 …                                      Timing->AccessMode                                          |  in FSMC_NORSRAM_Extended_Timing_Init()
338 …                                    ((Timing->BusTurnAroundDuration)  << FSMC_BWTRx_BUSTURN_Pos)));  in FSMC_NORSRAM_Extended_Timing_Init()