239                                      FSMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank)  in FSMC_NORSRAM_DeInit()  argument
244   assert_param(IS_FSMC_NORSRAM_BANK(Bank));  in FSMC_NORSRAM_DeInit()
247   __FSMC_NORSRAM_DISABLE(Device, Bank);  in FSMC_NORSRAM_DeInit()
251   if (Bank == FSMC_NORSRAM_BANK1)  in FSMC_NORSRAM_DeInit()
253     Device->BTCR[Bank] = 0x000030DBU;  in FSMC_NORSRAM_DeInit()
258     Device->BTCR[Bank] = 0x000030D2U;  in FSMC_NORSRAM_DeInit()
261   Device->BTCR[Bank + 1U] = 0x0FFFFFFFU;  in FSMC_NORSRAM_DeInit()
262   ExDevice->BWTR[Bank]   = 0x0FFFFFFFU;  in FSMC_NORSRAM_DeInit()
276                                           FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank)  in FSMC_NORSRAM_Timing_Init()  argument
288   assert_param(IS_FSMC_NORSRAM_BANK(Bank));  in FSMC_NORSRAM_Timing_Init()
291 …MODIFY_REG(Device->BTCR[Bank + 1U], BTR_CLEAR_MASK, (Timing->AddressSetupTime                     …  in FSMC_NORSRAM_Timing_Init()
315 …                                                 FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank,  in FSMC_NORSRAM_Extended_Timing_Init()  argument
331     assert_param(IS_FSMC_NORSRAM_BANK(Bank));  in FSMC_NORSRAM_Extended_Timing_Init()
334 …MODIFY_REG(Device->BWTR[Bank], BWTR_CLEAR_MASK, (Timing->AddressSetupTime                         …  in FSMC_NORSRAM_Extended_Timing_Init()
342     Device->BWTR[Bank] = 0x0FFFFFFFU;  in FSMC_NORSRAM_Extended_Timing_Init()
372 HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Enable(FSMC_NORSRAM_TypeDef *Device, uint32_t Bank)  in FSMC_NORSRAM_WriteOperation_Enable()  argument
376   assert_param(IS_FSMC_NORSRAM_BANK(Bank));  in FSMC_NORSRAM_WriteOperation_Enable()
379   SET_BIT(Device->BTCR[Bank], FSMC_WRITE_OPERATION_ENABLE);  in FSMC_NORSRAM_WriteOperation_Enable()
390 HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Disable(FSMC_NORSRAM_TypeDef *Device, uint32_t Bank)  in FSMC_NORSRAM_WriteOperation_Disable()  argument
394   assert_param(IS_FSMC_NORSRAM_BANK(Bank));  in FSMC_NORSRAM_WriteOperation_Disable()
397   CLEAR_BIT(Device->BTCR[Bank], FSMC_WRITE_OPERATION_ENABLE);  in FSMC_NORSRAM_WriteOperation_Disable()