504   hi2c->Instance->CR1 |= I2C_CR1_SWRST;  in HAL_I2C_Init()
505   hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;  in HAL_I2C_Init()
533 …MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | …  in HAL_I2C_Init()
1073     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Transmit()
1080     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Transmit()
1109           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Transmit()
1143           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Transmit()
1150     SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Transmit()
1194     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Receive()
1201     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Receive()
1225       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Receive()
1230       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive()
1236       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Receive()
1241       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive()
1244       SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Receive()
1252       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive()
1291           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Receive()
1323           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive()
1342           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Receive()
1389             CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive()
1444     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Transmit()
1451     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Transmit()
1464     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Transmit()
1494         CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Transmit()
1533     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Transmit()
1574     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Receive()
1581     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Receive()
1594     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Receive()
1611         CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Receive()
1644       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Receive()
1653     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Receive()
1706     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Transmit_IT()
1713     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Transmit_IT()
1736     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Transmit_IT()
1783     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Receive_IT()
1790     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Receive_IT()
1815     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive_IT()
1818     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Receive_IT()
1850     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Transmit_IT()
1857     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Transmit_IT()
1870     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Transmit_IT()
1912     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Receive_IT()
1919     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Receive_IT()
1932     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Receive_IT()
1990     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Transmit_DMA()
1997     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Transmit_DMA()
2058         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Transmit_DMA()
2061         SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Transmit_DMA()
2081       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Transmit_DMA()
2084       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Transmit_DMA()
2143     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Receive_DMA()
2150     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Receive_DMA()
2198         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive_DMA()
2201         SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Receive_DMA()
2244       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Receive_DMA()
2247       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Receive_DMA()
2281     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Transmit_DMA()
2288     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Transmit_DMA()
2333       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Transmit_DMA()
2393     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Receive_DMA()
2400     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Receive_DMA()
2445       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Receive_DMA()
2515     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Mem_Write()
2522     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Write()
2548           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Write()
2583         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Write()
2589     SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Write()
2638     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Mem_Read()
2645     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Read()
2669       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Read()
2674       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read()
2680       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Read()
2685       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read()
2688       SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Read()
2732           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Read()
2764           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read()
2783           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Read()
2895     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Mem_Write_IT()
2902     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Write_IT()
2919     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Mem_Write_IT()
2980     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Mem_Read_IT()
2987     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Read_IT()
3004     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read_IT()
3007     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Mem_Read_IT()
3075     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Mem_Write_DMA()
3082     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Write_DMA()
3145           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Write_DMA()
3254     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Mem_Read_DMA()
3261     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Mem_Read_DMA()
3324           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read_DMA()
3338           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Mem_Read_DMA()
3388       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Mem_Read_DMA()
3435     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_IsDeviceReady()
3442     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_IsDeviceReady()
3451       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_IsDeviceReady()
3456         if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in HAL_I2C_IsDeviceReady()
3488         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_IsDeviceReady()
3509         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_IsDeviceReady()
3562 …if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND…  in HAL_I2C_Master_Seq_Transmit_IT()
3586     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Seq_Transmit_IT()
3593     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Seq_Transmit_IT()
3613       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Seq_Transmit_IT()
3658 …if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND…  in HAL_I2C_Master_Seq_Transmit_DMA()
3682     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Seq_Transmit_DMA()
3689     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Seq_Transmit_DMA()
3739         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Transmit_DMA()
3746           SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Seq_Transmit_DMA()
3785       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Transmit_DMA()
3792         SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Seq_Transmit_DMA()
3838 …if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND…  in HAL_I2C_Master_Seq_Receive_IT()
3862     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Seq_Receive_IT()
3869     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Seq_Receive_IT()
3889         CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_IT()
3892         SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Seq_Receive_IT()
3900         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_IT()
3906       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_IT()
3914       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Seq_Receive_IT()
3960 …if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND…  in HAL_I2C_Master_Seq_Receive_DMA()
3984     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Master_Seq_Receive_DMA()
3991     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Seq_Receive_DMA()
4016           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_DMA()
4019           SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Master_Seq_Receive_DMA()
4027           SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_DMA()
4033         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_DMA()
4077           SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Seq_Receive_DMA()
4124       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Seq_Receive_DMA()
4131         SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in HAL_I2C_Master_Seq_Receive_DMA()
4178     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Seq_Transmit_IT()
4185     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Seq_Transmit_IT()
4300     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Seq_Transmit_DMA()
4307     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Seq_Transmit_DMA()
4352       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Seq_Transmit_DMA()
4418     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Seq_Receive_IT()
4425     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Seq_Receive_IT()
4540     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_Slave_Seq_Receive_DMA()
4547     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in HAL_I2C_Slave_Seq_Receive_DMA()
4592       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Slave_Seq_Receive_DMA()
4645     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)  in HAL_I2C_EnableListen_IT()
4652     SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_EnableListen_IT()
4685     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_DisableListen_IT()
4724     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in HAL_I2C_Master_Abort_IT()
4727     SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_Master_Abort_IT()
4987         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in HAL_I2C_ER_IRQHandler()
5272       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_MasterTransmit_TXE()
5377         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_MasterTransmit_BTF()
5451       hi2c->Instance->CR1 |= I2C_CR1_START;  in I2C_MemoryTransmit_TXE_BTF()
5473       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_MemoryTransmit_TXE_BTF()
5533         CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_MasterReceive_RXNE()
5641       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_MasterReceive_BTF()
5659       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_MasterReceive_BTF()
5664       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_MasterReceive_BTF()
5669       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_MasterReceive_BTF()
5838       SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_Master_ADDR()
5850         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_Master_ADDR()
5857           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
5862             CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
5873             SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_Master_ADDR()
5883             CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
5888             SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
5897           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
5903           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_Master_ADDR()
5911           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
5914           SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);  in I2C_Master_ADDR()
5919           SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
5934         SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Master_ADDR()
6151   CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Slave_STOPF()
6326     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Slave_AF()
6353     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_Slave_AF()
6387     hi2c->Instance->CR1 &= ~I2C_CR1_POS;  in I2C_ITError()
6552     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_MasterRequestWrite()
6557     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_MasterRequestWrite()
6567     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in I2C_MasterRequestWrite()
6619   SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_MasterRequestRead()
6625     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_MasterRequestRead()
6630     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_MasterRequestRead()
6640     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in I2C_MasterRequestRead()
6676     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_MasterRequestRead()
6681       if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in I2C_MasterRequestRead()
6716   SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_RequestMemoryWrite()
6721     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in I2C_RequestMemoryWrite()
6746       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_RequestMemoryWrite()
6769         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_RequestMemoryWrite()
6796   SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_RequestMemoryRead()
6799   SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_RequestMemoryRead()
6804     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in I2C_RequestMemoryRead()
6829       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_RequestMemoryRead()
6852         SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_RequestMemoryRead()
6867       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_RequestMemoryRead()
6873   SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);  in I2C_RequestMemoryRead()
6878     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)  in I2C_RequestMemoryRead()
6971       CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_DMAXferCplt()
6981       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_DMAXferCplt()
7055   CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_DMAError()
7095   while (READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP);  in I2C_DMAAbort()
7108   CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_DMAAbort()
7147       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);  in I2C_DMAAbort()
7222       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);  in I2C_WaitOnMasterAddressFlagUntilTimeout()
7403   while (READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP);  in I2C_WaitOnSTOPRequestThroughIT()