49 #if defined (FLASH) || defined (SYSCFG) || defined (DBGMCU) || defined(RI)
1060   MODIFY_REG(RI->ICR,  in LL_RI_SetRemapInputCapture_TIM()
1080   CLEAR_BIT(RI->ICR, (InputCaptureChannel & (RI_ICR_IC4 | RI_ICR_IC3 | RI_ICR_IC2 | RI_ICR_IC1)));  in LL_RI_DisableRemapInputCapture_TIM()
1124   SET_BIT(RI->ASCR1, IOSwitch);  in LL_RI_CloseIOSwitchLinkedToADC()
1168   CLEAR_BIT(RI->ASCR1, IOSwitch);  in LL_RI_OpenIOSwitchLinkedToADC()
1178   SET_BIT(RI->ASCR1, RI_ASCR1_SCM);  in LL_RI_EnableSwitchControlMode()
1188   CLEAR_BIT(RI->ASCR1, RI_ASCR1_SCM);  in LL_RI_DisableSwitchControlMode()
1251   SET_BIT(RI->ASCR2, IOSwitch);  in LL_RI_CloseIOSwitchNotLinkedToADC()
1314   CLEAR_BIT(RI->ASCR2, IOSwitch);  in LL_RI_OpenIOSwitchNotLinkedToADC()
1379   __IO uint32_t *reg = (__IO uint32_t *)(uint32_t)((uint32_t)(&RI->HYSCR1) + (Port >> 1U));  in LL_RI_EnableHysteresis()
1445   __IO uint32_t *reg = (__IO uint32_t *)(uint32_t)((uint32_t)(&RI->HYSCR1) + ((Port >> 1U) << 2U));  in LL_RI_DisableHysteresis()
1507   __IO uint32_t *reg = (__IO uint32_t *)(uint32_t)((uint32_t)(&RI->ASMR1) + ((Port * 3U) << 2));  in LL_RI_ControlSwitchByADC()
1570   __IO uint32_t *reg = (__IO uint32_t *)(uint32_t)((uint32_t)(&RI->ASMR1) + ((Port * 3U) << 2));  in LL_RI_ControlSwitchByTIM()
1633   __IO uint32_t *reg = (__IO uint32_t *)(uint32_t)((uint32_t)(&RI->CMR1) + ((Port * 3U) << 2));  in LL_RI_MaskChannelDuringAcquisition()
1696   __IO uint32_t *reg = (__IO uint32_t *)(uint32_t)((uint32_t)(&RI->CMR1) + ((Port * 3U) << 2));  in LL_RI_UnmaskChannelDuringAcquisition()
1759   __IO uint32_t *reg = (__IO uint32_t *)(uint32_t)((uint32_t)(&RI->CICR1) + ((Port * 3U) << 2));  in LL_RI_IdentifyChannelIO()
1822   __IO uint32_t *reg = (__IO uint32_t *)(uint32_t)((uint32_t)(&RI->CICR1) + ((Port * 3U) << 2));  in LL_RI_IdentifySamplingCapacitorIO()