560   uint32_t tmpccmr1;  in LL_TIM_ENCODER_Init()  local
579   tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);  in LL_TIM_ENCODER_Init()
585   tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F  | TIM_CCMR1_IC1PSC);  in LL_TIM_ENCODER_Init()
586   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1ActiveInput >> 16U);  in LL_TIM_ENCODER_Init()
587   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Filter >> 16U);  in LL_TIM_ENCODER_Init()
588   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Prescaler >> 16U);  in LL_TIM_ENCODER_Init()
591   tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC2S | TIM_CCMR1_IC2F  | TIM_CCMR1_IC2PSC);  in LL_TIM_ENCODER_Init()
592   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2ActiveInput >> 8U);  in LL_TIM_ENCODER_Init()
593   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Filter >> 8U);  in LL_TIM_ENCODER_Init()
594   tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Prescaler >> 8U);  in LL_TIM_ENCODER_Init()
606   LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);  in LL_TIM_ENCODER_Init()
654   uint32_t tmpccmr1;  in LL_TIM_HALLSENSOR_Init()  local
671   tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);  in LL_TIM_HALLSENSOR_Init()
691   tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F  | TIM_CCMR1_IC1PSC);  in LL_TIM_HALLSENSOR_Init()
692   tmpccmr1 |= (uint32_t)(LL_TIM_ACTIVEINPUT_TRC >> 16U);  in LL_TIM_HALLSENSOR_Init()
693   tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Filter >> 16U);  in LL_TIM_HALLSENSOR_Init()
694   tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Prescaler >> 16U);  in LL_TIM_HALLSENSOR_Init()
697   tmpccmr1 &= (uint32_t)~(TIM_CCMR1_OC2M | TIM_CCMR1_OC2FE  | TIM_CCMR1_OC2PE  | TIM_CCMR1_OC2CE);  in LL_TIM_HALLSENSOR_Init()
698   tmpccmr1 |= (uint32_t)(LL_TIM_OCMODE_PWM2 << 8U);  in LL_TIM_HALLSENSOR_Init()
712   LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);  in LL_TIM_HALLSENSOR_Init()
847   uint32_t tmpccmr1;  in OC1Config()  local
867   tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);  in OC1Config()
870   CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC1S);  in OC1Config()
873   MODIFY_REG(tmpccmr1, TIM_CCMR1_OC1M, TIM_OCInitStruct->OCMode);  in OC1Config()
905   LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);  in OC1Config()
926   uint32_t tmpccmr1;  in OC2Config()  local
946   tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);  in OC2Config()
949   CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC2S);  in OC2Config()
952   MODIFY_REG(tmpccmr1, TIM_CCMR1_OC2M, TIM_OCInitStruct->OCMode << 8U);  in OC2Config()
984   LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);  in OC2Config()