Lines Matching refs:DLYBx
101 HAL_StatusTypeDef DelayBlock_Enable(DLYB_TypeDef *DLYBx) in DelayBlock_Enable() argument
111 DLYBx->CR = DLYB_CR_DEN | DLYB_CR_SEN; in DelayBlock_Enable()
121 DLYBx->CFGR = DLYB_MAX_SELECT | (unit_current << DLYB_CFGR_UNIT_Pos); in DelayBlock_Enable()
125 while ((DLYBx->CFGR & DLYB_CFGR_LNGF) == 0U) in DelayBlock_Enable()
134 if ((DLYBx->CFGR & lng_mask) != 0U) in DelayBlock_Enable()
143 if((DLYBx->CFGR & lng_mask ) == 0U) in DelayBlock_Enable()
158 DLYBx->CR = 0U; in DelayBlock_Enable()
159 DLYBx->CR = DLYB_CR_DEN | DLYB_CR_SEN; in DelayBlock_Enable()
160 DLYBx->CFGR = sel | (unit << DLYB_CFGR_UNIT_Pos); in DelayBlock_Enable()
161 DLYBx->CR = DLYB_CR_DEN; in DelayBlock_Enable()
171 HAL_StatusTypeDef DelayBlock_Disable(DLYB_TypeDef *DLYBx) in DelayBlock_Disable() argument
174 DLYBx->CR = 0U; in DelayBlock_Disable()
185 HAL_StatusTypeDef DelayBlock_Configure(DLYB_TypeDef *DLYBx,uint32_t PhaseSel, uint32_t Units ) in DelayBlock_Configure() argument
189 DLYBx->CR = 0U; in DelayBlock_Configure()
190 DLYBx->CR = DLYB_CR_DEN | DLYB_CR_SEN; in DelayBlock_Configure()
191 DLYBx->CFGR = PhaseSel | (Units << DLYB_CFGR_UNIT_Pos); in DelayBlock_Configure()
192 DLYBx->CR = DLYB_CR_DEN; in DelayBlock_Configure()