Lines Matching refs:hqspi
275 static HAL_StatusTypeDef QSPI_WaitFlagStateUntilTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Flag, F…
276 static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t FunctionalMod…
306 HAL_StatusTypeDef HAL_QSPI_Init(QSPI_HandleTypeDef *hqspi) in HAL_QSPI_Init() argument
312 if(hqspi == NULL) in HAL_QSPI_Init()
318 assert_param(IS_QSPI_ALL_INSTANCE(hqspi->Instance)); in HAL_QSPI_Init()
319 assert_param(IS_QSPI_CLOCK_PRESCALER(hqspi->Init.ClockPrescaler)); in HAL_QSPI_Init()
320 assert_param(IS_QSPI_FIFO_THRESHOLD(hqspi->Init.FifoThreshold)); in HAL_QSPI_Init()
321 assert_param(IS_QSPI_SSHIFT(hqspi->Init.SampleShifting)); in HAL_QSPI_Init()
322 assert_param(IS_QSPI_FLASH_SIZE(hqspi->Init.FlashSize)); in HAL_QSPI_Init()
323 assert_param(IS_QSPI_CS_HIGH_TIME(hqspi->Init.ChipSelectHighTime)); in HAL_QSPI_Init()
324 assert_param(IS_QSPI_CLOCK_MODE(hqspi->Init.ClockMode)); in HAL_QSPI_Init()
325 assert_param(IS_QSPI_DUAL_FLASH_MODE(hqspi->Init.DualFlash)); in HAL_QSPI_Init()
327 if (hqspi->Init.DualFlash != QSPI_DUALFLASH_ENABLE ) in HAL_QSPI_Init()
329 assert_param(IS_QSPI_FLASH_ID(hqspi->Init.FlashID)); in HAL_QSPI_Init()
332 if(hqspi->State == HAL_QSPI_STATE_RESET) in HAL_QSPI_Init()
337 hqspi->ErrorCallback = HAL_QSPI_ErrorCallback; in HAL_QSPI_Init()
338 hqspi->AbortCpltCallback = HAL_QSPI_AbortCpltCallback; in HAL_QSPI_Init()
339 hqspi->FifoThresholdCallback = HAL_QSPI_FifoThresholdCallback; in HAL_QSPI_Init()
340 hqspi->CmdCpltCallback = HAL_QSPI_CmdCpltCallback; in HAL_QSPI_Init()
341 hqspi->RxCpltCallback = HAL_QSPI_RxCpltCallback; in HAL_QSPI_Init()
342 hqspi->TxCpltCallback = HAL_QSPI_TxCpltCallback; in HAL_QSPI_Init()
343 hqspi->StatusMatchCallback = HAL_QSPI_StatusMatchCallback; in HAL_QSPI_Init()
344 hqspi->TimeOutCallback = HAL_QSPI_TimeOutCallback; in HAL_QSPI_Init()
346 if(hqspi->MspInitCallback == NULL) in HAL_QSPI_Init()
348 hqspi->MspInitCallback = HAL_QSPI_MspInit; in HAL_QSPI_Init()
352 hqspi->MspInitCallback(hqspi); in HAL_QSPI_Init()
355 HAL_QSPI_MspInit(hqspi); in HAL_QSPI_Init()
359 HAL_QSPI_SetTimeout(hqspi, HAL_QSPI_TIMEOUT_DEFAULT_VALUE); in HAL_QSPI_Init()
363 MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_FTHRES, in HAL_QSPI_Init()
364 ((hqspi->Init.FifoThreshold - 1U) << QUADSPI_CR_FTHRES_Pos)); in HAL_QSPI_Init()
367 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, hqspi->Timeout); in HAL_QSPI_Init()
372 …MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PRESCALER | QUADSPI_CR_SSHIFT | QUADSPI_CR_FSEL | QUAD… in HAL_QSPI_Init()
373 ((hqspi->Init.ClockPrescaler << QUADSPI_CR_PRESCALER_Pos) | in HAL_QSPI_Init()
374 hqspi->Init.SampleShifting | hqspi->Init.FlashID | hqspi->Init.DualFlash)); in HAL_QSPI_Init()
377 MODIFY_REG(hqspi->Instance->DCR, (QUADSPI_DCR_FSIZE | QUADSPI_DCR_CSHT | QUADSPI_DCR_CKMODE), in HAL_QSPI_Init()
378 ((hqspi->Init.FlashSize << QUADSPI_DCR_FSIZE_Pos) | in HAL_QSPI_Init()
379 hqspi->Init.ChipSelectHighTime | hqspi->Init.ClockMode)); in HAL_QSPI_Init()
382 __HAL_QSPI_ENABLE(hqspi); in HAL_QSPI_Init()
385 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; in HAL_QSPI_Init()
388 hqspi->State = HAL_QSPI_STATE_READY; in HAL_QSPI_Init()
400 HAL_StatusTypeDef HAL_QSPI_DeInit(QSPI_HandleTypeDef *hqspi) in HAL_QSPI_DeInit() argument
403 if(hqspi == NULL) in HAL_QSPI_DeInit()
409 __HAL_QSPI_DISABLE(hqspi); in HAL_QSPI_DeInit()
412 if(hqspi->MspDeInitCallback == NULL) in HAL_QSPI_DeInit()
414 hqspi->MspDeInitCallback = HAL_QSPI_MspDeInit; in HAL_QSPI_DeInit()
418 hqspi->MspDeInitCallback(hqspi); in HAL_QSPI_DeInit()
421 HAL_QSPI_MspDeInit(hqspi); in HAL_QSPI_DeInit()
425 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; in HAL_QSPI_DeInit()
428 hqspi->State = HAL_QSPI_STATE_RESET; in HAL_QSPI_DeInit()
438 __weak void HAL_QSPI_MspInit(QSPI_HandleTypeDef *hqspi) in HAL_QSPI_MspInit() argument
441 UNUSED(hqspi); in HAL_QSPI_MspInit()
453 __weak void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef *hqspi) in HAL_QSPI_MspDeInit() argument
456 UNUSED(hqspi); in HAL_QSPI_MspDeInit()
492 void HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi) in HAL_QSPI_IRQHandler() argument
495 uint32_t flag = READ_REG(hqspi->Instance->SR); in HAL_QSPI_IRQHandler()
496 uint32_t itsource = READ_REG(hqspi->Instance->CR); in HAL_QSPI_IRQHandler()
501 data_reg = &hqspi->Instance->DR; in HAL_QSPI_IRQHandler()
503 if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) in HAL_QSPI_IRQHandler()
506 while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != RESET) in HAL_QSPI_IRQHandler()
508 if (hqspi->TxXferCount > 0U) in HAL_QSPI_IRQHandler()
511 *((__IO uint8_t *)data_reg) = *hqspi->pTxBuffPtr; in HAL_QSPI_IRQHandler()
512 hqspi->pTxBuffPtr++; in HAL_QSPI_IRQHandler()
513 hqspi->TxXferCount--; in HAL_QSPI_IRQHandler()
519 __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_FT); in HAL_QSPI_IRQHandler()
524 else if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_RX) in HAL_QSPI_IRQHandler()
527 while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != RESET) in HAL_QSPI_IRQHandler()
529 if (hqspi->RxXferCount > 0U) in HAL_QSPI_IRQHandler()
532 *hqspi->pRxBuffPtr = *((__IO uint8_t *)data_reg); in HAL_QSPI_IRQHandler()
533 hqspi->pRxBuffPtr++; in HAL_QSPI_IRQHandler()
534 hqspi->RxXferCount--; in HAL_QSPI_IRQHandler()
540 __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_FT); in HAL_QSPI_IRQHandler()
552 hqspi->FifoThresholdCallback(hqspi); in HAL_QSPI_IRQHandler()
554 HAL_QSPI_FifoThresholdCallback(hqspi); in HAL_QSPI_IRQHandler()
562 WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_TC); in HAL_QSPI_IRQHandler()
565 __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_TC | QSPI_IT_TE | QSPI_IT_FT); in HAL_QSPI_IRQHandler()
568 if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) in HAL_QSPI_IRQHandler()
570 if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U) in HAL_QSPI_IRQHandler()
574 CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); in HAL_QSPI_IRQHandler()
577 __HAL_MDMA_DISABLE(hqspi->hmdma); in HAL_QSPI_IRQHandler()
582 hqspi->State = HAL_QSPI_STATE_READY; in HAL_QSPI_IRQHandler()
586 hqspi->TxCpltCallback(hqspi); in HAL_QSPI_IRQHandler()
588 HAL_QSPI_TxCpltCallback(hqspi); in HAL_QSPI_IRQHandler()
591 else if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_RX) in HAL_QSPI_IRQHandler()
593 if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U) in HAL_QSPI_IRQHandler()
597 CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); in HAL_QSPI_IRQHandler()
600 __HAL_MDMA_DISABLE(hqspi->hmdma); in HAL_QSPI_IRQHandler()
604 data_reg = &hqspi->Instance->DR; in HAL_QSPI_IRQHandler()
605 while(READ_BIT(hqspi->Instance->SR, QUADSPI_SR_FLEVEL) != 0U) in HAL_QSPI_IRQHandler()
607 if (hqspi->RxXferCount > 0U) in HAL_QSPI_IRQHandler()
610 *hqspi->pRxBuffPtr = *((__IO uint8_t *)data_reg); in HAL_QSPI_IRQHandler()
611 hqspi->pRxBuffPtr++; in HAL_QSPI_IRQHandler()
612 hqspi->RxXferCount--; in HAL_QSPI_IRQHandler()
624 hqspi->State = HAL_QSPI_STATE_READY; in HAL_QSPI_IRQHandler()
628 hqspi->RxCpltCallback(hqspi); in HAL_QSPI_IRQHandler()
630 HAL_QSPI_RxCpltCallback(hqspi); in HAL_QSPI_IRQHandler()
633 else if(hqspi->State == HAL_QSPI_STATE_BUSY) in HAL_QSPI_IRQHandler()
636 hqspi->State = HAL_QSPI_STATE_READY; in HAL_QSPI_IRQHandler()
640 hqspi->CmdCpltCallback(hqspi); in HAL_QSPI_IRQHandler()
642 HAL_QSPI_CmdCpltCallback(hqspi); in HAL_QSPI_IRQHandler()
645 else if(hqspi->State == HAL_QSPI_STATE_ABORT) in HAL_QSPI_IRQHandler()
648 CLEAR_BIT(hqspi->Instance->CCR, QUADSPI_CCR_FMODE); in HAL_QSPI_IRQHandler()
651 hqspi->State = HAL_QSPI_STATE_READY; in HAL_QSPI_IRQHandler()
653 if (hqspi->ErrorCode == HAL_QSPI_ERROR_NONE) in HAL_QSPI_IRQHandler()
659 hqspi->AbortCpltCallback(hqspi); in HAL_QSPI_IRQHandler()
661 HAL_QSPI_AbortCpltCallback(hqspi); in HAL_QSPI_IRQHandler()
670 hqspi->ErrorCallback(hqspi); in HAL_QSPI_IRQHandler()
672 HAL_QSPI_ErrorCallback(hqspi); in HAL_QSPI_IRQHandler()
686 WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_SM); in HAL_QSPI_IRQHandler()
689 if(READ_BIT(hqspi->Instance->CR, QUADSPI_CR_APMS) != 0U) in HAL_QSPI_IRQHandler()
692 __HAL_QSPI_DISABLE_IT(hqspi, (QSPI_IT_SM | QSPI_IT_TE)); in HAL_QSPI_IRQHandler()
695 hqspi->State = HAL_QSPI_STATE_READY; in HAL_QSPI_IRQHandler()
700 hqspi->StatusMatchCallback(hqspi); in HAL_QSPI_IRQHandler()
702 HAL_QSPI_StatusMatchCallback(hqspi); in HAL_QSPI_IRQHandler()
710 WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_TE); in HAL_QSPI_IRQHandler()
713 __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_SM | QSPI_IT_TC | QSPI_IT_TE | QSPI_IT_FT); in HAL_QSPI_IRQHandler()
716 hqspi->ErrorCode |= HAL_QSPI_ERROR_TRANSFER; in HAL_QSPI_IRQHandler()
718 if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U) in HAL_QSPI_IRQHandler()
722 CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); in HAL_QSPI_IRQHandler()
725 hqspi->hmdma->XferAbortCallback = QSPI_DMAAbortCplt; in HAL_QSPI_IRQHandler()
726 if (HAL_MDMA_Abort_IT(hqspi->hmdma) != HAL_OK) in HAL_QSPI_IRQHandler()
729 hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA; in HAL_QSPI_IRQHandler()
732 hqspi->State = HAL_QSPI_STATE_READY; in HAL_QSPI_IRQHandler()
736 hqspi->ErrorCallback(hqspi); in HAL_QSPI_IRQHandler()
738 HAL_QSPI_ErrorCallback(hqspi); in HAL_QSPI_IRQHandler()
745 hqspi->State = HAL_QSPI_STATE_READY; in HAL_QSPI_IRQHandler()
749 hqspi->ErrorCallback(hqspi); in HAL_QSPI_IRQHandler()
751 HAL_QSPI_ErrorCallback(hqspi); in HAL_QSPI_IRQHandler()
760 WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_TO); in HAL_QSPI_IRQHandler()
764 hqspi->TimeOutCallback(hqspi); in HAL_QSPI_IRQHandler()
766 HAL_QSPI_TimeOutCallback(hqspi); in HAL_QSPI_IRQHandler()
784 HAL_StatusTypeDef HAL_QSPI_Command(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t Ti… in HAL_QSPI_Command() argument
816 __HAL_LOCK(hqspi); in HAL_QSPI_Command()
818 if(hqspi->State == HAL_QSPI_STATE_READY) in HAL_QSPI_Command()
820 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; in HAL_QSPI_Command()
823 hqspi->State = HAL_QSPI_STATE_BUSY; in HAL_QSPI_Command()
826 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, Timeout); in HAL_QSPI_Command()
831 QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE); in HAL_QSPI_Command()
837 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, tickstart, Timeout); in HAL_QSPI_Command()
841 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); in HAL_QSPI_Command()
844 hqspi->State = HAL_QSPI_STATE_READY; in HAL_QSPI_Command()
850 hqspi->State = HAL_QSPI_STATE_READY; in HAL_QSPI_Command()
860 __HAL_UNLOCK(hqspi); in HAL_QSPI_Command()
873 HAL_StatusTypeDef HAL_QSPI_Command_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd) in HAL_QSPI_Command_IT() argument
905 __HAL_LOCK(hqspi); in HAL_QSPI_Command_IT()
907 if(hqspi->State == HAL_QSPI_STATE_READY) in HAL_QSPI_Command_IT()
909 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; in HAL_QSPI_Command_IT()
912 hqspi->State = HAL_QSPI_STATE_BUSY; in HAL_QSPI_Command_IT()
915 … status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, hqspi->Timeout); in HAL_QSPI_Command_IT()
922 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TE | QSPI_FLAG_TC); in HAL_QSPI_Command_IT()
926 QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE); in HAL_QSPI_Command_IT()
933 __HAL_UNLOCK(hqspi); in HAL_QSPI_Command_IT()
936 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_TC); in HAL_QSPI_Command_IT()
941 hqspi->State = HAL_QSPI_STATE_READY; in HAL_QSPI_Command_IT()
944 __HAL_UNLOCK(hqspi); in HAL_QSPI_Command_IT()
950 __HAL_UNLOCK(hqspi); in HAL_QSPI_Command_IT()
958 __HAL_UNLOCK(hqspi); in HAL_QSPI_Command_IT()
973 HAL_StatusTypeDef HAL_QSPI_Transmit(QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout) in HAL_QSPI_Transmit() argument
977 __IO uint32_t *data_reg = &hqspi->Instance->DR; in HAL_QSPI_Transmit()
980 __HAL_LOCK(hqspi); in HAL_QSPI_Transmit()
982 if(hqspi->State == HAL_QSPI_STATE_READY) in HAL_QSPI_Transmit()
984 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; in HAL_QSPI_Transmit()
989 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX; in HAL_QSPI_Transmit()
992 hqspi->TxXferCount = READ_REG(hqspi->Instance->DLR) + 1U; in HAL_QSPI_Transmit()
993 hqspi->TxXferSize = READ_REG(hqspi->Instance->DLR) + 1U; in HAL_QSPI_Transmit()
994 hqspi->pTxBuffPtr = pData; in HAL_QSPI_Transmit()
997 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE); in HAL_QSPI_Transmit()
999 while(hqspi->TxXferCount > 0U) in HAL_QSPI_Transmit()
1002 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_FT, SET, tickstart, Timeout); in HAL_QSPI_Transmit()
1009 *((__IO uint8_t *)data_reg) = *hqspi->pTxBuffPtr; in HAL_QSPI_Transmit()
1010 hqspi->pTxBuffPtr++; in HAL_QSPI_Transmit()
1011 hqspi->TxXferCount--; in HAL_QSPI_Transmit()
1017 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, tickstart, Timeout); in HAL_QSPI_Transmit()
1022 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); in HAL_QSPI_Transmit()
1028 hqspi->State = HAL_QSPI_STATE_READY; in HAL_QSPI_Transmit()
1032 hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM; in HAL_QSPI_Transmit()
1042 __HAL_UNLOCK(hqspi); in HAL_QSPI_Transmit()
1056 HAL_StatusTypeDef HAL_QSPI_Receive(QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout) in HAL_QSPI_Receive() argument
1060 uint32_t addr_reg = READ_REG(hqspi->Instance->AR); in HAL_QSPI_Receive()
1061 __IO uint32_t *data_reg = &hqspi->Instance->DR; in HAL_QSPI_Receive()
1064 __HAL_LOCK(hqspi); in HAL_QSPI_Receive()
1066 if(hqspi->State == HAL_QSPI_STATE_READY) in HAL_QSPI_Receive()
1068 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; in HAL_QSPI_Receive()
1073 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX; in HAL_QSPI_Receive()
1076 hqspi->RxXferCount = READ_REG(hqspi->Instance->DLR) + 1U; in HAL_QSPI_Receive()
1077 hqspi->RxXferSize = READ_REG(hqspi->Instance->DLR) + 1U; in HAL_QSPI_Receive()
1078 hqspi->pRxBuffPtr = pData; in HAL_QSPI_Receive()
1081 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ); in HAL_QSPI_Receive()
1084 WRITE_REG(hqspi->Instance->AR, addr_reg); in HAL_QSPI_Receive()
1086 while(hqspi->RxXferCount > 0U) in HAL_QSPI_Receive()
1089 …status = QSPI_WaitFlagStateUntilTimeout(hqspi, (QSPI_FLAG_FT | QSPI_FLAG_TC), SET, tickstart, Time… in HAL_QSPI_Receive()
1096 *hqspi->pRxBuffPtr = *((__IO uint8_t *)data_reg); in HAL_QSPI_Receive()
1097 hqspi->pRxBuffPtr++; in HAL_QSPI_Receive()
1098 hqspi->RxXferCount--; in HAL_QSPI_Receive()
1104 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, tickstart, Timeout); in HAL_QSPI_Receive()
1109 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); in HAL_QSPI_Receive()
1115 hqspi->State = HAL_QSPI_STATE_READY; in HAL_QSPI_Receive()
1119 hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM; in HAL_QSPI_Receive()
1129 __HAL_UNLOCK(hqspi); in HAL_QSPI_Receive()
1141 HAL_StatusTypeDef HAL_QSPI_Transmit_IT(QSPI_HandleTypeDef *hqspi, uint8_t *pData) in HAL_QSPI_Transmit_IT() argument
1146 __HAL_LOCK(hqspi); in HAL_QSPI_Transmit_IT()
1148 if(hqspi->State == HAL_QSPI_STATE_READY) in HAL_QSPI_Transmit_IT()
1150 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; in HAL_QSPI_Transmit_IT()
1155 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX; in HAL_QSPI_Transmit_IT()
1158 hqspi->TxXferCount = READ_REG(hqspi->Instance->DLR) + 1U; in HAL_QSPI_Transmit_IT()
1159 hqspi->TxXferSize = READ_REG(hqspi->Instance->DLR) + 1U; in HAL_QSPI_Transmit_IT()
1160 hqspi->pTxBuffPtr = pData; in HAL_QSPI_Transmit_IT()
1163 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TE | QSPI_FLAG_TC); in HAL_QSPI_Transmit_IT()
1166 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE); in HAL_QSPI_Transmit_IT()
1169 __HAL_UNLOCK(hqspi); in HAL_QSPI_Transmit_IT()
1172 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_FT | QSPI_IT_TC); in HAL_QSPI_Transmit_IT()
1176 hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM; in HAL_QSPI_Transmit_IT()
1180 __HAL_UNLOCK(hqspi); in HAL_QSPI_Transmit_IT()
1188 __HAL_UNLOCK(hqspi); in HAL_QSPI_Transmit_IT()
1201 HAL_StatusTypeDef HAL_QSPI_Receive_IT(QSPI_HandleTypeDef *hqspi, uint8_t *pData) in HAL_QSPI_Receive_IT() argument
1204 uint32_t addr_reg = READ_REG(hqspi->Instance->AR); in HAL_QSPI_Receive_IT()
1207 __HAL_LOCK(hqspi); in HAL_QSPI_Receive_IT()
1209 if(hqspi->State == HAL_QSPI_STATE_READY) in HAL_QSPI_Receive_IT()
1211 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; in HAL_QSPI_Receive_IT()
1216 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX; in HAL_QSPI_Receive_IT()
1219 hqspi->RxXferCount = READ_REG(hqspi->Instance->DLR) + 1U; in HAL_QSPI_Receive_IT()
1220 hqspi->RxXferSize = READ_REG(hqspi->Instance->DLR) + 1U; in HAL_QSPI_Receive_IT()
1221 hqspi->pRxBuffPtr = pData; in HAL_QSPI_Receive_IT()
1224 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TE | QSPI_FLAG_TC); in HAL_QSPI_Receive_IT()
1227 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ); in HAL_QSPI_Receive_IT()
1230 WRITE_REG(hqspi->Instance->AR, addr_reg); in HAL_QSPI_Receive_IT()
1233 __HAL_UNLOCK(hqspi); in HAL_QSPI_Receive_IT()
1236 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_FT | QSPI_IT_TC); in HAL_QSPI_Receive_IT()
1240 hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM; in HAL_QSPI_Receive_IT()
1244 __HAL_UNLOCK(hqspi); in HAL_QSPI_Receive_IT()
1252 __HAL_UNLOCK(hqspi); in HAL_QSPI_Receive_IT()
1265 HAL_StatusTypeDef HAL_QSPI_Transmit_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pData) in HAL_QSPI_Transmit_DMA() argument
1268 uint32_t data_size = (READ_REG(hqspi->Instance->DLR) + 1U); in HAL_QSPI_Transmit_DMA()
1271 __HAL_LOCK(hqspi); in HAL_QSPI_Transmit_DMA()
1273 if(hqspi->State == HAL_QSPI_STATE_READY) in HAL_QSPI_Transmit_DMA()
1276 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; in HAL_QSPI_Transmit_DMA()
1281 hqspi->TxXferCount = data_size; in HAL_QSPI_Transmit_DMA()
1284 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX; in HAL_QSPI_Transmit_DMA()
1287 __HAL_QSPI_CLEAR_FLAG(hqspi, (QSPI_FLAG_TE | QSPI_FLAG_TC)); in HAL_QSPI_Transmit_DMA()
1290 hqspi->TxXferSize = hqspi->TxXferCount; in HAL_QSPI_Transmit_DMA()
1291 hqspi->pTxBuffPtr = pData; in HAL_QSPI_Transmit_DMA()
1294 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE); in HAL_QSPI_Transmit_DMA()
1297 hqspi->hmdma->XferCpltCallback = QSPI_DMATxCplt; in HAL_QSPI_Transmit_DMA()
1300 hqspi->hmdma->XferErrorCallback = QSPI_DMAError; in HAL_QSPI_Transmit_DMA()
1303 hqspi->hmdma->XferAbortCallback = NULL; in HAL_QSPI_Transmit_DMA()
1306 …MODIFY_REG(hqspi->hmdma->Instance->CTCR, (MDMA_CTCR_DINC | MDMA_CTCR_DINCOS) ,MDMA_DEST_INC_DISABL… in HAL_QSPI_Transmit_DMA()
1309 if (hqspi->hmdma->Init.SourceDataSize == MDMA_SRC_DATASIZE_BYTE) in HAL_QSPI_Transmit_DMA()
1311 … MODIFY_REG(hqspi->hmdma->Instance->CTCR, (MDMA_CTCR_SINC | MDMA_CTCR_SINCOS) , MDMA_SRC_INC_BYTE); in HAL_QSPI_Transmit_DMA()
1313 else if (hqspi->hmdma->Init.SourceDataSize == MDMA_SRC_DATASIZE_HALFWORD) in HAL_QSPI_Transmit_DMA()
1315 …MODIFY_REG(hqspi->hmdma->Instance->CTCR, (MDMA_CTCR_SINC | MDMA_CTCR_SINCOS) , MDMA_SRC_INC_HALFWO… in HAL_QSPI_Transmit_DMA()
1317 else if (hqspi->hmdma->Init.SourceDataSize == MDMA_SRC_DATASIZE_WORD) in HAL_QSPI_Transmit_DMA()
1319 … MODIFY_REG(hqspi->hmdma->Instance->CTCR, (MDMA_CTCR_SINC | MDMA_CTCR_SINCOS) , MDMA_SRC_INC_WORD); in HAL_QSPI_Transmit_DMA()
1324 hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA; in HAL_QSPI_Transmit_DMA()
1329 …if (HAL_MDMA_Start_IT(hqspi->hmdma, (uint32_t)pData, (uint32_t)&hqspi->Instance->DR, hqspi->TxXfer… in HAL_QSPI_Transmit_DMA()
1332 __HAL_UNLOCK(hqspi); in HAL_QSPI_Transmit_DMA()
1335 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE); in HAL_QSPI_Transmit_DMA()
1339 SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); in HAL_QSPI_Transmit_DMA()
1344 hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA; in HAL_QSPI_Transmit_DMA()
1345 hqspi->State = HAL_QSPI_STATE_READY; in HAL_QSPI_Transmit_DMA()
1348 __HAL_UNLOCK(hqspi); in HAL_QSPI_Transmit_DMA()
1353 hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM; in HAL_QSPI_Transmit_DMA()
1357 __HAL_UNLOCK(hqspi); in HAL_QSPI_Transmit_DMA()
1365 __HAL_UNLOCK(hqspi); in HAL_QSPI_Transmit_DMA()
1378 HAL_StatusTypeDef HAL_QSPI_Receive_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pData) in HAL_QSPI_Receive_DMA() argument
1381 uint32_t addr_reg = READ_REG(hqspi->Instance->AR); in HAL_QSPI_Receive_DMA()
1382 uint32_t data_size = (READ_REG(hqspi->Instance->DLR) + 1U); in HAL_QSPI_Receive_DMA()
1385 __HAL_LOCK(hqspi); in HAL_QSPI_Receive_DMA()
1387 if(hqspi->State == HAL_QSPI_STATE_READY) in HAL_QSPI_Receive_DMA()
1390 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; in HAL_QSPI_Receive_DMA()
1395 hqspi->RxXferCount = data_size; in HAL_QSPI_Receive_DMA()
1397 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX; in HAL_QSPI_Receive_DMA()
1400 __HAL_QSPI_CLEAR_FLAG(hqspi, (QSPI_FLAG_TE | QSPI_FLAG_TC)); in HAL_QSPI_Receive_DMA()
1403 hqspi->RxXferSize = hqspi->RxXferCount; in HAL_QSPI_Receive_DMA()
1404 hqspi->pRxBuffPtr = pData; in HAL_QSPI_Receive_DMA()
1407 hqspi->hmdma->XferCpltCallback = QSPI_DMARxCplt; in HAL_QSPI_Receive_DMA()
1410 hqspi->hmdma->XferErrorCallback = QSPI_DMAError; in HAL_QSPI_Receive_DMA()
1413 hqspi->hmdma->XferAbortCallback = NULL; in HAL_QSPI_Receive_DMA()
1416 …MODIFY_REG(hqspi->hmdma->Instance->CTCR, (MDMA_CTCR_SINC | MDMA_CTCR_SINCOS) , MDMA_SRC_INC_DISABL… in HAL_QSPI_Receive_DMA()
1419 if (hqspi->hmdma->Init.DestDataSize == MDMA_DEST_DATASIZE_BYTE) in HAL_QSPI_Receive_DMA()
1421 …MODIFY_REG(hqspi->hmdma->Instance->CTCR, (MDMA_CTCR_DINC | MDMA_CTCR_DINCOS) , MDMA_DEST_INC_BYTE); in HAL_QSPI_Receive_DMA()
1423 else if (hqspi->hmdma->Init.DestDataSize == MDMA_DEST_DATASIZE_HALFWORD) in HAL_QSPI_Receive_DMA()
1425 …MODIFY_REG(hqspi->hmdma->Instance->CTCR, (MDMA_CTCR_DINC | MDMA_CTCR_DINCOS) , MDMA_DEST_INC_HALFW… in HAL_QSPI_Receive_DMA()
1427 else if (hqspi->hmdma->Init.DestDataSize == MDMA_DEST_DATASIZE_WORD) in HAL_QSPI_Receive_DMA()
1429 …MODIFY_REG(hqspi->hmdma->Instance->CTCR, (MDMA_CTCR_DINC | MDMA_CTCR_DINCOS) , MDMA_DEST_INC_WORD); in HAL_QSPI_Receive_DMA()
1434 hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA; in HAL_QSPI_Receive_DMA()
1438 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ); in HAL_QSPI_Receive_DMA()
1441 WRITE_REG(hqspi->Instance->AR, addr_reg); in HAL_QSPI_Receive_DMA()
1444 …if (HAL_MDMA_Start_IT(hqspi->hmdma, (uint32_t)&hqspi->Instance->DR, (uint32_t)pData, hqspi->RxXfer… in HAL_QSPI_Receive_DMA()
1447 __HAL_UNLOCK(hqspi); in HAL_QSPI_Receive_DMA()
1450 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE); in HAL_QSPI_Receive_DMA()
1454 SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); in HAL_QSPI_Receive_DMA()
1459 hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA; in HAL_QSPI_Receive_DMA()
1460 hqspi->State = HAL_QSPI_STATE_READY; in HAL_QSPI_Receive_DMA()
1463 __HAL_UNLOCK(hqspi); in HAL_QSPI_Receive_DMA()
1468 hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM; in HAL_QSPI_Receive_DMA()
1472 __HAL_UNLOCK(hqspi); in HAL_QSPI_Receive_DMA()
1480 __HAL_UNLOCK(hqspi); in HAL_QSPI_Receive_DMA()
1495 HAL_StatusTypeDef HAL_QSPI_AutoPolling(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_Au… in HAL_QSPI_AutoPolling() argument
1531 __HAL_LOCK(hqspi); in HAL_QSPI_AutoPolling()
1533 if(hqspi->State == HAL_QSPI_STATE_READY) in HAL_QSPI_AutoPolling()
1535 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; in HAL_QSPI_AutoPolling()
1538 hqspi->State = HAL_QSPI_STATE_BUSY_AUTO_POLLING; in HAL_QSPI_AutoPolling()
1541 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, Timeout); in HAL_QSPI_AutoPolling()
1546 WRITE_REG(hqspi->Instance->PSMAR, cfg->Match); in HAL_QSPI_AutoPolling()
1549 WRITE_REG(hqspi->Instance->PSMKR, cfg->Mask); in HAL_QSPI_AutoPolling()
1552 WRITE_REG(hqspi->Instance->PIR, cfg->Interval); in HAL_QSPI_AutoPolling()
1556 MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PMM | QUADSPI_CR_APMS), in HAL_QSPI_AutoPolling()
1561 QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_AUTO_POLLING); in HAL_QSPI_AutoPolling()
1564 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_SM, SET, tickstart, Timeout); in HAL_QSPI_AutoPolling()
1568 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_SM); in HAL_QSPI_AutoPolling()
1571 hqspi->State = HAL_QSPI_STATE_READY; in HAL_QSPI_AutoPolling()
1581 __HAL_UNLOCK(hqspi); in HAL_QSPI_AutoPolling()
1595 HAL_StatusTypeDef HAL_QSPI_AutoPolling_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI… in HAL_QSPI_AutoPolling_IT() argument
1632 __HAL_LOCK(hqspi); in HAL_QSPI_AutoPolling_IT()
1634 if(hqspi->State == HAL_QSPI_STATE_READY) in HAL_QSPI_AutoPolling_IT()
1636 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; in HAL_QSPI_AutoPolling_IT()
1639 hqspi->State = HAL_QSPI_STATE_BUSY_AUTO_POLLING; in HAL_QSPI_AutoPolling_IT()
1642 … status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, hqspi->Timeout); in HAL_QSPI_AutoPolling_IT()
1647 WRITE_REG(hqspi->Instance->PSMAR, cfg->Match); in HAL_QSPI_AutoPolling_IT()
1650 WRITE_REG(hqspi->Instance->PSMKR, cfg->Mask); in HAL_QSPI_AutoPolling_IT()
1653 WRITE_REG(hqspi->Instance->PIR, cfg->Interval); in HAL_QSPI_AutoPolling_IT()
1656 MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PMM | QUADSPI_CR_APMS), in HAL_QSPI_AutoPolling_IT()
1660 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TE | QSPI_FLAG_SM); in HAL_QSPI_AutoPolling_IT()
1664 QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_AUTO_POLLING); in HAL_QSPI_AutoPolling_IT()
1667 __HAL_UNLOCK(hqspi); in HAL_QSPI_AutoPolling_IT()
1670 __HAL_QSPI_ENABLE_IT(hqspi, (QSPI_IT_SM | QSPI_IT_TE)); in HAL_QSPI_AutoPolling_IT()
1676 __HAL_UNLOCK(hqspi); in HAL_QSPI_AutoPolling_IT()
1684 __HAL_UNLOCK(hqspi); in HAL_QSPI_AutoPolling_IT()
1699 HAL_StatusTypeDef HAL_QSPI_MemoryMapped(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_M… in HAL_QSPI_MemoryMapped() argument
1733 __HAL_LOCK(hqspi); in HAL_QSPI_MemoryMapped()
1735 if(hqspi->State == HAL_QSPI_STATE_READY) in HAL_QSPI_MemoryMapped()
1737 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; in HAL_QSPI_MemoryMapped()
1740 hqspi->State = HAL_QSPI_STATE_BUSY_MEM_MAPPED; in HAL_QSPI_MemoryMapped()
1743 … status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, hqspi->Timeout); in HAL_QSPI_MemoryMapped()
1748 MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_TCEN, cfg->TimeOutActivation); in HAL_QSPI_MemoryMapped()
1755 WRITE_REG(hqspi->Instance->LPTR, cfg->TimeOutPeriod); in HAL_QSPI_MemoryMapped()
1758 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TO); in HAL_QSPI_MemoryMapped()
1761 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TO); in HAL_QSPI_MemoryMapped()
1765 QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED); in HAL_QSPI_MemoryMapped()
1774 __HAL_UNLOCK(hqspi); in HAL_QSPI_MemoryMapped()
1785 __weak void HAL_QSPI_ErrorCallback(QSPI_HandleTypeDef *hqspi) in HAL_QSPI_ErrorCallback() argument
1788 UNUSED(hqspi); in HAL_QSPI_ErrorCallback()
1800 __weak void HAL_QSPI_AbortCpltCallback(QSPI_HandleTypeDef *hqspi) in HAL_QSPI_AbortCpltCallback() argument
1803 UNUSED(hqspi); in HAL_QSPI_AbortCpltCallback()
1815 __weak void HAL_QSPI_CmdCpltCallback(QSPI_HandleTypeDef *hqspi) in HAL_QSPI_CmdCpltCallback() argument
1818 UNUSED(hqspi); in HAL_QSPI_CmdCpltCallback()
1830 __weak void HAL_QSPI_RxCpltCallback(QSPI_HandleTypeDef *hqspi) in HAL_QSPI_RxCpltCallback() argument
1833 UNUSED(hqspi); in HAL_QSPI_RxCpltCallback()
1845 __weak void HAL_QSPI_TxCpltCallback(QSPI_HandleTypeDef *hqspi) in HAL_QSPI_TxCpltCallback() argument
1848 UNUSED(hqspi); in HAL_QSPI_TxCpltCallback()
1861 __weak void HAL_QSPI_FifoThresholdCallback(QSPI_HandleTypeDef *hqspi) in HAL_QSPI_FifoThresholdCallback() argument
1864 UNUSED(hqspi); in HAL_QSPI_FifoThresholdCallback()
1876 __weak void HAL_QSPI_StatusMatchCallback(QSPI_HandleTypeDef *hqspi) in HAL_QSPI_StatusMatchCallback() argument
1879 UNUSED(hqspi); in HAL_QSPI_StatusMatchCallback()
1891 __weak void HAL_QSPI_TimeOutCallback(QSPI_HandleTypeDef *hqspi) in HAL_QSPI_TimeOutCallback() argument
1894 UNUSED(hqspi); in HAL_QSPI_TimeOutCallback()
1920 HAL_StatusTypeDef HAL_QSPI_RegisterCallback (QSPI_HandleTypeDef *hqspi, HAL_QSPI_CallbackIDTypeDef … in HAL_QSPI_RegisterCallback() argument
1927 hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_CALLBACK; in HAL_QSPI_RegisterCallback()
1932 __HAL_LOCK(hqspi); in HAL_QSPI_RegisterCallback()
1934 if(hqspi->State == HAL_QSPI_STATE_READY) in HAL_QSPI_RegisterCallback()
1939 hqspi->ErrorCallback = pCallback; in HAL_QSPI_RegisterCallback()
1942 hqspi->AbortCpltCallback = pCallback; in HAL_QSPI_RegisterCallback()
1945 hqspi->FifoThresholdCallback = pCallback; in HAL_QSPI_RegisterCallback()
1948 hqspi->CmdCpltCallback = pCallback; in HAL_QSPI_RegisterCallback()
1951 hqspi->RxCpltCallback = pCallback; in HAL_QSPI_RegisterCallback()
1954 hqspi->TxCpltCallback = pCallback; in HAL_QSPI_RegisterCallback()
1957 hqspi->StatusMatchCallback = pCallback; in HAL_QSPI_RegisterCallback()
1960 hqspi->TimeOutCallback = pCallback; in HAL_QSPI_RegisterCallback()
1963 hqspi->MspInitCallback = pCallback; in HAL_QSPI_RegisterCallback()
1966 hqspi->MspDeInitCallback = pCallback; in HAL_QSPI_RegisterCallback()
1970 hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_CALLBACK; in HAL_QSPI_RegisterCallback()
1976 else if (hqspi->State == HAL_QSPI_STATE_RESET) in HAL_QSPI_RegisterCallback()
1981 hqspi->MspInitCallback = pCallback; in HAL_QSPI_RegisterCallback()
1984 hqspi->MspDeInitCallback = pCallback; in HAL_QSPI_RegisterCallback()
1988 hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_CALLBACK; in HAL_QSPI_RegisterCallback()
1997 hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_CALLBACK; in HAL_QSPI_RegisterCallback()
2003 __HAL_UNLOCK(hqspi); in HAL_QSPI_RegisterCallback()
2025 HAL_StatusTypeDef HAL_QSPI_UnRegisterCallback (QSPI_HandleTypeDef *hqspi, HAL_QSPI_CallbackIDTypeDe… in HAL_QSPI_UnRegisterCallback() argument
2030 __HAL_LOCK(hqspi); in HAL_QSPI_UnRegisterCallback()
2032 if(hqspi->State == HAL_QSPI_STATE_READY) in HAL_QSPI_UnRegisterCallback()
2037 hqspi->ErrorCallback = HAL_QSPI_ErrorCallback; in HAL_QSPI_UnRegisterCallback()
2040 hqspi->AbortCpltCallback = HAL_QSPI_AbortCpltCallback; in HAL_QSPI_UnRegisterCallback()
2043 hqspi->FifoThresholdCallback = HAL_QSPI_FifoThresholdCallback; in HAL_QSPI_UnRegisterCallback()
2046 hqspi->CmdCpltCallback = HAL_QSPI_CmdCpltCallback; in HAL_QSPI_UnRegisterCallback()
2049 hqspi->RxCpltCallback = HAL_QSPI_RxCpltCallback; in HAL_QSPI_UnRegisterCallback()
2052 hqspi->TxCpltCallback = HAL_QSPI_TxCpltCallback; in HAL_QSPI_UnRegisterCallback()
2055 hqspi->StatusMatchCallback = HAL_QSPI_StatusMatchCallback; in HAL_QSPI_UnRegisterCallback()
2058 hqspi->TimeOutCallback = HAL_QSPI_TimeOutCallback; in HAL_QSPI_UnRegisterCallback()
2061 hqspi->MspInitCallback = HAL_QSPI_MspInit; in HAL_QSPI_UnRegisterCallback()
2064 hqspi->MspDeInitCallback = HAL_QSPI_MspDeInit; in HAL_QSPI_UnRegisterCallback()
2068 hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_CALLBACK; in HAL_QSPI_UnRegisterCallback()
2074 else if (hqspi->State == HAL_QSPI_STATE_RESET) in HAL_QSPI_UnRegisterCallback()
2079 hqspi->MspInitCallback = HAL_QSPI_MspInit; in HAL_QSPI_UnRegisterCallback()
2082 hqspi->MspDeInitCallback = HAL_QSPI_MspDeInit; in HAL_QSPI_UnRegisterCallback()
2086 hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_CALLBACK; in HAL_QSPI_UnRegisterCallback()
2095 hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_CALLBACK; in HAL_QSPI_UnRegisterCallback()
2101 __HAL_UNLOCK(hqspi); in HAL_QSPI_UnRegisterCallback()
2133 HAL_QSPI_StateTypeDef HAL_QSPI_GetState(const QSPI_HandleTypeDef *hqspi) in HAL_QSPI_GetState() argument
2136 return hqspi->State; in HAL_QSPI_GetState()
2144 uint32_t HAL_QSPI_GetError(const QSPI_HandleTypeDef *hqspi) in HAL_QSPI_GetError() argument
2146 return hqspi->ErrorCode; in HAL_QSPI_GetError()
2154 HAL_StatusTypeDef HAL_QSPI_Abort(QSPI_HandleTypeDef *hqspi) in HAL_QSPI_Abort() argument
2160 if (((uint32_t)hqspi->State & 0x2U) != 0U) in HAL_QSPI_Abort()
2163 __HAL_UNLOCK(hqspi); in HAL_QSPI_Abort()
2165 if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U) in HAL_QSPI_Abort()
2169 CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); in HAL_QSPI_Abort()
2172 status = HAL_MDMA_Abort(hqspi->hmdma); in HAL_QSPI_Abort()
2175 hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA; in HAL_QSPI_Abort()
2179 if (__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_BUSY) != RESET) in HAL_QSPI_Abort()
2182 SET_BIT(hqspi->Instance->CR, QUADSPI_CR_ABORT); in HAL_QSPI_Abort()
2185 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, tickstart, hqspi->Timeout); in HAL_QSPI_Abort()
2189 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); in HAL_QSPI_Abort()
2192 … status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, hqspi->Timeout); in HAL_QSPI_Abort()
2198 CLEAR_BIT(hqspi->Instance->CCR, QUADSPI_CCR_FMODE); in HAL_QSPI_Abort()
2201 hqspi->State = HAL_QSPI_STATE_READY; in HAL_QSPI_Abort()
2207 hqspi->State = HAL_QSPI_STATE_READY; in HAL_QSPI_Abort()
2219 HAL_StatusTypeDef HAL_QSPI_Abort_IT(QSPI_HandleTypeDef *hqspi) in HAL_QSPI_Abort_IT() argument
2224 if (((uint32_t)hqspi->State & 0x2U) != 0U) in HAL_QSPI_Abort_IT()
2227 __HAL_UNLOCK(hqspi); in HAL_QSPI_Abort_IT()
2230 hqspi->State = HAL_QSPI_STATE_ABORT; in HAL_QSPI_Abort_IT()
2233 __HAL_QSPI_DISABLE_IT(hqspi, (QSPI_IT_TO | QSPI_IT_SM | QSPI_IT_FT | QSPI_IT_TC | QSPI_IT_TE)); in HAL_QSPI_Abort_IT()
2235 if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U) in HAL_QSPI_Abort_IT()
2239 CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); in HAL_QSPI_Abort_IT()
2242 hqspi->hmdma->XferAbortCallback = QSPI_DMAAbortCplt; in HAL_QSPI_Abort_IT()
2243 if (HAL_MDMA_Abort_IT(hqspi->hmdma) != HAL_OK) in HAL_QSPI_Abort_IT()
2246 hqspi->State = HAL_QSPI_STATE_READY; in HAL_QSPI_Abort_IT()
2250 hqspi->AbortCpltCallback(hqspi); in HAL_QSPI_Abort_IT()
2252 HAL_QSPI_AbortCpltCallback(hqspi); in HAL_QSPI_Abort_IT()
2258 if (__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_BUSY) != RESET) in HAL_QSPI_Abort_IT()
2261 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); in HAL_QSPI_Abort_IT()
2264 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TC); in HAL_QSPI_Abort_IT()
2267 SET_BIT(hqspi->Instance->CR, QUADSPI_CR_ABORT); in HAL_QSPI_Abort_IT()
2272 hqspi->State = HAL_QSPI_STATE_READY; in HAL_QSPI_Abort_IT()
2284 void HAL_QSPI_SetTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Timeout) in HAL_QSPI_SetTimeout() argument
2286 hqspi->Timeout = Timeout; in HAL_QSPI_SetTimeout()
2294 HAL_StatusTypeDef HAL_QSPI_SetFifoThreshold(QSPI_HandleTypeDef *hqspi, uint32_t Threshold) in HAL_QSPI_SetFifoThreshold() argument
2299 __HAL_LOCK(hqspi); in HAL_QSPI_SetFifoThreshold()
2301 if(hqspi->State == HAL_QSPI_STATE_READY) in HAL_QSPI_SetFifoThreshold()
2304 hqspi->Init.FifoThreshold = Threshold; in HAL_QSPI_SetFifoThreshold()
2307 MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_FTHRES, in HAL_QSPI_SetFifoThreshold()
2308 ((hqspi->Init.FifoThreshold - 1U) << QUADSPI_CR_FTHRES_Pos)); in HAL_QSPI_SetFifoThreshold()
2316 __HAL_UNLOCK(hqspi); in HAL_QSPI_SetFifoThreshold()
2326 uint32_t HAL_QSPI_GetFifoThreshold(const QSPI_HandleTypeDef *hqspi) in HAL_QSPI_GetFifoThreshold() argument
2328 return ((READ_BIT(hqspi->Instance->CR, QUADSPI_CR_FTHRES) >> QUADSPI_CR_FTHRES_Pos) + 1U); in HAL_QSPI_GetFifoThreshold()
2338 HAL_StatusTypeDef HAL_QSPI_SetFlashID(QSPI_HandleTypeDef *hqspi, uint32_t FlashID) in HAL_QSPI_SetFlashID() argument
2346 __HAL_LOCK(hqspi); in HAL_QSPI_SetFlashID()
2348 if(hqspi->State == HAL_QSPI_STATE_READY) in HAL_QSPI_SetFlashID()
2351 hqspi->Init.FlashID = FlashID; in HAL_QSPI_SetFlashID()
2354 MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_FSEL, FlashID); in HAL_QSPI_SetFlashID()
2362 __HAL_UNLOCK(hqspi); in HAL_QSPI_SetFlashID()
2387 QSPI_HandleTypeDef* hqspi = (QSPI_HandleTypeDef*)(hmdma->Parent); in QSPI_DMARxCplt() local
2388 hqspi->RxXferCount = 0U; in QSPI_DMARxCplt()
2391 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TC); in QSPI_DMARxCplt()
2401 QSPI_HandleTypeDef* hqspi = (QSPI_HandleTypeDef*)(hmdma->Parent); in QSPI_DMATxCplt() local
2402 hqspi->TxXferCount = 0U; in QSPI_DMATxCplt()
2405 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TC); in QSPI_DMATxCplt()
2415 QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )(hmdma->Parent); in QSPI_DMAError() local
2417 hqspi->RxXferCount = 0U; in QSPI_DMAError()
2418 hqspi->TxXferCount = 0U; in QSPI_DMAError()
2419 hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA; in QSPI_DMAError()
2423 CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); in QSPI_DMAError()
2426 (void)HAL_QSPI_Abort_IT(hqspi); in QSPI_DMAError()
2437 QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )(hmdma->Parent); in QSPI_DMAAbortCplt() local
2439 hqspi->RxXferCount = 0U; in QSPI_DMAAbortCplt()
2440 hqspi->TxXferCount = 0U; in QSPI_DMAAbortCplt()
2442 if(hqspi->State == HAL_QSPI_STATE_ABORT) in QSPI_DMAAbortCplt()
2446 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); in QSPI_DMAAbortCplt()
2449 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TC); in QSPI_DMAAbortCplt()
2452 SET_BIT(hqspi->Instance->CR, QUADSPI_CR_ABORT); in QSPI_DMAAbortCplt()
2458 hqspi->State = HAL_QSPI_STATE_READY; in QSPI_DMAAbortCplt()
2462 hqspi->ErrorCallback(hqspi); in QSPI_DMAAbortCplt()
2464 HAL_QSPI_ErrorCallback(hqspi); in QSPI_DMAAbortCplt()
2478 static HAL_StatusTypeDef QSPI_WaitFlagStateUntilTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Flag, in QSPI_WaitFlagStateUntilTimeout() argument
2482 while((__HAL_QSPI_GET_FLAG(hqspi, Flag)) != State) in QSPI_WaitFlagStateUntilTimeout()
2489 hqspi->State = HAL_QSPI_STATE_ERROR; in QSPI_WaitFlagStateUntilTimeout()
2490 hqspi->ErrorCode |= HAL_QSPI_ERROR_TIMEOUT; in QSPI_WaitFlagStateUntilTimeout()
2511 static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t FunctionalMod… in QSPI_Config() argument
2518 WRITE_REG(hqspi->Instance->DLR, (cmd->NbData - 1U)); in QSPI_Config()
2526 WRITE_REG(hqspi->Instance->ABR, cmd->AlternateBytes); in QSPI_Config()
2532 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | in QSPI_Config()
2541 WRITE_REG(hqspi->Instance->AR, cmd->Address); in QSPI_Config()
2548 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | in QSPI_Config()
2555 CLEAR_REG(hqspi->Instance->AR); in QSPI_Config()
2564 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | in QSPI_Config()
2572 WRITE_REG(hqspi->Instance->AR, cmd->Address); in QSPI_Config()
2579 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | in QSPI_Config()
2585 CLEAR_REG(hqspi->Instance->AR); in QSPI_Config()
2594 WRITE_REG(hqspi->Instance->ABR, cmd->AlternateBytes); in QSPI_Config()
2600 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | in QSPI_Config()
2609 WRITE_REG(hqspi->Instance->AR, cmd->Address); in QSPI_Config()
2616 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | in QSPI_Config()
2622 CLEAR_REG(hqspi->Instance->AR); in QSPI_Config()
2631 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | in QSPI_Config()
2639 WRITE_REG(hqspi->Instance->AR, cmd->Address); in QSPI_Config()
2648 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | in QSPI_Config()
2654 CLEAR_REG(hqspi->Instance->AR); in QSPI_Config()