Lines Matching refs:CFG1
1467 if (HAL_IS_BIT_CLR(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN)) in HAL_I2S_Transmit_DMA()
1470 SET_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN); in HAL_I2S_Transmit_DMA()
1553 if (HAL_IS_BIT_CLR(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN)) in HAL_I2S_Receive_DMA()
1556 SET_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN); in HAL_I2S_Receive_DMA()
1619 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN | SPI_CFG1_RXDMAEN); in HAL_I2SEx_TransmitReceive_DMA()
1643 if (HAL_IS_BIT_CLR(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN)) in HAL_I2SEx_TransmitReceive_DMA()
1646 SET_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN); in HAL_I2SEx_TransmitReceive_DMA()
1662 if (HAL_IS_BIT_CLR(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN)) in HAL_I2SEx_TransmitReceive_DMA()
1665 SET_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN); in HAL_I2SEx_TransmitReceive_DMA()
1805 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN); in HAL_I2S_DMAStop()
1806 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN); in HAL_I2S_DMAStop()
2258 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN); in I2S_DMATxCplt()
2305 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN); in I2S_DMARxCplt()
2350 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN); in I2SEx_DMATxRxCplt()
2354 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN); in I2SEx_DMATxRxCplt()
2399 CLEAR_BIT(hi2s->Instance->CFG1, (SPI_CFG1_RXDMAEN | SPI_CFG1_TXDMAEN)); in I2S_DMAError()