5124                                                uint32_t Timers)  in HAL_HRTIM_WaveformCountStart()  argument
5127   assert_param(IS_HRTIM_TIMERID(Timers));  in HAL_HRTIM_WaveformCountStart()
5135   hhrtim->Instance->sMasterRegs.MCR |= (Timers);  in HAL_HRTIM_WaveformCountStart()
5161                                               uint32_t Timers)  in HAL_HRTIM_WaveformCountStop()  argument
5164   assert_param(IS_HRTIM_TIMERID(Timers));  in HAL_HRTIM_WaveformCountStop()
5172   hhrtim->Instance->sMasterRegs.MCR &= ~(Timers);  in HAL_HRTIM_WaveformCountStop()
5201                                                   uint32_t Timers)  in HAL_HRTIM_WaveformCountStart_IT()  argument
5206   assert_param(IS_HRTIM_TIMERID(Timers));  in HAL_HRTIM_WaveformCountStart_IT()
5217   if ((Timers & HRTIM_TIMERID_MASTER) != 0U)  in HAL_HRTIM_WaveformCountStart_IT()
5228     if ((Timers & TimerIdxToTimerId[timer_idx]) != 0U)  in HAL_HRTIM_WaveformCountStart_IT()
5237   hhrtim->Instance->sMasterRegs.MCR |= (Timers);  in HAL_HRTIM_WaveformCountStart_IT()
5264                                                  uint32_t Timers)  in HAL_HRTIM_WaveformCountStop_IT()  argument
5273   assert_param(IS_HRTIM_TIMERID(Timers));  in HAL_HRTIM_WaveformCountStop_IT()
5284   if ((Timers & HRTIM_TIMERID_MASTER) != 0U)  in HAL_HRTIM_WaveformCountStop_IT()
5295     if ((Timers & TimerIdxToTimerId[timer_idx]) != 0U)  in HAL_HRTIM_WaveformCountStop_IT()
5306   hhrtim->Instance->sMasterRegs.MCR &= ~(Timers);  in HAL_HRTIM_WaveformCountStop_IT()
5336                                                    uint32_t Timers)  in HAL_HRTIM_WaveformCountStart_DMA()  argument
5342   assert_param(IS_HRTIM_TIMERID(Timers));  in HAL_HRTIM_WaveformCountStart_DMA()
5354   if (((Timers & HRTIM_TIMERID_MASTER) != (uint32_t)RESET) &&  in HAL_HRTIM_WaveformCountStart_DMA()
5386     if (((Timers & TimerIdxToTimerId[timer_idx]) != (uint32_t)RESET) &&  in HAL_HRTIM_WaveformCountStart_DMA()
5430   __HAL_HRTIM_ENABLE(hhrtim, Timers);  in HAL_HRTIM_WaveformCountStart_DMA()
5457                                                   uint32_t Timers)  in HAL_HRTIM_WaveformCountStop_DMA()  argument
5462   assert_param(IS_HRTIM_TIMERID(Timers));  in HAL_HRTIM_WaveformCountStop_DMA()
5466   if (((Timers & HRTIM_TIMERID_MASTER) != 0U) &&  in HAL_HRTIM_WaveformCountStop_DMA()
5487     if (((Timers & TimerIdxToTimerId[timer_idx]) != 0U) &&  in HAL_HRTIM_WaveformCountStop_DMA()
5509   __HAL_HRTIM_DISABLE(hhrtim, Timers);  in HAL_HRTIM_WaveformCountStop_DMA()
5677                                            uint32_t Timers)  in HAL_HRTIM_SoftwareUpdate()  argument
5680   assert_param(IS_HRTIM_TIMERUPDATE(Timers));  in HAL_HRTIM_SoftwareUpdate()
5693   hhrtim->Instance->sCommonRegs.CR2 |= Timers;  in HAL_HRTIM_SoftwareUpdate()
5719                                           uint32_t Timers)  in HAL_HRTIM_SoftwareReset()  argument
5722   assert_param(IS_HRTIM_TIMERRESET(Timers));  in HAL_HRTIM_SoftwareReset()
5735   hhrtim->Instance->sCommonRegs.CR2 = Timers;  in HAL_HRTIM_SoftwareReset()
5854                                          uint32_t Timers)  in HAL_HRTIM_UpdateEnable()  argument
5857   assert_param(IS_HRTIM_TIMERUPDATE(Timers));  in HAL_HRTIM_UpdateEnable()
5865   hhrtim->Instance->sCommonRegs.CR1 &= ~(Timers);  in HAL_HRTIM_UpdateEnable()
5890                                           uint32_t Timers)  in HAL_HRTIM_UpdateDisable()  argument
5893   assert_param(IS_HRTIM_TIMERUPDATE(Timers));  in HAL_HRTIM_UpdateDisable()
5901   hhrtim->Instance->sCommonRegs.CR1 |= (Timers);  in HAL_HRTIM_UpdateDisable()