Lines Matching refs:sCcuConfig

1683                                                    const FDCAN_ClkCalUnitTypeDef *sCcuConfig)  in HAL_FDCAN_ConfigClockCalibration()  argument
1686 assert_param(IS_FDCAN_CLOCK_CALIBRATION(sCcuConfig->ClockCalibration)); in HAL_FDCAN_ConfigClockCalibration()
1687 if (sCcuConfig->ClockCalibration == FDCAN_CLOCK_CALIBRATION_DISABLE) in HAL_FDCAN_ConfigClockCalibration()
1689 assert_param(IS_FDCAN_CKDIV(sCcuConfig->ClockDivider)); in HAL_FDCAN_ConfigClockCalibration()
1693 assert_param(IS_FDCAN_MAX_VALUE(sCcuConfig->MinOscClkPeriods, 0xFFU)); in HAL_FDCAN_ConfigClockCalibration()
1694 assert_param(IS_FDCAN_CALIBRATION_FIELD_LENGTH(sCcuConfig->CalFieldLength)); in HAL_FDCAN_ConfigClockCalibration()
1695 assert_param(IS_FDCAN_MIN_VALUE(sCcuConfig->TimeQuantaPerBitTime, 4U)); in HAL_FDCAN_ConfigClockCalibration()
1696 assert_param(IS_FDCAN_MAX_VALUE(sCcuConfig->TimeQuantaPerBitTime, 0x25U)); in HAL_FDCAN_ConfigClockCalibration()
1697 assert_param(IS_FDCAN_MAX_VALUE(sCcuConfig->WatchdogStartValue, 0xFFFFU)); in HAL_FDCAN_ConfigClockCalibration()
1711 if (sCcuConfig->ClockCalibration == FDCAN_CLOCK_CALIBRATION_DISABLE) in HAL_FDCAN_ConfigClockCalibration()
1718 (sCcuConfig->ClockDivider << FDCANCCU_CCFG_CDIV_Pos)); in HAL_FDCAN_ConfigClockCalibration()
1728 ((sCcuConfig->TimeQuantaPerBitTime << FDCANCCU_CCFG_TQBT_Pos) | in HAL_FDCAN_ConfigClockCalibration()
1729sCcuConfig->CalFieldLength | (sCcuConfig->MinOscClkPeriods << FDCANCCU_CCFG_OCPM_Pos))); in HAL_FDCAN_ConfigClockCalibration()
1732 MODIFY_REG(FDCAN_CCU->CWD, FDCANCCU_CWD_WDC, sCcuConfig->WatchdogStartValue); in HAL_FDCAN_ConfigClockCalibration()