Lines Matching refs:DESC2
1441 CLEAR_BIT(heth->Init.TxDesc[idx].DESC2, ETH_DMATXNDESCRF_TTSE); in HAL_ETH_ReleaseTxPacket()
1749 SET_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_TTSE); in HAL_ETH_PTP_InsertTxTimestamp()
3018 WRITE_REG(dmatxdesc->DESC2, 0x0U); in ETH_DMATxDescListInit()
3055 WRITE_REG(dmarxdesc->DESC2, 0x0U); in ETH_DMARxDescListInit()
3128 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_IVT, (pTxConfig->InnerVlanTag << 16)); in ETH_Prepare_Tx_Descriptors()
3146 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_MSS, pTxConfig->MaxSegmentSize); in ETH_Prepare_Tx_Descriptors()
3189 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len); in ETH_Prepare_Tx_Descriptors()
3197 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16)); in ETH_Prepare_Tx_Descriptors()
3203 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U); in ETH_Prepare_Tx_Descriptors()
3233 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_VTIR, pTxConfig->VlanCtrl); in ETH_Prepare_Tx_Descriptors()
3296 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len); in ETH_Prepare_Tx_Descriptors()
3305 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16)); in ETH_Prepare_Tx_Descriptors()
3311 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U); in ETH_Prepare_Tx_Descriptors()
3346 SET_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC); in ETH_Prepare_Tx_Descriptors()
3351 CLEAR_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC); in ETH_Prepare_Tx_Descriptors()