356     regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);  in HAL_DMA_Init()
394 …hdma->StreamIndex = (((uint32_t)((uint32_t*)hdma->Instance) - (uint32_t)BDMA_Channel0) / ((uint32_…  in HAL_DMA_Init()
401     regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));  in HAL_DMA_Init()
506     regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);  in HAL_DMA_DeInit()
529     regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));  in HAL_DMA_DeInit()
857       regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);  in HAL_DMA_Abort()
862       regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));  in HAL_DMA_Abort()
937         regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));  in HAL_DMA_Abort_IT()
1020       cpltlevel_mask = DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU);  in HAL_DMA_PollForTransfer()
1025       cpltlevel_mask = DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU);  in HAL_DMA_PollForTransfer()
1044       cpltlevel_mask = BDMA_FLAG_TC0 << (hdma->StreamIndex & 0x1FU);  in HAL_DMA_PollForTransfer()
1049       cpltlevel_mask = BDMA_FLAG_HT0 << (hdma->StreamIndex & 0x1FU);  in HAL_DMA_PollForTransfer()
1060       if(((*isr_reg) & (DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)  in HAL_DMA_PollForTransfer()
1066         (*ifcr_reg) = DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU);  in HAL_DMA_PollForTransfer()
1069       if(((*isr_reg) & (DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)  in HAL_DMA_PollForTransfer()
1075         (*ifcr_reg) = DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU);  in HAL_DMA_PollForTransfer()
1078       if(((*isr_reg) & (DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)  in HAL_DMA_PollForTransfer()
1084         (*ifcr_reg) = DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU);  in HAL_DMA_PollForTransfer()
1097       if(((*isr_reg) & (BDMA_FLAG_TE0 << (hdma->StreamIndex & 0x1FU))) != 0U)  in HAL_DMA_PollForTransfer()
1102         (*isr_reg) = ((BDMA_ISR_GIF0) << (hdma->StreamIndex & 0x1FU));  in HAL_DMA_PollForTransfer()
1174       (*ifcr_reg) = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << (hdma->StreamIndex & 0x1FU);  in HAL_DMA_PollForTransfer()
1178       (*ifcr_reg) = (BDMA_FLAG_TC0 << (hdma->StreamIndex & 0x1FU));  in HAL_DMA_PollForTransfer()
1191       (*ifcr_reg) = (DMA_FLAG_HTIF0_4) << (hdma->StreamIndex & 0x1FU);  in HAL_DMA_PollForTransfer()
1195       (*ifcr_reg) = (BDMA_FLAG_HT0 << (hdma->StreamIndex & 0x1FU));  in HAL_DMA_PollForTransfer()
1225     if ((tmpisr_dma & (DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)  in HAL_DMA_IRQHandler()
1233         regs_dma->IFCR = DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU);  in HAL_DMA_IRQHandler()
1240     if ((tmpisr_dma & (DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)  in HAL_DMA_IRQHandler()
1245         regs_dma->IFCR = DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU);  in HAL_DMA_IRQHandler()
1252     if ((tmpisr_dma & (DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)  in HAL_DMA_IRQHandler()
1257         regs_dma->IFCR = DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU);  in HAL_DMA_IRQHandler()
1264     if ((tmpisr_dma & (DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)  in HAL_DMA_IRQHandler()
1269         regs_dma->IFCR = DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU);  in HAL_DMA_IRQHandler()
1311     if ((tmpisr_dma & (DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)  in HAL_DMA_IRQHandler()
1316         regs_dma->IFCR = DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU);  in HAL_DMA_IRQHandler()
1330           regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);  in HAL_DMA_IRQHandler()
1436 …if (((tmpisr_bdma & (BDMA_FLAG_HT0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR…  in HAL_DMA_IRQHandler()
1439       regs_bdma->IFCR = (BDMA_ISR_HTIF0 << (hdma->StreamIndex & 0x1FU));  in HAL_DMA_IRQHandler()
1483 …else if (((tmpisr_bdma & (BDMA_FLAG_TC0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDM…  in HAL_DMA_IRQHandler()
1486       regs_bdma->IFCR = (BDMA_ISR_TCIF0) << (hdma->StreamIndex & 0x1FU);  in HAL_DMA_IRQHandler()
1532 …else if (((tmpisr_bdma & (BDMA_FLAG_TE0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDM…  in HAL_DMA_IRQHandler()
1540       regs_bdma->IFCR = (BDMA_ISR_GIF0) << (hdma->StreamIndex & 0x1FU);  in HAL_DMA_IRQHandler()
1794     regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);  in DMA_SetConfig()
1824     regs_bdma->IFCR = (BDMA_ISR_GIF0) << (hdma->StreamIndex & 0x1FU);  in DMA_SetConfig()
1868     hdma->StreamIndex = flagBitshiftOffset[stream_number & 0x7U];  in DMA_CalcBaseAndBitshift()