Lines Matching refs:CPU2CR
1214 MODIFY_REG(PWR->CPU2CR, PWR_CPU2CR_PDDS_D1, PDMode); in LL_PWR_CPU2_SetD1PowerMode()
1254 return (uint32_t)(READ_BIT(PWR->CPU2CR, PWR_CPU2CR_PDDS_D1)); in LL_PWR_CPU2_GetD1PowerMode()
1284 MODIFY_REG(PWR->CPU2CR, PWR_CPU2CR_PDDS_D2, PDMode); in LL_PWR_CPU2_SetD2PowerMode()
1312 return (uint32_t)(READ_BIT(PWR->CPU2CR, PWR_CPU2CR_PDDS_D2)); in LL_PWR_CPU2_GetD2PowerMode()
1355 MODIFY_REG(PWR->CPU2CR, PWR_CPU2CR_PDDS_D3, PDMode); in LL_PWR_CPU2_SetD3PowerMode()
1395 return (uint32_t)(READ_BIT(PWR->CPU2CR, PWR_CPU2CR_PDDS_D3)); in LL_PWR_CPU2_GetD3PowerMode()
1407 SET_BIT(PWR->CPU2CR, PWR_CPU2CR_HOLD1); in LL_PWR_HoldCPU1()
1417 CLEAR_BIT(PWR->CPU2CR, PWR_CPU2CR_HOLD1); in LL_PWR_ReleaseCPU1()
1427 return ((READ_BIT(PWR->CPU2CR, PWR_CPU2CR_HOLD1) == (PWR_CPU2CR_HOLD1)) ? 1UL : 0UL); in LL_PWR_IsCPU1Held()
1491 SET_BIT(PWR->CPU2CR, PWR_CPU2CR_RUN_D3); in LL_PWR_CPU2_EnableD3RunInLowPowerMode()
1525 CLEAR_BIT(PWR->CPU2CR, PWR_CPU2CR_RUN_D3); in LL_PWR_CPU2_DisableD3RunInLowPowerMode()
1559 return ((READ_BIT(PWR->CPU2CR, PWR_CPU2CR_RUN_D3) == (PWR_CPU2CR_RUN_D3)) ? 1UL : 0UL); in LL_PWR_CPU2_IsEnabledD3RunInLowPowerMode()
2005 return ((READ_BIT(PWR->CPU2CR, PWR_CPU2CR_HOLD1F) == (PWR_CPU2CR_HOLD1F)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_HOLD1()
2027 return ((READ_BIT(PWR->CPU2CR, PWR_CPU2CR_STOPF) == (PWR_CPU2CR_STOPF)) ? 1UL : 0UL); in LL_PWR_CPU2_IsActiveFlag_STOP()
2049 return ((READ_BIT(PWR->CPU2CR, PWR_CPU2CR_SBF) == (PWR_CPU2CR_SBF)) ? 1UL : 0UL); in LL_PWR_CPU2_IsActiveFlag_SB()
2073 return ((READ_BIT(PWR->CPU2CR, PWR_CPU2CR_SBF_D1) == (PWR_CPU2CR_SBF_D1)) ? 1UL : 0UL); in LL_PWR_CPU2_IsActiveFlag_SB_D1()
2097 return ((READ_BIT(PWR->CPU2CR, PWR_CPU2CR_SBF_D2) == (PWR_CPU2CR_SBF_D2)) ? 1UL : 0UL); in LL_PWR_CPU2_IsActiveFlag_SB_D2()
2199 SET_BIT(PWR->CPU2CR, PWR_CPU2CR_CSSF); in LL_PWR_ClearFlag_CPU2()