Lines Matching full:with
14 * If no LICENSE file comes with this software, it is provided AS-IS.
129 …_0) /* Trigger edge set to rising edge (default setting for compatibility with some ADC on other S…
132 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
140 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
157 …_0) /* Trigger edge set to rising edge (default setting for compatibility with some ADC on other S…
160 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
168 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
366 …RT | ADC_CR_ADSTART | ADC_CR_ADDIS | ADC_CR_ADEN) /* ADC register CR bits with HW property "rs": S…
377 … (3300UL) /* Analog voltage reference (Vref+) value with which temperature s…
397 … (3300UL) /* Analog voltage reference (Vref+) voltage with which temperature s…
399 /* Registers addresses with ADC linearity calibration content (programmed during device production,…
467 …de configuration to operate in independent mode or multimode (for devices with several ADC instanc…
497 * (setting possible with ADC enabled without conversion on going,
498 * ADC enabled with conversion on going, ...)
499 * Each feature can be updated afterwards with a unitary function
500 * and potentially with ADC in a different state than disabled,
511 … /*!< Configures the left shifting applied to the final result with or without oversamp…
526 * (functions with prefix "REG").
533 * (setting possible with ADC enabled without conversion on going,
534 * ADC enabled with conversion on going, ...)
535 * Each feature can be updated afterwards with a unitary function
536 * and potentially with ADC in a different state than disabled,
545 …(default setting for compatibility with some ADC on other STM32 families having this setting set b…
586 * (functions with prefix "INJ").
593 * (setting possible with ADC enabled without conversion on going,
594 * ADC enabled with conversion on going, ...)
595 * Each feature can be updated afterwards with a unitary function
596 * and potentially with ADC in a different state than disabled,
605 …(default setting for compatibility with some ADC on other STM32 families having this setting set b…
641 * @brief Flags defines which can be used with LL_ADC_ReadReg function
683 * @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
701 /** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
704 /* List of ADC registers intended to be used (most commonly) with */
707 …egular conversion data register (corresponding to register DR) to be used with ADC configured in i…
708 … (corresponding to register CDR) to be used with ADC configured in multimode (available on STM32 d…
717 … ) /*!< ADC synchronous clock derived from AHB clock with prescaler division …
718 …MODE_0) /*!< ADC synchronous clock derived from AHB clock with prescaler division …
720 …_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
721 …_PRESC_1 ) /*!< ADC asynchronous clock with prescaler division …
722 …_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
723 …_PRESC_2 ) /*!< ADC asynchronous clock with prescaler division …
724 …_PRESC_2 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
725 …_PRESC_2 | ADC_CCR_PRESC_1 ) /*!< ADC asynchronous clock with prescaler division …
726 …_PRESC_2 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
727 …_PRESC_3) /*!< ADC asynchronous clock with prescaler division …
728 …_PRESC_3 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
729 …_PRESC_3 | ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with prescaler division …
730 …_PRESC_3 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division …
766 …ion of calibration of offset duration: 1280 ADC clock cycles. For devices with differential mode a…
767 …Duration of calibration of linearity: 15104 ADC clock cycles. For devices with differential mode a…
768 … calibration of offset and linearity: 16384 ADC clock cycles. For devices with differential mode a…
805 …is handled through functions "LL_ADC_SetResolution/LL_ADC_GetResolution" with a dedicated check o…
853 …en necessary (when previous ADC conversion data is read). See description with function @ref LL_AD…
1048 …mber of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circul…
1049 …sferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. …
1061 …mber of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circul…
1062 …sferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. …
1081 … ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 2 ranks in the sequ…
1082 … ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 3 ranks in the sequ…
1083 … ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 4 ranks in the sequ…
1084 …_2 ) /*!< ADC group regular sequencer enable with 5 ranks in the sequ…
1085 …_2 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 6 ranks in the sequ…
1086 …_2 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 7 ranks in the sequ…
1087 …_2 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 8 ranks in the sequ…
1088 … ) /*!< ADC group regular sequencer enable with 9 ranks in the sequ…
1089 … | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 10 ranks in the seq…
1090 … | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 11 ranks in the seq…
1091 … | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 12 ranks in the seq…
1092 …_2 ) /*!< ADC group regular sequencer enable with 13 ranks in the seq…
1093 …_2 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 14 ranks in the seq…
1094 …_2 | ADC_SQR1_L_1 ) /*!< ADC group regular sequencer enable with 15 ranks in the seq…
1095 …_2 | ADC_SQR1_L_1 | ADC_SQR1_L_0) /*!< ADC group regular sequencer enable with 16 ranks in the seq…
1104 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1105 …_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enabled with sequence interrupti…
1106 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1107 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1108 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1109 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1110 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1111 …C_CFGR_DISCEN) /*!< ADC group regular sequencer discontinuous mode enable with sequence interrupti…
1186 …njected conversion trigger from ADC group regular. Setting compliant only with group injected trig…
1205 … ( ADC_JSQR_JL_0) /*!< ADC group injected sequencer enable with 2 ranks in the sequ…
1206 … (ADC_JSQR_JL_1 ) /*!< ADC group injected sequencer enable with 3 ranks in the sequ…
1207 … (ADC_JSQR_JL_1 | ADC_JSQR_JL_0) /*!< ADC group injected sequencer enable with 4 ranks in the sequ…
1216 …_JDISCEN) /*!< ADC group injected sequencer discontinuous mode enable with sequence interrupti…
1457 … /*!< ADC dual mode enabled: group injected alternate trigger. Works only with external triggers (…
1468 …ar conversions are transferred by DMA: each ADC uses its own DMA channel, with its individual DMA …
1654 * number is returned, either defined with number
1655 * or with bitfield (only one bit must be set).
1739 * comparison with internal channel parameter to be done
1772 * number in ADC registers. The differentiation is made only with
1891 * number in ADC registers. The differentiation is made only with
1939 * define a single channel to monitor with analog watchdog
1941 * @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
1978 * comparison with internal channel parameter to be done
2083 * @note To be used with function @ref LL_ADC_SetAnalogWDThresholds().
2084 * Example, with a ADC resolution of 8 bits, to set the value of
2106 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
2107 * Example, with a ADC resolution of 8 bits, to get the value of
2126 * @brief Helper macro to set the ADC calibration value with both single ended
2128 * @note To be used with function @ref LL_ADC_SetCalibrationOffsetFactor().
2143 * or ADC slave from raw value with both ADC conversion data concatenated.
2146 * In this case the transferred data need to processed with this macro
2161 * @note In case of device with multimode available and a mix of
2162 * ADC instances compliant and not compliant with multimode feature,
2163 * ADC instances not compliant with multimode feature are
2182 * - Multimode (for devices with several ADC instances)
2205 * @note This check is required by functions with setting conditioned to
2209 * @note On devices with only 1 ADC common instance, parameter of this macro
2211 * with devices featuring several ADC common instances).
2406 * On devices with small package, the pin Vref+ is not present
2441 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
2500 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
2507 * of the current device has characteristics in line with
2576 * intended to be used (most commonly) with DMA transfer.
2580 * @note This macro is intended to be used with LL DMA driver, refer to
2588 * @note For devices with several ADC: in multimode, some devices
2600 * (1) Available on devices with several ADC instances.
2638 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2716 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2827 * or differential (for devices with differential mode available).
2831 * @note For devices with differential mode available:
2874 * or differential (for devices with differential mode available).
2877 * @note For devices with differential mode available:
2892 /* Retrieve bits with position in register depending on parameter */ in LL_ADC_GetCalibrationOffsetFactor()
2894 /* Parameter used with mask "ADC_SINGLEDIFF_CALIB_FACTOR_MASK" because */ in LL_ADC_GetCalibrationOffsetFactor()
3122 * - It is not recommended to use with interruption or DMA
3128 * - Do use with polling: 1. Start conversion,
3137 * (with startup time between trigger and start of sampling).
3138 * This feature can be combined with low power mode "auto wait".
3139 * @note With ADC low power mode "auto wait", the ADC conversion data read
3178 * - It is not recommended to use with interruption or DMA
3184 * - Do use with polling: 1. Start conversion,
3193 * (with startup time between trigger and start of sampling).
3194 * This feature can be combined with low power mode "auto wait".
3195 * @note With ADC low power mode "auto wait", the ADC conversion data read
3320 * with the lowest value is considered for the subtraction.
3407 * with parts of literals LL_ADC_CHANNEL_x or using
3412 * process the returned value with the helper macro
3458 * comparison with internal channel parameter to be done
3819 * (default setting for compatibility with some ADC on other
3910 /* to match with triggers literals definition. */ in LL_ADC_REG_GetTriggerSource()
4003 * - For devices with sequencer fully configurable
4013 * - For devices with sequencer not fully configurable
4062 * - For devices with sequencer fully configurable
4072 * - For devices with sequencer not fully configurable
4257 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_REG_SetSequencerRanks()
4259 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_REG_SetSequencerRanks()
4281 * with parts of literals LL_ADC_CHANNEL_x or using
4286 * process the returned value with the helper macro
4354 * comparison with internal channel parameter to be done
4453 * This ADC mode is intended to be used with DMA mode non-circular.
4457 * This ADC mode is intended to be used with DMA mode circular.
4463 * @note For devices with several ADC instances: ADC multimode DMA
4496 * This ADC mode is intended to be used with DMA mode non-circular.
4500 * This ADC mode is intended to be used with DMA mode circular.
4506 * @note For devices with several ADC instances: ADC multimode DMA
4556 * @note Compatibility with devices without feature overrun:
4560 * Therefore, for compatibility with all devices, parameter
4606 * (default setting for compatibility with some ADC on other
4614 * ADC must not be disabled. Can be enabled with or without conversion
4697 /* to match with triggers literals definition. */ in LL_ADC_INJ_GetTriggerSource()
4725 * ADC must not be disabled. Can be enabled with or without conversion
4765 * ADC must not be disabled. Can be enabled with or without conversion
4848 * ADC must not be disabled. Can be enabled with or without conversion
4895 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_INJ_SetSequencerRanks()
4897 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_INJ_SetSequencerRanks()
4913 * with parts of literals LL_ADC_CHANNEL_x or using
4918 * process the returned value with the helper macro
4962 * comparison with internal channel parameter to be done
4977 * updated after one ADC conversion trigger and with data
4985 * ADC group injected automatic trigger is compliant only with
5108 * ADC must not be disabled. Can be enabled with or without conversion
5288 /* Set bits with content of parameter "Rankx_Channel" with bits position */ in LL_ADC_INJ_ConfigQueueContext()
5290 /* Parameters "Rankx_Channel" and "LL_ADC_INJ_RANK_x" are used with masks */ in LL_ADC_INJ_ConfigQueueContext()
5411 /* Set bits with content of parameter "SamplingTime" with bits position */ in LL_ADC_SetChannelSamplingTime()
5413 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_SetChannelSamplingTime()
5650 * with analog watchdog from sequencer channel definition,
5776 /* Set bits with content of parameter "AWDChannelGroup" with bits position */ in LL_ADC_SetAnalogWDMonitChannels()
5778 /* Parameters "AWDChannelGroup" and "AWDy" are used with masks because */ in LL_ADC_SetAnalogWDMonitChannels()
5794 * with parts of literals LL_ADC_CHANNEL_x or using
5799 * process the returned value with the helper macro
6027 /* Set bits with content of parameter "AWDThresholdValue" with bits */ in LL_ADC_SetAnalogWDThresholds()
6030 /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ in LL_ADC_SetAnalogWDThresholds()
6040 /* Set bits with content of parameter "AWDThresholdValue" with bits */ in LL_ADC_SetAnalogWDThresholds()
6043 /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ in LL_ADC_SetAnalogWDThresholds()
6052 /* Set bits with content of parameter "AWDThresholdValue" with bits */ in LL_ADC_SetAnalogWDThresholds()
6055 /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ in LL_ADC_SetAnalogWDThresholds()
6067 * threshold low or raw data with ADC thresholds high and low
6166 /* Set bits with content of parameter "AWDThresholdxxxValue" with bits */ in LL_ADC_ConfigAnalogWDThresholds()
6169 /* Parameters "AWDy" and "AWDThresholdxxxValue" are used with masks because */ in LL_ADC_ConfigAnalogWDThresholds()
6553 * or multimode (for devices with several ADC instances).
6560 * This check can be done with function @ref LL_ADC_IsEnabled() for each
6584 * or multimode (for devices with several ADC instances).
6610 * each ADC uses its own DMA channel, with its individual
6618 * This ADC mode is intended to be used with DMA mode non-circular.
6622 * This ADC mode is intended to be used with DMA mode circular.
6632 * is a raw data with ADC master and slave concatenated.
6658 * each ADC uses its own DMA channel, with its individual
6666 * This ADC mode is intended to be used with DMA mode non-circular.
6670 * This ADC mode is intended to be used with DMA mode circular.
6680 * is a raw data with ADC master and slave concatenated.
6707 * This check can be done with function @ref LL_ADC_IsEnabled() for each
6797 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_EnableDeepPowerDown()
6799 /* to not interfere with bits with HW property "rs". */ in LL_ADC_EnableDeepPowerDown()
6820 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_DisableDeepPowerDown()
6822 /* to not interfere with bits with HW property "rs". */ in LL_ADC_DisableDeepPowerDown()
6853 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_EnableInternalRegulator()
6855 /* to not interfere with bits with HW property "rs". */ in LL_ADC_EnableInternalRegulator()
6904 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Enable()
6906 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Enable()
6924 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Disable()
6926 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Disable()
6959 * or differential (for devices with differential mode available).
6966 * @note For devices with differential mode available:
6992 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_StartCalibration()
6994 /* to not interfere with bits with HW property "rs". */ in LL_ADC_StartCalibration()
7039 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StartConversion()
7041 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StartConversion()
7051 * ADC must be enabled with conversion on going on group regular,
7059 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StopConversion()
7061 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StopConversion()
7093 * with feature oversampling).
7106 * @note For devices with feature oversampling: Oversampling
7121 * @note For devices with feature oversampling: Oversampling
7136 * @note For devices with feature oversampling: Oversampling
7151 * @note For devices with feature oversampling: Oversampling
7166 * @note For devices with feature oversampling: Oversampling
7179 * or raw data with ADC master and slave concatenated.
7180 * @note If raw data with ADC master and slave concatenated is retrieved,
7234 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_INJ_StartConversion()
7236 /* to not interfere with bits with HW property "rs". */ in LL_ADC_INJ_StartConversion()
7246 * ADC must be enabled with conversion on going on group injected,
7254 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_INJ_StopConversion()
7256 /* to not interfere with bits with HW property "rs". */ in LL_ADC_INJ_StopConversion()
7288 * with feature oversampling).
7313 * @note For devices with feature oversampling: Oversampling
7340 * @note For devices with feature oversampling: Oversampling
7367 * @note For devices with feature oversampling: Oversampling
7394 * @note For devices with feature oversampling: Oversampling
7421 * @note For devices with feature oversampling: Oversampling