Lines Matching refs:pConfig
1686 const LL_I3C_CtrlBusConfTypeDef *pConfig) in HAL_I3C_Ctrl_BusCharacteristicConfig() argument
1704 if (pConfig == NULL) in HAL_I3C_Ctrl_BusCharacteristicConfig()
1718 assert_param(IS_I3C_SDAHOLDTIME_VALUE(pConfig->SDAHoldTime)); in HAL_I3C_Ctrl_BusCharacteristicConfig()
1719 assert_param(IS_I3C_WAITTIME_VALUE(pConfig->WaitTime)); in HAL_I3C_Ctrl_BusCharacteristicConfig()
1726 waveform_value = ((uint32_t)pConfig->SCLPPLowDuration | in HAL_I3C_Ctrl_BusCharacteristicConfig()
1727 ((uint32_t)pConfig->SCLI3CHighDuration << I3C_TIMINGR0_SCLH_I3C_Pos) | in HAL_I3C_Ctrl_BusCharacteristicConfig()
1728 ((uint32_t)pConfig->SCLODLowDuration << I3C_TIMINGR0_SCLL_OD_Pos) | in HAL_I3C_Ctrl_BusCharacteristicConfig()
1729 ((uint32_t)pConfig->SCLI2CHighDuration << I3C_TIMINGR0_SCLH_I2C_Pos)); in HAL_I3C_Ctrl_BusCharacteristicConfig()
1735 timing_value = ((uint32_t)pConfig->SDAHoldTime | in HAL_I3C_Ctrl_BusCharacteristicConfig()
1736 (uint32_t)pConfig->WaitTime | in HAL_I3C_Ctrl_BusCharacteristicConfig()
1737 ((uint32_t)pConfig->BusFreeDuration << I3C_TIMINGR1_FREE_Pos) | in HAL_I3C_Ctrl_BusCharacteristicConfig()
1738 (uint32_t)pConfig->BusIdleDuration); in HAL_I3C_Ctrl_BusCharacteristicConfig()
1758 const LL_I3C_TgtBusConfTypeDef *pConfig) in HAL_I3C_Tgt_BusCharacteristicConfig() argument
1770 if (pConfig == NULL) in HAL_I3C_Tgt_BusCharacteristicConfig()
1794 LL_I3C_SetAvalTiming(hi3c->Instance, pConfig->BusAvailableDuration); in HAL_I3C_Tgt_BusCharacteristicConfig()
1812 HAL_StatusTypeDef HAL_I3C_SetConfigFifo(I3C_HandleTypeDef *hi3c, const I3C_FifoConfTypeDef *pConfig) in HAL_I3C_SetConfigFifo() argument
1826 if (pConfig == NULL) in HAL_I3C_SetConfigFifo()
1844 assert_param(IS_I3C_TXFIFOTHRESHOLD_VALUE(pConfig->TxFifoThreshold)); in HAL_I3C_SetConfigFifo()
1845 assert_param(IS_I3C_RXFIFOTHRESHOLD_VALUE(pConfig->RxFifoThreshold)); in HAL_I3C_SetConfigFifo()
1848 cfgr_value = (pConfig->TxFifoThreshold | pConfig->RxFifoThreshold); in HAL_I3C_SetConfigFifo()
1855 assert_param(IS_I3C_CONTROLFIFOSTATE_VALUE(pConfig->ControlFifo)); in HAL_I3C_SetConfigFifo()
1856 assert_param(IS_I3C_STATUSFIFOSTATE_VALUE(pConfig->StatusFifo)); in HAL_I3C_SetConfigFifo()
1859 cfgr_value |= (pConfig->StatusFifo | pConfig->ControlFifo); in HAL_I3C_SetConfigFifo()
1879 HAL_StatusTypeDef HAL_I3C_Ctrl_Config(I3C_HandleTypeDef *hi3c, const I3C_CtrlConfTypeDef *pConfig) in HAL_I3C_Ctrl_Config() argument
1897 if (pConfig == NULL) in HAL_I3C_Ctrl_Config()
1911 assert_param(IS_I3C_DYNAMICADDRESS_VALUE(pConfig->DynamicAddr)); in HAL_I3C_Ctrl_Config()
1912 assert_param(IS_I3C_FUNCTIONALSTATE_VALUE(pConfig->HighKeeperSDA)); in HAL_I3C_Ctrl_Config()
1913 assert_param(IS_I3C_FUNCTIONALSTATE_VALUE(pConfig->HotJoinAllowed)); in HAL_I3C_Ctrl_Config()
1914 assert_param(IS_I3C_FUNCTIONALSTATE_VALUE(pConfig->ACKStallState)); in HAL_I3C_Ctrl_Config()
1915 assert_param(IS_I3C_FUNCTIONALSTATE_VALUE(pConfig->CCCStallState)); in HAL_I3C_Ctrl_Config()
1916 assert_param(IS_I3C_FUNCTIONALSTATE_VALUE(pConfig->TxStallState)); in HAL_I3C_Ctrl_Config()
1917 assert_param(IS_I3C_FUNCTIONALSTATE_VALUE(pConfig->RxStallState)); in HAL_I3C_Ctrl_Config()
1923 timing2_value = (((uint32_t)pConfig->StallTime << I3C_TIMINGR2_STALL_Pos) | in HAL_I3C_Ctrl_Config()
1924 ((uint32_t)pConfig->ACKStallState << I3C_TIMINGR2_STALLA_Pos) | in HAL_I3C_Ctrl_Config()
1925 ((uint32_t)pConfig->CCCStallState << I3C_TIMINGR2_STALLC_Pos) | in HAL_I3C_Ctrl_Config()
1926 ((uint32_t)pConfig->TxStallState << I3C_TIMINGR2_STALLD_Pos) | in HAL_I3C_Ctrl_Config()
1927 ((uint32_t)pConfig->RxStallState << I3C_TIMINGR2_STALLT_Pos)); in HAL_I3C_Ctrl_Config()
1933 cfgr_value = (((uint32_t)pConfig->HighKeeperSDA << I3C_CFGR_HKSDAEN_Pos) | in HAL_I3C_Ctrl_Config()
1934 ((uint32_t)pConfig->HotJoinAllowed << I3C_CFGR_HJACK_Pos)); in HAL_I3C_Ctrl_Config()
1940 LL_I3C_SetOwnDynamicAddress(hi3c->Instance, pConfig->DynamicAddr); in HAL_I3C_Ctrl_Config()
1961 HAL_StatusTypeDef HAL_I3C_Tgt_Config(I3C_HandleTypeDef *hi3c, const I3C_TgtConfTypeDef *pConfig) in HAL_I3C_Tgt_Config() argument
1982 if (pConfig == NULL) in HAL_I3C_Tgt_Config()
1996 assert_param(IS_I3C_HANDOFFACTIVITYSTATE_VALUE(pConfig->HandOffActivityState)); in HAL_I3C_Tgt_Config()
1997 assert_param(IS_I3C_TSCOTIME_VALUE(pConfig->DataTurnAroundDuration)); in HAL_I3C_Tgt_Config()
1998 assert_param(IS_I3C_MAXSPEEDDATA_VALUE(pConfig->MaxDataSpeed)); in HAL_I3C_Tgt_Config()
1999 assert_param(IS_I3C_IBIPAYLOADSIZE_VALUE(pConfig->IBIPayloadSize)); in HAL_I3C_Tgt_Config()
2000 assert_param(IS_I3C_MIPIIDENTIFIER_VALUE(pConfig->MIPIIdentifier)); in HAL_I3C_Tgt_Config()
2001 assert_param(IS_I3C_FUNCTIONALSTATE_VALUE(pConfig->HandOffDelay)); in HAL_I3C_Tgt_Config()
2002 assert_param(IS_I3C_FUNCTIONALSTATE_VALUE(pConfig->GroupAddrCapability)); in HAL_I3C_Tgt_Config()
2003 assert_param(IS_I3C_FUNCTIONALSTATE_VALUE(pConfig->PendingReadMDB)); in HAL_I3C_Tgt_Config()
2004 assert_param(IS_I3C_FUNCTIONALSTATE_VALUE(pConfig->IBIPayload)); in HAL_I3C_Tgt_Config()
2005 assert_param(IS_I3C_FUNCTIONALSTATE_VALUE(pConfig->MaxSpeedLimitation)); in HAL_I3C_Tgt_Config()
2006 assert_param(IS_I3C_FUNCTIONALSTATE_VALUE(pConfig->CtrlCapability)); in HAL_I3C_Tgt_Config()
2007 assert_param(IS_I3C_FUNCTIONALSTATE_VALUE(pConfig->IBIRequest)); in HAL_I3C_Tgt_Config()
2008 assert_param(IS_I3C_FUNCTIONALSTATE_VALUE(pConfig->CtrlRoleRequest)); in HAL_I3C_Tgt_Config()
2009 assert_param(IS_I3C_FUNCTIONALSTATE_VALUE(pConfig->HotJoinRequest)); in HAL_I3C_Tgt_Config()
2015 …getmxdsr_value = (pConfig->HandOffActivityState | pConfig->MaxDataSpeed | pConfig->DataTurnAroundD… in HAL_I3C_Tgt_Config()
2016 ((uint32_t)pConfig->MaxReadTurnAround << I3C_GETMXDSR_RDTURN_Pos)); in HAL_I3C_Tgt_Config()
2022 maxrlr_value = (pConfig->IBIPayloadSize | (pConfig->MaxReadDataSize & I3C_MAXRLR_MRL)); in HAL_I3C_Tgt_Config()
2028 LL_I3C_SetMaxWriteLength(hi3c->Instance, pConfig->MaxWriteDataSize); in HAL_I3C_Tgt_Config()
2031 LL_I3C_SetMIPIInstanceID(hi3c->Instance, pConfig->MIPIIdentifier); in HAL_I3C_Tgt_Config()
2034 LL_I3C_SetDeviceCharacteristics(hi3c->Instance, pConfig->Identifier); in HAL_I3C_Tgt_Config()
2037 crccapr_value = (((uint32_t)pConfig->HandOffDelay << I3C_CRCAPR_CAPDHOFF_Pos) | in HAL_I3C_Tgt_Config()
2038 ((uint32_t)pConfig->GroupAddrCapability << I3C_CRCAPR_CAPGRP_Pos)); in HAL_I3C_Tgt_Config()
2044 …LL_I3C_SetPendingReadMDB(hi3c->Instance, ((uint32_t)pConfig->PendingReadMDB << I3C_GETCAPR_CAPPEND… in HAL_I3C_Tgt_Config()
2047 bcr_value = (((uint32_t)pConfig->MaxSpeedLimitation << I3C_BCR_BCR0_Pos) | in HAL_I3C_Tgt_Config()
2048 ((uint32_t)pConfig->IBIPayload << I3C_BCR_BCR2_Pos) | in HAL_I3C_Tgt_Config()
2049 ((uint32_t)pConfig->CtrlCapability << I3C_BCR_BCR6_Pos)); in HAL_I3C_Tgt_Config()
2055 devr0_value = (((uint32_t)pConfig->IBIRequest << I3C_DEVR0_IBIEN_Pos) | in HAL_I3C_Tgt_Config()
2056 ((uint32_t)pConfig->CtrlRoleRequest << I3C_DEVR0_CREN_Pos) | in HAL_I3C_Tgt_Config()
2057 ((uint32_t)pConfig->HotJoinRequest << I3C_DEVR0_HJEN_Pos)); in HAL_I3C_Tgt_Config()
2634 HAL_StatusTypeDef HAL_I3C_GetConfigFifo(I3C_HandleTypeDef *hi3c, I3C_FifoConfTypeDef *pConfig) in HAL_I3C_GetConfigFifo() argument
2650 if (pConfig == NULL) in HAL_I3C_GetConfigFifo()
2664 pConfig->TxFifoThreshold = LL_I3C_GetTxFIFOThreshold(hi3c->Instance); in HAL_I3C_GetConfigFifo()
2667 pConfig->RxFifoThreshold = LL_I3C_GetRxFIFOThreshold(hi3c->Instance); in HAL_I3C_GetConfigFifo()
2670 …pConfig->ControlFifo = (uint32_t)(LL_I3C_IsEnabledControlFIFO(hi3c->Instance) << I3C_CFGR_TMODE_Po… in HAL_I3C_GetConfigFifo()
2673 …pConfig->StatusFifo = (uint32_t)(LL_I3C_IsEnabledStatusFIFO(hi3c->Instance) << I3C_CFGR_SMODE_Pos); in HAL_I3C_GetConfigFifo()