Lines Matching refs:CFG1
1512 if (HAL_IS_BIT_CLR(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN)) in HAL_I2S_Transmit_DMA()
1515 SET_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN); in HAL_I2S_Transmit_DMA()
1641 if (HAL_IS_BIT_CLR(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN)) in HAL_I2S_Receive_DMA()
1644 SET_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN); in HAL_I2S_Receive_DMA()
1707 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN | SPI_CFG1_RXDMAEN); in HAL_I2SEx_TransmitReceive_DMA()
1774 if (HAL_IS_BIT_CLR(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN)) in HAL_I2SEx_TransmitReceive_DMA()
1777 SET_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN); in HAL_I2SEx_TransmitReceive_DMA()
1836 if (HAL_IS_BIT_CLR(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN)) in HAL_I2SEx_TransmitReceive_DMA()
1839 SET_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN); in HAL_I2SEx_TransmitReceive_DMA()
1979 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN); in HAL_I2S_DMAStop()
1980 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN); in HAL_I2S_DMAStop()
2331 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN); in I2S_DMATxCplt()
2378 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN); in I2S_DMARxCplt()
2423 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN); in I2SEx_DMATxRxCplt()
2427 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN); in I2SEx_DMATxRxCplt()
2472 CLEAR_BIT(hi2s->Instance->CFG1, (SPI_CFG1_RXDMAEN | SPI_CFG1_TXDMAEN)); in I2S_DMAError()