Lines Matching refs:heth
253 static void ETH_SetMACConfig(ETH_HandleTypeDef *heth, const ETH_MACConfigTypeDef *macconf);
254 static void ETH_SetDMAConfig(ETH_HandleTypeDef *heth, const ETH_DMAConfigTypeDef *dmaconf);
255 static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth);
256 static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth);
257 static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth);
258 static uint32_t ETH_Prepare_Tx_Descriptors(ETH_HandleTypeDef *heth, const ETH_TxPacketConfigTypeDef…
260 static void ETH_UpdateDescriptor(ETH_HandleTypeDef *heth);
263 static void ETH_InitCallbacksToDefault(ETH_HandleTypeDef *heth);
308 HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth) in HAL_ETH_Init() argument
312 if (heth == NULL) in HAL_ETH_Init()
316 if (heth->gState == HAL_ETH_STATE_RESET) in HAL_ETH_Init()
318 heth->gState = HAL_ETH_STATE_BUSY; in HAL_ETH_Init()
322 ETH_InitCallbacksToDefault(heth); in HAL_ETH_Init()
324 if (heth->MspInitCallback == NULL) in HAL_ETH_Init()
326 heth->MspInitCallback = HAL_ETH_MspInit; in HAL_ETH_Init()
330 heth->MspInitCallback(heth); in HAL_ETH_Init()
333 HAL_ETH_MspInit(heth); in HAL_ETH_Init()
340 if (heth->Init.MediaInterface == HAL_ETH_MII_MODE) in HAL_ETH_Init()
355 SET_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR); in HAL_ETH_Init()
361 while (READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR) > 0U) in HAL_ETH_Init()
366 heth->ErrorCode = HAL_ETH_ERROR_TIMEOUT; in HAL_ETH_Init()
368 heth->gState = HAL_ETH_STATE_ERROR; in HAL_ETH_Init()
375 HAL_ETH_SetMDIOClockRange(heth); in HAL_ETH_Init()
378 WRITE_REG(heth->Instance->MAC1USTCR, (((uint32_t)HAL_RCC_GetHCLKFreq() / ETH_MAC_US_TICK) - 1U)); in HAL_ETH_Init()
381 ETH_MACDMAConfig(heth); in HAL_ETH_Init()
384 MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_DSL, ETH_DMACCR_DSL_64BIT); in HAL_ETH_Init()
387 if ((heth->Init.RxBuffLen % 0x4U) != 0x0U) in HAL_ETH_Init()
390 heth->ErrorCode = HAL_ETH_ERROR_PARAM; in HAL_ETH_Init()
392 heth->gState = HAL_ETH_STATE_ERROR; in HAL_ETH_Init()
398 MODIFY_REG(heth->Instance->DMACRCR, ETH_DMACRCR_RBSZ, ((heth->Init.RxBuffLen) << 1)); in HAL_ETH_Init()
402 ETH_DMATxDescListInit(heth); in HAL_ETH_Init()
405 ETH_DMARxDescListInit(heth); in HAL_ETH_Init()
409 …heth->Instance->MACA0HR = (((uint32_t)(heth->Init.MACAddr[5]) << 8) | (uint32_t)heth->Init.MACAddr… in HAL_ETH_Init()
411 …heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACA… in HAL_ETH_Init()
412 … ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]); in HAL_ETH_Init()
415 SET_BIT(heth->Instance->MMCRIMR, ETH_MMCRIMR_RXLPITRCIM | ETH_MMCRIMR_RXLPIUSCIM | \ in HAL_ETH_Init()
419 SET_BIT(heth->Instance->MMCTIMR, ETH_MMCTIMR_TXLPITRCIM | ETH_MMCTIMR_TXLPIUSCIM | \ in HAL_ETH_Init()
422 heth->ErrorCode = HAL_ETH_ERROR_NONE; in HAL_ETH_Init()
423 heth->gState = HAL_ETH_STATE_READY; in HAL_ETH_Init()
434 HAL_StatusTypeDef HAL_ETH_DeInit(ETH_HandleTypeDef *heth) in HAL_ETH_DeInit() argument
437 heth->gState = HAL_ETH_STATE_BUSY; in HAL_ETH_DeInit()
441 if (heth->MspDeInitCallback == NULL) in HAL_ETH_DeInit()
443 heth->MspDeInitCallback = HAL_ETH_MspDeInit; in HAL_ETH_DeInit()
446 heth->MspDeInitCallback(heth); in HAL_ETH_DeInit()
450 HAL_ETH_MspDeInit(heth); in HAL_ETH_DeInit()
455 heth->gState = HAL_ETH_STATE_RESET; in HAL_ETH_DeInit()
467 __weak void HAL_ETH_MspInit(ETH_HandleTypeDef *heth) in HAL_ETH_MspInit() argument
470 UNUSED(heth); in HAL_ETH_MspInit()
482 __weak void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth) in HAL_ETH_MspDeInit() argument
485 UNUSED(heth); in HAL_ETH_MspDeInit()
509 HAL_StatusTypeDef HAL_ETH_RegisterCallback(ETH_HandleTypeDef *heth, HAL_ETH_CallbackIDTypeDef Callb… in HAL_ETH_RegisterCallback() argument
517 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_RegisterCallback()
521 if (heth->gState == HAL_ETH_STATE_READY) in HAL_ETH_RegisterCallback()
526 heth->TxCpltCallback = pCallback; in HAL_ETH_RegisterCallback()
530 heth->RxCpltCallback = pCallback; in HAL_ETH_RegisterCallback()
534 heth->ErrorCallback = pCallback; in HAL_ETH_RegisterCallback()
538 heth->PMTCallback = pCallback; in HAL_ETH_RegisterCallback()
542 heth->EEECallback = pCallback; in HAL_ETH_RegisterCallback()
546 heth->WakeUpCallback = pCallback; in HAL_ETH_RegisterCallback()
550 heth->MspInitCallback = pCallback; in HAL_ETH_RegisterCallback()
554 heth->MspDeInitCallback = pCallback; in HAL_ETH_RegisterCallback()
559 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_RegisterCallback()
565 else if (heth->gState == HAL_ETH_STATE_RESET) in HAL_ETH_RegisterCallback()
570 heth->MspInitCallback = pCallback; in HAL_ETH_RegisterCallback()
574 heth->MspDeInitCallback = pCallback; in HAL_ETH_RegisterCallback()
579 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_RegisterCallback()
588 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_RegisterCallback()
612 HAL_StatusTypeDef HAL_ETH_UnRegisterCallback(ETH_HandleTypeDef *heth, HAL_ETH_CallbackIDTypeDef Cal… in HAL_ETH_UnRegisterCallback() argument
616 if (heth->gState == HAL_ETH_STATE_READY) in HAL_ETH_UnRegisterCallback()
621 heth->TxCpltCallback = HAL_ETH_TxCpltCallback; in HAL_ETH_UnRegisterCallback()
625 heth->RxCpltCallback = HAL_ETH_RxCpltCallback; in HAL_ETH_UnRegisterCallback()
629 heth->ErrorCallback = HAL_ETH_ErrorCallback; in HAL_ETH_UnRegisterCallback()
633 heth->PMTCallback = HAL_ETH_PMTCallback; in HAL_ETH_UnRegisterCallback()
637 heth->EEECallback = HAL_ETH_EEECallback; in HAL_ETH_UnRegisterCallback()
641 heth->WakeUpCallback = HAL_ETH_WakeUpCallback; in HAL_ETH_UnRegisterCallback()
645 heth->MspInitCallback = HAL_ETH_MspInit; in HAL_ETH_UnRegisterCallback()
649 heth->MspDeInitCallback = HAL_ETH_MspDeInit; in HAL_ETH_UnRegisterCallback()
654 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_UnRegisterCallback()
660 else if (heth->gState == HAL_ETH_STATE_RESET) in HAL_ETH_UnRegisterCallback()
665 heth->MspInitCallback = HAL_ETH_MspInit; in HAL_ETH_UnRegisterCallback()
669 heth->MspDeInitCallback = HAL_ETH_MspDeInit; in HAL_ETH_UnRegisterCallback()
674 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_UnRegisterCallback()
683 heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK; in HAL_ETH_UnRegisterCallback()
717 HAL_StatusTypeDef HAL_ETH_Start(ETH_HandleTypeDef *heth) in HAL_ETH_Start() argument
719 if (heth->gState == HAL_ETH_STATE_READY) in HAL_ETH_Start()
721 heth->gState = HAL_ETH_STATE_BUSY; in HAL_ETH_Start()
724 heth->RxDescList.RxBuildDescCnt = ETH_RX_DESC_CNT; in HAL_ETH_Start()
727 ETH_UpdateDescriptor(heth); in HAL_ETH_Start()
730 SET_BIT(heth->Instance->MACCR, ETH_MACCR_TE); in HAL_ETH_Start()
733 SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Start()
736 SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ); in HAL_ETH_Start()
739 SET_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST); in HAL_ETH_Start()
742 SET_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR); in HAL_ETH_Start()
745 heth->Instance->DMACSR |= (ETH_DMACSR_TPS | ETH_DMACSR_RPS); in HAL_ETH_Start()
747 heth->gState = HAL_ETH_STATE_STARTED; in HAL_ETH_Start()
763 HAL_StatusTypeDef HAL_ETH_Start_IT(ETH_HandleTypeDef *heth) in HAL_ETH_Start_IT() argument
765 if (heth->gState == HAL_ETH_STATE_READY) in HAL_ETH_Start_IT()
767 heth->gState = HAL_ETH_STATE_BUSY; in HAL_ETH_Start_IT()
770 heth->RxDescList.ItMode = 1U; in HAL_ETH_Start_IT()
773 heth->RxDescList.RxBuildDescCnt = ETH_RX_DESC_CNT; in HAL_ETH_Start_IT()
776 ETH_UpdateDescriptor(heth); in HAL_ETH_Start_IT()
779 SET_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST); in HAL_ETH_Start_IT()
782 SET_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR); in HAL_ETH_Start_IT()
785 heth->Instance->DMACSR |= (ETH_DMACSR_TPS | ETH_DMACSR_RPS); in HAL_ETH_Start_IT()
788 SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ); in HAL_ETH_Start_IT()
791 SET_BIT(heth->Instance->MACCR, ETH_MACCR_TE); in HAL_ETH_Start_IT()
794 SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Start_IT()
801 __HAL_ETH_DMA_ENABLE_IT(heth, (ETH_DMACIER_NIE | ETH_DMACIER_RIE | ETH_DMACIER_TIE | in HAL_ETH_Start_IT()
804 heth->gState = HAL_ETH_STATE_STARTED; in HAL_ETH_Start_IT()
819 HAL_StatusTypeDef HAL_ETH_Stop(ETH_HandleTypeDef *heth) in HAL_ETH_Stop() argument
821 if (heth->gState == HAL_ETH_STATE_STARTED) in HAL_ETH_Stop()
824 heth->gState = HAL_ETH_STATE_BUSY; in HAL_ETH_Stop()
827 CLEAR_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST); in HAL_ETH_Stop()
830 CLEAR_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR); in HAL_ETH_Stop()
833 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Stop()
836 SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ); in HAL_ETH_Stop()
839 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_TE); in HAL_ETH_Stop()
841 heth->gState = HAL_ETH_STATE_READY; in HAL_ETH_Stop()
858 HAL_StatusTypeDef HAL_ETH_Stop_IT(ETH_HandleTypeDef *heth) in HAL_ETH_Stop_IT() argument
863 if (heth->gState == HAL_ETH_STATE_STARTED) in HAL_ETH_Stop_IT()
866 heth->gState = HAL_ETH_STATE_BUSY; in HAL_ETH_Stop_IT()
873 __HAL_ETH_DMA_DISABLE_IT(heth, (ETH_DMACIER_NIE | ETH_DMACIER_RIE | ETH_DMACIER_TIE | in HAL_ETH_Stop_IT()
877 CLEAR_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST); in HAL_ETH_Stop_IT()
880 CLEAR_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR); in HAL_ETH_Stop_IT()
883 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE); in HAL_ETH_Stop_IT()
886 SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ); in HAL_ETH_Stop_IT()
889 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_TE); in HAL_ETH_Stop_IT()
894 dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descindex]; in HAL_ETH_Stop_IT()
898 heth->RxDescList.ItMode = 0U; in HAL_ETH_Stop_IT()
900 heth->gState = HAL_ETH_STATE_READY; in HAL_ETH_Stop_IT()
919 HAL_StatusTypeDef HAL_ETH_Transmit(ETH_HandleTypeDef *heth, ETH_TxPacketConfigTypeDef *pTxConfig, u… in HAL_ETH_Transmit() argument
926 heth->ErrorCode |= HAL_ETH_ERROR_PARAM; in HAL_ETH_Transmit()
930 if (heth->gState == HAL_ETH_STATE_STARTED) in HAL_ETH_Transmit()
933 if (ETH_Prepare_Tx_Descriptors(heth, pTxConfig, 0) != HAL_ETH_ERROR_NONE) in HAL_ETH_Transmit()
936 heth->ErrorCode |= HAL_ETH_ERROR_BUSY; in HAL_ETH_Transmit()
943 dmatxdesc = (ETH_DMADescTypeDef *)(&heth->TxDescList)->TxDesc[heth->TxDescList.CurTxDesc]; in HAL_ETH_Transmit()
946 INCR_TX_DESC_INDEX(heth->TxDescList.CurTxDesc, 1U); in HAL_ETH_Transmit()
950 …WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t)(heth->TxDescList.TxDesc[heth->TxDescList.CurTxDesc… in HAL_ETH_Transmit()
957 if ((heth->Instance->DMACSR & ETH_DMACSR_FBE) != (uint32_t)RESET) in HAL_ETH_Transmit()
959 heth->ErrorCode |= HAL_ETH_ERROR_DMA; in HAL_ETH_Transmit()
960 heth->DMAErrorCode = heth->Instance->DMACSR; in HAL_ETH_Transmit()
970 heth->ErrorCode |= HAL_ETH_ERROR_TIMEOUT; in HAL_ETH_Transmit()
994 HAL_StatusTypeDef HAL_ETH_Transmit_IT(ETH_HandleTypeDef *heth, ETH_TxPacketConfigTypeDef *pTxConfig) in HAL_ETH_Transmit_IT() argument
998 heth->ErrorCode |= HAL_ETH_ERROR_PARAM; in HAL_ETH_Transmit_IT()
1002 if (heth->gState == HAL_ETH_STATE_STARTED) in HAL_ETH_Transmit_IT()
1005 heth->TxDescList.CurrentPacketAddress = (uint32_t *)pTxConfig->pData; in HAL_ETH_Transmit_IT()
1008 if (ETH_Prepare_Tx_Descriptors(heth, pTxConfig, 1) != HAL_ETH_ERROR_NONE) in HAL_ETH_Transmit_IT()
1010 heth->ErrorCode |= HAL_ETH_ERROR_BUSY; in HAL_ETH_Transmit_IT()
1018 INCR_TX_DESC_INDEX(heth->TxDescList.CurTxDesc, 1U); in HAL_ETH_Transmit_IT()
1022 …WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t)(heth->TxDescList.TxDesc[heth->TxDescList.CurTxDesc… in HAL_ETH_Transmit_IT()
1040 HAL_StatusTypeDef HAL_ETH_ReadData(ETH_HandleTypeDef *heth, void **pAppBuff) in HAL_ETH_ReadData() argument
1051 heth->ErrorCode |= HAL_ETH_ERROR_PARAM; in HAL_ETH_ReadData()
1055 if (heth->gState != HAL_ETH_STATE_STARTED) in HAL_ETH_ReadData()
1060 descidx = heth->RxDescList.RxDescIdx; in HAL_ETH_ReadData()
1061 dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx]; in HAL_ETH_ReadData()
1062 desccntmax = ETH_RX_DESC_CNT - heth->RxDescList.RxBuildDescCnt; in HAL_ETH_ReadData()
1071 heth->RxDescList.TimeStamp.TimeStampHigh = dmarxdesc->DESC1; in HAL_ETH_ReadData()
1073 heth->RxDescList.TimeStamp.TimeStampLow = dmarxdesc->DESC0; in HAL_ETH_ReadData()
1075 …if ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET) || (heth->RxDescList.pRx… in HAL_ETH_ReadData()
1080 heth->RxDescList.RxDescCnt = 0; in HAL_ETH_ReadData()
1081 heth->RxDescList.RxDataLength = 0; in HAL_ETH_ReadData()
1085 bufflength = READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_PL) - heth->RxDescList.RxDataLength; in HAL_ETH_ReadData()
1091 heth->RxDescList.pRxLastRxDesc = dmarxdesc->DESC3; in HAL_ETH_ReadData()
1100 heth->rxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd, in HAL_ETH_ReadData()
1104 HAL_ETH_RxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd, in HAL_ETH_ReadData()
1107 heth->RxDescList.RxDescCnt++; in HAL_ETH_ReadData()
1108 heth->RxDescList.RxDataLength += bufflength; in HAL_ETH_ReadData()
1117 dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx]; in HAL_ETH_ReadData()
1121 heth->RxDescList.RxBuildDescCnt += desccnt; in HAL_ETH_ReadData()
1122 if ((heth->RxDescList.RxBuildDescCnt) != 0U) in HAL_ETH_ReadData()
1125 ETH_UpdateDescriptor(heth); in HAL_ETH_ReadData()
1128 heth->RxDescList.RxDescIdx = descidx; in HAL_ETH_ReadData()
1133 *pAppBuff = heth->RxDescList.pRxStart; in HAL_ETH_ReadData()
1135 heth->RxDescList.pRxStart = NULL; in HAL_ETH_ReadData()
1152 static void ETH_UpdateDescriptor(ETH_HandleTypeDef *heth) in ETH_UpdateDescriptor() argument
1161 descidx = heth->RxDescList.RxBuildDescIdx; in ETH_UpdateDescriptor()
1162 dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx]; in ETH_UpdateDescriptor()
1163 desccount = heth->RxDescList.RxBuildDescCnt; in ETH_UpdateDescriptor()
1173 heth->rxAllocateCallback(&buff); in ETH_UpdateDescriptor()
1192 if (heth->RxDescList.ItMode != 0U) in ETH_UpdateDescriptor()
1204 dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx]; in ETH_UpdateDescriptor()
1209 if (heth->RxDescList.RxBuildDescCnt != desccount) in ETH_UpdateDescriptor()
1218 WRITE_REG(heth->Instance->DMACRDTPR, ((uint32_t)(heth->Init.RxDesc + (tailidx)))); in ETH_UpdateDescriptor()
1220 heth->RxDescList.RxBuildDescIdx = descidx; in ETH_UpdateDescriptor()
1221 heth->RxDescList.RxBuildDescCnt = desccount; in ETH_UpdateDescriptor()
1232 HAL_StatusTypeDef HAL_ETH_RegisterRxAllocateCallback(ETH_HandleTypeDef *heth, in HAL_ETH_RegisterRxAllocateCallback() argument
1242 heth->rxAllocateCallback = rxAllocateCallback; in HAL_ETH_RegisterRxAllocateCallback()
1253 HAL_StatusTypeDef HAL_ETH_UnRegisterRxAllocateCallback(ETH_HandleTypeDef *heth) in HAL_ETH_UnRegisterRxAllocateCallback() argument
1256 heth->rxAllocateCallback = HAL_ETH_RxAllocateCallback; in HAL_ETH_UnRegisterRxAllocateCallback()
1302 HAL_StatusTypeDef HAL_ETH_RegisterRxLinkCallback(ETH_HandleTypeDef *heth, pETH_rxLinkCallbackTypeDe… in HAL_ETH_RegisterRxLinkCallback() argument
1311 heth->rxLinkCallback = rxLinkCallback; in HAL_ETH_RegisterRxLinkCallback()
1322 HAL_StatusTypeDef HAL_ETH_UnRegisterRxLinkCallback(ETH_HandleTypeDef *heth) in HAL_ETH_UnRegisterRxLinkCallback() argument
1325 heth->rxLinkCallback = HAL_ETH_RxLinkCallback; in HAL_ETH_UnRegisterRxLinkCallback()
1337 HAL_StatusTypeDef HAL_ETH_GetRxDataErrorCode(const ETH_HandleTypeDef *heth, uint32_t *pErrorCode) in HAL_ETH_GetRxDataErrorCode() argument
1340 *pErrorCode = READ_BIT(heth->RxDescList.pRxLastRxDesc, ETH_DMARXNDESCWBF_ERRORS_MASK); in HAL_ETH_GetRxDataErrorCode()
1352 HAL_StatusTypeDef HAL_ETH_RegisterTxFreeCallback(ETH_HandleTypeDef *heth, pETH_txFreeCallbackTypeDe… in HAL_ETH_RegisterTxFreeCallback() argument
1361 heth->txFreeCallback = txFreeCallback; in HAL_ETH_RegisterTxFreeCallback()
1372 HAL_StatusTypeDef HAL_ETH_UnRegisterTxFreeCallback(ETH_HandleTypeDef *heth) in HAL_ETH_UnRegisterTxFreeCallback() argument
1375 heth->txFreeCallback = HAL_ETH_TxFreeCallback; in HAL_ETH_UnRegisterTxFreeCallback()
1400 HAL_StatusTypeDef HAL_ETH_ReleaseTxPacket(ETH_HandleTypeDef *heth) in HAL_ETH_ReleaseTxPacket() argument
1402 ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList; in HAL_ETH_ReleaseTxPacket()
1408 ETH_TimeStampTypeDef *timestamp = &heth->TxTimestamp; in HAL_ETH_ReleaseTxPacket()
1427 if ((heth->Init.TxDesc[idx].DESC3 & ETH_DMATXNDESCRF_OWN) == 0U) in HAL_ETH_ReleaseTxPacket()
1432 CLEAR_BIT(heth->Init.TxDesc[idx].DESC3, (0x40000000U)); in HAL_ETH_ReleaseTxPacket()
1434 if ((heth->Init.TxDesc[idx].DESC3 & ETH_DMATXNDESCWBF_LD) in HAL_ETH_ReleaseTxPacket()
1435 && (heth->Init.TxDesc[idx].DESC3 & ETH_DMATXNDESCWBF_TTSS)) in HAL_ETH_ReleaseTxPacket()
1438 timestamp->TimeStampLow = heth->Init.TxDesc[idx].DESC0; in HAL_ETH_ReleaseTxPacket()
1440 timestamp->TimeStampHigh = heth->Init.TxDesc[idx].DESC1; in HAL_ETH_ReleaseTxPacket()
1454 heth->txPtpCallback(dmatxdesclist->PacketAddress[idx], timestamp); in HAL_ETH_ReleaseTxPacket()
1458 heth->txFreeCallback(dmatxdesclist->PacketAddress[idx]); in HAL_ETH_ReleaseTxPacket()
1499 HAL_StatusTypeDef HAL_ETH_PTP_SetConfig(ETH_HandleTypeDef *heth, ETH_PTP_ConfigTypeDef *ptpconfig) in HAL_ETH_PTP_SetConfig() argument
1525 MODIFY_REG(heth->Instance->MACTSCR, ETH_MACTSCR_MASK, tmpTSCR); in HAL_ETH_PTP_SetConfig()
1528 SET_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSENA); in HAL_ETH_PTP_SetConfig()
1529 WRITE_REG(heth->Instance->MACSSIR, ptpconfig->TimestampSubsecondInc); in HAL_ETH_PTP_SetConfig()
1530 WRITE_REG(heth->Instance->MACTSAR, ptpconfig->TimestampAddend); in HAL_ETH_PTP_SetConfig()
1535 SET_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSADDREG); in HAL_ETH_PTP_SetConfig()
1536 while ((heth->Instance->MACTSCR & ETH_MACTSCR_TSADDREG) != 0) in HAL_ETH_PTP_SetConfig()
1543 SET_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSINIT); in HAL_ETH_PTP_SetConfig()
1546 heth->IsPtpConfigured = HAL_ETH_PTP_CONFIGURED; in HAL_ETH_PTP_SetConfig()
1549 time.Seconds = heth->Instance->MACSTSR; in HAL_ETH_PTP_SetConfig()
1551 time.NanoSeconds = heth->Instance->MACSTNR; in HAL_ETH_PTP_SetConfig()
1553 HAL_ETH_PTP_SetTime(heth, &time); in HAL_ETH_PTP_SetConfig()
1567 HAL_StatusTypeDef HAL_ETH_PTP_GetConfig(ETH_HandleTypeDef *heth, ETH_PTP_ConfigTypeDef *ptpconfig) in HAL_ETH_PTP_GetConfig() argument
1573 ptpconfig->Timestamp = READ_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSENA); in HAL_ETH_PTP_GetConfig()
1574 ptpconfig->TimestampUpdate = ((READ_BIT(heth->Instance->MACTSCR, in HAL_ETH_PTP_GetConfig()
1576 ptpconfig->TimestampAll = ((READ_BIT(heth->Instance->MACTSCR, in HAL_ETH_PTP_GetConfig()
1578 ptpconfig->TimestampRolloverMode = ((READ_BIT(heth->Instance->MACTSCR, in HAL_ETH_PTP_GetConfig()
1581 ptpconfig->TimestampV2 = ((READ_BIT(heth->Instance->MACTSCR, in HAL_ETH_PTP_GetConfig()
1583 ptpconfig->TimestampEthernet = ((READ_BIT(heth->Instance->MACTSCR, in HAL_ETH_PTP_GetConfig()
1585 ptpconfig->TimestampIPv6 = ((READ_BIT(heth->Instance->MACTSCR, in HAL_ETH_PTP_GetConfig()
1587 ptpconfig->TimestampIPv4 = ((READ_BIT(heth->Instance->MACTSCR, in HAL_ETH_PTP_GetConfig()
1589 ptpconfig->TimestampEvent = ((READ_BIT(heth->Instance->MACTSCR, in HAL_ETH_PTP_GetConfig()
1591 ptpconfig->TimestampMaster = ((READ_BIT(heth->Instance->MACTSCR, in HAL_ETH_PTP_GetConfig()
1593 ptpconfig->TimestampSnapshots = ((READ_BIT(heth->Instance->MACTSCR, in HAL_ETH_PTP_GetConfig()
1596 ptpconfig->TimestampFilter = ((READ_BIT(heth->Instance->MACTSCR, in HAL_ETH_PTP_GetConfig()
1599 ptpconfig->TimestampChecksumCorrection = ((READ_BIT(heth->Instance->MACTSCR, in HAL_ETH_PTP_GetConfig()
1601 ptpconfig->TimestampStatusMode = ((READ_BIT(heth->Instance->MACTSCR, in HAL_ETH_PTP_GetConfig()
1617 HAL_StatusTypeDef HAL_ETH_PTP_SetTime(ETH_HandleTypeDef *heth, ETH_TimeTypeDef *time) in HAL_ETH_PTP_SetTime() argument
1619 if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) in HAL_ETH_PTP_SetTime()
1622 heth->Instance->MACSTSUR = time->Seconds; in HAL_ETH_PTP_SetTime()
1625 heth->Instance->MACSTNUR = time->NanoSeconds; in HAL_ETH_PTP_SetTime()
1628 SET_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSUPDT); in HAL_ETH_PTP_SetTime()
1648 HAL_StatusTypeDef HAL_ETH_PTP_GetTime(ETH_HandleTypeDef *heth, ETH_TimeTypeDef *time) in HAL_ETH_PTP_GetTime() argument
1650 if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) in HAL_ETH_PTP_GetTime()
1653 time->Seconds = heth->Instance->MACSTSR; in HAL_ETH_PTP_GetTime()
1655 time->NanoSeconds = heth->Instance->MACSTNR; in HAL_ETH_PTP_GetTime()
1675 HAL_StatusTypeDef HAL_ETH_PTP_AddTimeOffset(ETH_HandleTypeDef *heth, ETH_PtpUpdateTypeDef ptpoffset… in HAL_ETH_PTP_AddTimeOffset() argument
1678 if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) in HAL_ETH_PTP_AddTimeOffset()
1683 heth->Instance->MACSTSUR = ETH_MACSTSUR_VALUE - timeoffset->Seconds + 1U; in HAL_ETH_PTP_AddTimeOffset()
1685 if (READ_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSCTRLSSR) == ETH_MACTSCR_TSCTRLSSR) in HAL_ETH_PTP_AddTimeOffset()
1688 heth->Instance->MACSTNUR = ETH_MACSTNUR_VALUE - timeoffset->NanoSeconds; in HAL_ETH_PTP_AddTimeOffset()
1693 heth->Instance->MACSTNUR = ETH_MACSTSUR_VALUE - timeoffset->NanoSeconds + 1U; in HAL_ETH_PTP_AddTimeOffset()
1699 heth->Instance->MACSTSUR = timeoffset->Seconds; in HAL_ETH_PTP_AddTimeOffset()
1701 heth->Instance->MACSTNUR = timeoffset->NanoSeconds; in HAL_ETH_PTP_AddTimeOffset()
1704 SET_BIT(heth->Instance->MACTSCR, ETH_MACTSCR_TSUPDT); in HAL_ETH_PTP_AddTimeOffset()
1722 HAL_StatusTypeDef HAL_ETH_PTP_InsertTxTimestamp(ETH_HandleTypeDef *heth) in HAL_ETH_PTP_InsertTxTimestamp() argument
1724 ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList; in HAL_ETH_PTP_InsertTxTimestamp()
1728 if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) in HAL_ETH_PTP_InsertTxTimestamp()
1751 HAL_StatusTypeDef HAL_ETH_PTP_GetTxTimestamp(ETH_HandleTypeDef *heth, ETH_TimeStampTypeDef *timesta… in HAL_ETH_PTP_GetTxTimestamp() argument
1753 ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList; in HAL_ETH_PTP_GetTxTimestamp()
1757 if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) in HAL_ETH_PTP_GetTxTimestamp()
1782 HAL_StatusTypeDef HAL_ETH_PTP_GetRxTimestamp(ETH_HandleTypeDef *heth, ETH_TimeStampTypeDef *timesta… in HAL_ETH_PTP_GetRxTimestamp() argument
1784 if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) in HAL_ETH_PTP_GetRxTimestamp()
1787 timestamp->TimeStampLow = heth->RxDescList.TimeStamp.TimeStampLow; in HAL_ETH_PTP_GetRxTimestamp()
1789 timestamp->TimeStampHigh = heth->RxDescList.TimeStamp.TimeStampHigh; in HAL_ETH_PTP_GetRxTimestamp()
1808 HAL_StatusTypeDef HAL_ETH_RegisterTxPtpCallback(ETH_HandleTypeDef *heth, pETH_txPtpCallbackTypeDef … in HAL_ETH_RegisterTxPtpCallback() argument
1816 heth->txPtpCallback = txPtpCallback; in HAL_ETH_RegisterTxPtpCallback()
1827 HAL_StatusTypeDef HAL_ETH_UnRegisterTxPtpCallback(ETH_HandleTypeDef *heth) in HAL_ETH_UnRegisterTxPtpCallback() argument
1830 heth->txPtpCallback = HAL_ETH_TxPtpCallback; in HAL_ETH_UnRegisterTxPtpCallback()
1858 void HAL_ETH_IRQHandler(ETH_HandleTypeDef *heth) in HAL_ETH_IRQHandler() argument
1860 uint32_t mac_flag = READ_REG(heth->Instance->MACISR); in HAL_ETH_IRQHandler()
1861 uint32_t dma_flag = READ_REG(heth->Instance->DMACSR); in HAL_ETH_IRQHandler()
1862 uint32_t dma_itsource = READ_REG(heth->Instance->DMACIER); in HAL_ETH_IRQHandler()
1869 __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMACSR_RI | ETH_DMACSR_NIS); in HAL_ETH_IRQHandler()
1873 heth->RxCpltCallback(heth); in HAL_ETH_IRQHandler()
1876 HAL_ETH_RxCpltCallback(heth); in HAL_ETH_IRQHandler()
1884 __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMACSR_TI | ETH_DMACSR_NIS); in HAL_ETH_IRQHandler()
1888 heth->TxCpltCallback(heth); in HAL_ETH_IRQHandler()
1891 HAL_ETH_TxCpltCallback(heth); in HAL_ETH_IRQHandler()
1898 heth->ErrorCode |= HAL_ETH_ERROR_DMA; in HAL_ETH_IRQHandler()
1903 …heth->DMAErrorCode = READ_BIT(heth->Instance->DMACSR, (ETH_DMACSR_FBE | ETH_DMACSR_TPS | ETH_DMACS… in HAL_ETH_IRQHandler()
1906 __HAL_ETH_DMA_DISABLE_IT(heth, ETH_DMACIER_NIE | ETH_DMACIER_AIE); in HAL_ETH_IRQHandler()
1909 heth->gState = HAL_ETH_STATE_ERROR; in HAL_ETH_IRQHandler()
1914 …heth->DMAErrorCode = READ_BIT(heth->Instance->DMACSR, (ETH_DMACSR_CDE | ETH_DMACSR_ETI | ETH_DMACS… in HAL_ETH_IRQHandler()
1918 __HAL_ETH_DMA_CLEAR_IT(heth, (ETH_DMACSR_CDE | ETH_DMACSR_ETI | ETH_DMACSR_RWT | in HAL_ETH_IRQHandler()
1923 heth->ErrorCallback(heth); in HAL_ETH_IRQHandler()
1926 HAL_ETH_ErrorCallback(heth); in HAL_ETH_IRQHandler()
1934 heth->ErrorCode |= HAL_ETH_ERROR_MAC; in HAL_ETH_IRQHandler()
1937 heth->MACErrorCode = READ_REG(heth->Instance->MACRXTXSR); in HAL_ETH_IRQHandler()
1939 heth->gState = HAL_ETH_STATE_ERROR; in HAL_ETH_IRQHandler()
1943 heth->ErrorCallback(heth); in HAL_ETH_IRQHandler()
1946 HAL_ETH_ErrorCallback(heth); in HAL_ETH_IRQHandler()
1948 heth->MACErrorCode = (uint32_t)(0x0U); in HAL_ETH_IRQHandler()
1955 …heth->MACWakeUpEvent = READ_BIT(heth->Instance->MACPCSR, (ETH_MACPCSR_RWKPRCVD | ETH_MACPCSR_MGKPR… in HAL_ETH_IRQHandler()
1959 heth->PMTCallback(heth); in HAL_ETH_IRQHandler()
1962 HAL_ETH_PMTCallback(heth); in HAL_ETH_IRQHandler()
1965 heth->MACWakeUpEvent = (uint32_t)(0x0U); in HAL_ETH_IRQHandler()
1972 heth->MACLPIEvent = READ_BIT(heth->Instance->MACPCSR, 0x0000000FU); in HAL_ETH_IRQHandler()
1976 heth->EEECallback(heth); in HAL_ETH_IRQHandler()
1979 HAL_ETH_EEECallback(heth); in HAL_ETH_IRQHandler()
1982 heth->MACLPIEvent = (uint32_t)(0x0U); in HAL_ETH_IRQHandler()
1992 heth->WakeUpCallback(heth); in HAL_ETH_IRQHandler()
1995 HAL_ETH_WakeUpCallback(heth); in HAL_ETH_IRQHandler()
2006 __weak void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *heth) in HAL_ETH_TxCpltCallback() argument
2009 UNUSED(heth); in HAL_ETH_TxCpltCallback()
2021 __weak void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth) in HAL_ETH_RxCpltCallback() argument
2024 UNUSED(heth); in HAL_ETH_RxCpltCallback()
2036 __weak void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth) in HAL_ETH_ErrorCallback() argument
2039 UNUSED(heth); in HAL_ETH_ErrorCallback()
2051 __weak void HAL_ETH_PMTCallback(ETH_HandleTypeDef *heth) in HAL_ETH_PMTCallback() argument
2054 UNUSED(heth); in HAL_ETH_PMTCallback()
2066 __weak void HAL_ETH_EEECallback(ETH_HandleTypeDef *heth) in HAL_ETH_EEECallback() argument
2069 UNUSED(heth); in HAL_ETH_EEECallback()
2081 __weak void HAL_ETH_WakeUpCallback(ETH_HandleTypeDef *heth) in HAL_ETH_WakeUpCallback() argument
2084 UNUSED(heth); in HAL_ETH_WakeUpCallback()
2099 HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYRe… in HAL_ETH_ReadPHYRegister() argument
2106 if (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) != (uint32_t)RESET) in HAL_ETH_ReadPHYRegister()
2112 WRITE_REG(tmpreg, heth->Instance->MACMDIOAR); in HAL_ETH_ReadPHYRegister()
2126 WRITE_REG(heth->Instance->MACMDIOAR, tmpreg); in HAL_ETH_ReadPHYRegister()
2131 while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U) in HAL_ETH_ReadPHYRegister()
2140 WRITE_REG(*pRegValue, (uint16_t)heth->Instance->MACMDIODR); in HAL_ETH_ReadPHYRegister()
2154 HAL_StatusTypeDef HAL_ETH_WritePHYRegister(const ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_… in HAL_ETH_WritePHYRegister() argument
2161 if (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) != (uint32_t)RESET) in HAL_ETH_WritePHYRegister()
2167 WRITE_REG(tmpreg, heth->Instance->MACMDIOAR); in HAL_ETH_WritePHYRegister()
2189 while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U) in HAL_ETH_WritePHYRegister()
2226 HAL_StatusTypeDef HAL_ETH_GetMACConfig(const ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *macconf) in HAL_ETH_GetMACConfig() argument
2234 macconf->PreambleLength = READ_BIT(heth->Instance->MACCR, ETH_MACCR_PRELEN); in HAL_ETH_GetMACConfig()
2235 …macconf->DeferralCheck = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DC) >> 4) > 0U) ? ENABLE : DI… in HAL_ETH_GetMACConfig()
2236 macconf->BackOffLimit = READ_BIT(heth->Instance->MACCR, ETH_MACCR_BL); in HAL_ETH_GetMACConfig()
2237 …macconf->RetryTransmission = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DR) >> 8) == 0U) ? ENABLE… in HAL_ETH_GetMACConfig()
2238 …macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U) in HAL_ETH_GetMACConfig()
2240 …macconf->ReceiveOwn = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DO) >> 10) == 0U) ? ENABLE : DIS… in HAL_ETH_GetMACConfig()
2241 macconf->CarrierSenseBeforeTransmit = ((READ_BIT(heth->Instance->MACCR, in HAL_ETH_GetMACConfig()
2243 …macconf->LoopbackMode = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_LM) >> 12) > 0U) ? ENABLE : DI… in HAL_ETH_GetMACConfig()
2244 macconf->DuplexMode = READ_BIT(heth->Instance->MACCR, ETH_MACCR_DM); in HAL_ETH_GetMACConfig()
2245 macconf->Speed = READ_BIT(heth->Instance->MACCR, ETH_MACCR_FES); in HAL_ETH_GetMACConfig()
2246 …macconf->JumboPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JE) >> 16) > 0U) ? ENABLE : DIS… in HAL_ETH_GetMACConfig()
2247 …macconf->Jabber = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JD) >> 17) == 0U) ? ENABLE : DISABLE; in HAL_ETH_GetMACConfig()
2248 …macconf->Watchdog = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_WD) >> 19) == 0U) ? ENABLE : DISAB… in HAL_ETH_GetMACConfig()
2249 …macconf->AutomaticPadCRCStrip = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_ACS) >> 20) > 0U) ? EN… in HAL_ETH_GetMACConfig()
2250 …macconf->CRCStripTypePacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_CST) >> 21) > 0U) ? ENAB… in HAL_ETH_GetMACConfig()
2251 …macconf->Support2KPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_S2KP) >> 22) > 0U) ? ENABLE… in HAL_ETH_GetMACConfig()
2252 macconf->GiantPacketSizeLimitControl = ((READ_BIT(heth->Instance->MACCR, in HAL_ETH_GetMACConfig()
2254 macconf->InterPacketGapVal = READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPG); in HAL_ETH_GetMACConfig()
2255 …macconf->ChecksumOffload = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPC) >> 27) > 0U) ? ENABLE … in HAL_ETH_GetMACConfig()
2256 macconf->SourceAddrControl = READ_BIT(heth->Instance->MACCR, ETH_MACCR_SARC); in HAL_ETH_GetMACConfig()
2258 macconf->GiantPacketSizeLimit = READ_BIT(heth->Instance->MACECR, ETH_MACECR_GPSL); in HAL_ETH_GetMACConfig()
2259 …macconf->CRCCheckingRxPackets = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_DCRCC) >> 16) == 0U)… in HAL_ETH_GetMACConfig()
2260 …macconf->SlowProtocolDetect = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_SPEN) >> 17) > 0U) ? E… in HAL_ETH_GetMACConfig()
2261 macconf->UnicastSlowProtocolPacketDetect = ((READ_BIT(heth->Instance->MACECR, in HAL_ETH_GetMACConfig()
2263 …macconf->ExtendedInterPacketGap = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPGEN) >> 24) > 0… in HAL_ETH_GetMACConfig()
2265 macconf->ExtendedInterPacketGapVal = READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPG) >> 25; in HAL_ETH_GetMACConfig()
2267 …macconf->ProgrammableWatchdog = ((READ_BIT(heth->Instance->MACWTR, ETH_MACWTR_PWE) >> 8) > 0U) ? E… in HAL_ETH_GetMACConfig()
2268 macconf->WatchdogTimeout = READ_BIT(heth->Instance->MACWTR, ETH_MACWTR_WTO); in HAL_ETH_GetMACConfig()
2270 …macconf->TransmitFlowControl = ((READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_TFE) >> 1) > 0U) ? … in HAL_ETH_GetMACConfig()
2271 …macconf->ZeroQuantaPause = ((READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_DZPQ) >> 7) == 0U) ? EN… in HAL_ETH_GetMACConfig()
2272 macconf->PauseLowThreshold = READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_PLT); in HAL_ETH_GetMACConfig()
2273 macconf->PauseTime = (READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_PT) >> 16); in HAL_ETH_GetMACConfig()
2274 …macconf->ReceiveFlowControl = (READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_RFE) > 0U) ? ENABLE :… in HAL_ETH_GetMACConfig()
2275 …macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_UP) >> 1) > 0U) in HAL_ETH_GetMACConfig()
2278 …macconf->TransmitQueueMode = READ_BIT(heth->Instance->MTLTQOMR, (ETH_MTLTQOMR_TTC | ETH_MTLTQOMR_T… in HAL_ETH_GetMACConfig()
2280 …macconf->ReceiveQueueMode = READ_BIT(heth->Instance->MTLRQOMR, (ETH_MTLRQOMR_RTC | ETH_MTLRQOMR_RS… in HAL_ETH_GetMACConfig()
2281 macconf->ForwardRxUndersizedGoodPacket = ((READ_BIT(heth->Instance->MTLRQOMR, in HAL_ETH_GetMACConfig()
2283 …macconf->ForwardRxErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR, ETH_MTLRQOMR_FEP) >> 4) > 0U)… in HAL_ETH_GetMACConfig()
2284 macconf->DropTCPIPChecksumErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR, in HAL_ETH_GetMACConfig()
2298 HAL_StatusTypeDef HAL_ETH_GetDMAConfig(const ETH_HandleTypeDef *heth, ETH_DMAConfigTypeDef *dmaconf) in HAL_ETH_GetDMAConfig() argument
2305 …dmaconf->AddressAlignedBeats = ((READ_BIT(heth->Instance->DMASBMR, ETH_DMASBMR_AAL) >> 12) > 0U) ?… in HAL_ETH_GetDMAConfig()
2306 dmaconf->BurstMode = READ_BIT(heth->Instance->DMASBMR, ETH_DMASBMR_FB | ETH_DMASBMR_MB); in HAL_ETH_GetDMAConfig()
2307 …dmaconf->RebuildINCRxBurst = ((READ_BIT(heth->Instance->DMASBMR, ETH_DMASBMR_RB) >> 15) > 0U) ? EN… in HAL_ETH_GetDMAConfig()
2309 …dmaconf->DMAArbitration = READ_BIT(heth->Instance->DMAMR, (ETH_DMAMR_TXPR | ETH_DMAMR_PR | ETH_DMA… in HAL_ETH_GetDMAConfig()
2311 …dmaconf->PBLx8Mode = ((READ_BIT(heth->Instance->DMACCR, ETH_DMACCR_8PBL) >> 16) > 0U) ? ENABLE : D… in HAL_ETH_GetDMAConfig()
2312 dmaconf->MaximumSegmentSize = READ_BIT(heth->Instance->DMACCR, ETH_DMACCR_MSS); in HAL_ETH_GetDMAConfig()
2314 …dmaconf->FlushRxPacket = ((READ_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_RPF) >> 31) > 0U) ? ENAB… in HAL_ETH_GetDMAConfig()
2315 dmaconf->RxDMABurstLength = READ_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_RPBL); in HAL_ETH_GetDMAConfig()
2317 …dmaconf->SecondPacketOperate = ((READ_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_OSP) >> 4) > 0U) ? … in HAL_ETH_GetDMAConfig()
2318 …dmaconf->TCPSegmentation = ((READ_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_TSE) >> 12) > 0U) ? ENA… in HAL_ETH_GetDMAConfig()
2319 dmaconf->TxDMABurstLength = READ_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_TPBL); in HAL_ETH_GetDMAConfig()
2332 HAL_StatusTypeDef HAL_ETH_SetMACConfig(ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *macconf) in HAL_ETH_SetMACConfig() argument
2339 if (heth->gState == HAL_ETH_STATE_READY) in HAL_ETH_SetMACConfig()
2341 ETH_SetMACConfig(heth, macconf); in HAL_ETH_SetMACConfig()
2359 HAL_StatusTypeDef HAL_ETH_SetDMAConfig(ETH_HandleTypeDef *heth, ETH_DMAConfigTypeDef *dmaconf) in HAL_ETH_SetDMAConfig() argument
2366 if (heth->gState == HAL_ETH_STATE_READY) in HAL_ETH_SetDMAConfig()
2368 ETH_SetDMAConfig(heth, dmaconf); in HAL_ETH_SetDMAConfig()
2384 void HAL_ETH_SetMDIOClockRange(ETH_HandleTypeDef *heth) in HAL_ETH_SetMDIOClockRange() argument
2390 tmpreg = (heth->Instance)->MACMDIOAR; in HAL_ETH_SetMDIOClockRange()
2431 (heth->Instance)->MACMDIOAR = (uint32_t)tmpreg; in HAL_ETH_SetMDIOClockRange()
2442 HAL_StatusTypeDef HAL_ETH_SetMACFilterConfig(ETH_HandleTypeDef *heth, const ETH_MACFilterConfigType… in HAL_ETH_SetMACFilterConfig() argument
2463 MODIFY_REG(heth->Instance->MACPFR, ETH_MACPFR_MASK, filterconfig); in HAL_ETH_SetMACFilterConfig()
2476 HAL_StatusTypeDef HAL_ETH_GetMACFilterConfig(const ETH_HandleTypeDef *heth, ETH_MACFilterConfigType… in HAL_ETH_GetMACFilterConfig() argument
2483 …pFilterConfig->PromiscuousMode = ((READ_BIT(heth->Instance->MACPFR, ETH_MACPFR_PR)) > 0U) ? ENABLE… in HAL_ETH_GetMACFilterConfig()
2484 …pFilterConfig->HashUnicast = ((READ_BIT(heth->Instance->MACPFR, ETH_MACPFR_HUC) >> 1) > 0U) ? ENAB… in HAL_ETH_GetMACFilterConfig()
2485 …pFilterConfig->HashMulticast = ((READ_BIT(heth->Instance->MACPFR, ETH_MACPFR_HMC) >> 2) > 0U) ? EN… in HAL_ETH_GetMACFilterConfig()
2486 pFilterConfig->DestAddrInverseFiltering = ((READ_BIT(heth->Instance->MACPFR, in HAL_ETH_GetMACFilterConfig()
2488 …pFilterConfig->PassAllMulticast = ((READ_BIT(heth->Instance->MACPFR, ETH_MACPFR_PM) >> 4) > 0U) ? … in HAL_ETH_GetMACFilterConfig()
2489 …pFilterConfig->BroadcastFilter = ((READ_BIT(heth->Instance->MACPFR, ETH_MACPFR_DBF) >> 5) == 0U) ?… in HAL_ETH_GetMACFilterConfig()
2490 pFilterConfig->ControlPacketsFilter = READ_BIT(heth->Instance->MACPFR, ETH_MACPFR_PCF); in HAL_ETH_GetMACFilterConfig()
2491 pFilterConfig->SrcAddrInverseFiltering = ((READ_BIT(heth->Instance->MACPFR, in HAL_ETH_GetMACFilterConfig()
2493 …pFilterConfig->SrcAddrFiltering = ((READ_BIT(heth->Instance->MACPFR, ETH_MACPFR_SAF) >> 9) > 0U) ?… in HAL_ETH_GetMACFilterConfig()
2494 …pFilterConfig->HachOrPerfectFilter = ((READ_BIT(heth->Instance->MACPFR, ETH_MACPFR_HPF) >> 10) > 0… in HAL_ETH_GetMACFilterConfig()
2496 …pFilterConfig->ReceiveAllMode = ((READ_BIT(heth->Instance->MACPFR, ETH_MACPFR_RA) >> 31) > 0U) ? E… in HAL_ETH_GetMACFilterConfig()
2513 HAL_StatusTypeDef HAL_ETH_SetSourceMACAddrMatch(const ETH_HandleTypeDef *heth, uint32_t AddrNbr, in HAL_ETH_SetSourceMACAddrMatch() argument
2525 macaddrhr = ((uint32_t) &(heth->Instance->MACA0HR) + AddrNbr); in HAL_ETH_SetSourceMACAddrMatch()
2527 macaddrlr = ((uint32_t) &(heth->Instance->MACA0LR) + AddrNbr); in HAL_ETH_SetSourceMACAddrMatch()
2549 HAL_StatusTypeDef HAL_ETH_SetHashTable(ETH_HandleTypeDef *heth, uint32_t *pHashTable) in HAL_ETH_SetHashTable() argument
2556 heth->Instance->MACHT0R = pHashTable[0]; in HAL_ETH_SetHashTable()
2557 heth->Instance->MACHT1R = pHashTable[1]; in HAL_ETH_SetHashTable()
2571 void HAL_ETH_SetRxVLANIdentifier(ETH_HandleTypeDef *heth, uint32_t ComparisonBits, uint32_t VLANIde… in HAL_ETH_SetRxVLANIdentifier() argument
2575 MODIFY_REG(heth->Instance->MACVTR, ETH_MACVTR_VL, VLANIdentifier); in HAL_ETH_SetRxVLANIdentifier()
2576 CLEAR_BIT(heth->Instance->MACVTR, ETH_MACVTR_ETV); in HAL_ETH_SetRxVLANIdentifier()
2580 MODIFY_REG(heth->Instance->MACVTR, ETH_MACVTR_VL_VID, VLANIdentifier); in HAL_ETH_SetRxVLANIdentifier()
2581 SET_BIT(heth->Instance->MACVTR, ETH_MACVTR_ETV); in HAL_ETH_SetRxVLANIdentifier()
2593 void HAL_ETH_EnterPowerDownMode(ETH_HandleTypeDef *heth, const ETH_PowerDownConfigTypeDef *pPowerDo… in HAL_ETH_EnterPowerDownMode() argument
2604 __HAL_ETH_MAC_ENABLE_IT(heth, ETH_MACIER_PMTIE); in HAL_ETH_EnterPowerDownMode()
2606 MODIFY_REG(heth->Instance->MACPCSR, ETH_MACPCSR_MASK, powerdownconfig); in HAL_ETH_EnterPowerDownMode()
2615 void HAL_ETH_ExitPowerDownMode(ETH_HandleTypeDef *heth) in HAL_ETH_ExitPowerDownMode() argument
2618 …CLEAR_BIT(heth->Instance->MACPCSR, ETH_MACPCSR_RWKPKTEN | ETH_MACPCSR_MGKPKTEN | ETH_MACPCSR_GLBLU… in HAL_ETH_ExitPowerDownMode()
2621 if (READ_BIT(heth->Instance->MACPCSR, ETH_MACPCSR_PWRDWN) != (uint32_t)RESET) in HAL_ETH_ExitPowerDownMode()
2624 CLEAR_BIT(heth->Instance->MACPCSR, ETH_MACPCSR_PWRDWN); in HAL_ETH_ExitPowerDownMode()
2628 __HAL_ETH_MAC_DISABLE_IT(heth, ETH_MACIER_PMTIE); in HAL_ETH_ExitPowerDownMode()
2639 HAL_StatusTypeDef HAL_ETH_SetWakeUpFilter(ETH_HandleTypeDef *heth, uint32_t *pFilter, uint32_t Coun… in HAL_ETH_SetWakeUpFilter() argument
2649 SET_BIT(heth->Instance->MACPCSR, ETH_MACPCSR_RWKFILTRST); in HAL_ETH_SetWakeUpFilter()
2655 WRITE_REG(heth->Instance->MACRWKPFR, pFilter[regindex]); in HAL_ETH_SetWakeUpFilter()
2688 HAL_ETH_StateTypeDef HAL_ETH_GetState(const ETH_HandleTypeDef *heth) in HAL_ETH_GetState() argument
2690 return heth->gState; in HAL_ETH_GetState()
2699 uint32_t HAL_ETH_GetError(const ETH_HandleTypeDef *heth) in HAL_ETH_GetError() argument
2701 return heth->ErrorCode; in HAL_ETH_GetError()
2710 uint32_t HAL_ETH_GetDMAError(const ETH_HandleTypeDef *heth) in HAL_ETH_GetDMAError() argument
2712 return heth->DMAErrorCode; in HAL_ETH_GetDMAError()
2721 uint32_t HAL_ETH_GetMACError(const ETH_HandleTypeDef *heth) in HAL_ETH_GetMACError() argument
2723 return heth->MACErrorCode; in HAL_ETH_GetMACError()
2732 uint32_t HAL_ETH_GetMACWakeUpSource(const ETH_HandleTypeDef *heth) in HAL_ETH_GetMACWakeUpSource() argument
2734 return heth->MACWakeUpEvent; in HAL_ETH_GetMACWakeUpSource()
2749 static void ETH_SetMACConfig(ETH_HandleTypeDef *heth, const ETH_MACConfigTypeDef *macconf) in ETH_SetMACConfig() argument
2776 MODIFY_REG(heth->Instance->MACCR, ETH_MACCR_MASK, macregval); in ETH_SetMACConfig()
2787 MODIFY_REG(heth->Instance->MACECR, ETH_MACECR_MASK, macregval); in ETH_SetMACConfig()
2794 MODIFY_REG(heth->Instance->MACWTR, ETH_MACWTR_MASK, macregval); in ETH_SetMACConfig()
2803 MODIFY_REG(heth->Instance->MACTFCR, ETH_MACTFCR_MASK, macregval); in ETH_SetMACConfig()
2810 MODIFY_REG(heth->Instance->MACRFCR, ETH_MACRFCR_MASK, macregval); in ETH_SetMACConfig()
2814 MODIFY_REG(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_MASK, macconf->TransmitQueueMode); in ETH_SetMACConfig()
2823 MODIFY_REG(heth->Instance->MTLRQOMR, ETH_MTLRQOMR_MASK, macregval); in ETH_SetMACConfig()
2826 static void ETH_SetDMAConfig(ETH_HandleTypeDef *heth, const ETH_DMAConfigTypeDef *dmaconf) in ETH_SetDMAConfig() argument
2831 MODIFY_REG(heth->Instance->DMAMR, ETH_DMAMR_MASK, dmaconf->DMAArbitration); in ETH_SetDMAConfig()
2838 MODIFY_REG(heth->Instance->DMASBMR, ETH_DMASBMR_MASK, dmaregval); in ETH_SetDMAConfig()
2843 MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_MASK, dmaregval); in ETH_SetDMAConfig()
2850 MODIFY_REG(heth->Instance->DMACTCR, ETH_DMACTCR_MASK, dmaregval); in ETH_SetDMAConfig()
2857 MODIFY_REG(heth->Instance->DMACRCR, ETH_DMACRCR_MASK, dmaregval); in ETH_SetDMAConfig()
2867 static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth) in ETH_MACDMAConfig() argument
2914 ETH_SetMACConfig(heth, &macDefaultConf); in ETH_MACDMAConfig()
2930 ETH_SetDMAConfig(heth, &dmaDefaultConf); in ETH_MACDMAConfig()
2940 static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth) in ETH_DMATxDescListInit() argument
2948 dmatxdesc = heth->Init.TxDesc + i; in ETH_DMATxDescListInit()
2955 WRITE_REG(heth->TxDescList.TxDesc[i], (uint32_t)dmatxdesc); in ETH_DMATxDescListInit()
2959 heth->TxDescList.CurTxDesc = 0; in ETH_DMATxDescListInit()
2962 WRITE_REG(heth->Instance->DMACTDRLR, (ETH_TX_DESC_CNT - 1U)); in ETH_DMATxDescListInit()
2965 WRITE_REG(heth->Instance->DMACTDLAR, (uint32_t) heth->Init.TxDesc); in ETH_DMATxDescListInit()
2968 WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t) heth->Init.TxDesc); in ETH_DMATxDescListInit()
2978 static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth) in ETH_DMARxDescListInit() argument
2985 dmarxdesc = heth->Init.RxDesc + i; in ETH_DMARxDescListInit()
2995 WRITE_REG(heth->RxDescList.RxDesc[i], (uint32_t)dmarxdesc); in ETH_DMARxDescListInit()
2999 WRITE_REG(heth->RxDescList.RxDescIdx, 0U); in ETH_DMARxDescListInit()
3000 WRITE_REG(heth->RxDescList.RxDescCnt, 0U); in ETH_DMARxDescListInit()
3001 WRITE_REG(heth->RxDescList.RxBuildDescIdx, 0U); in ETH_DMARxDescListInit()
3002 WRITE_REG(heth->RxDescList.RxBuildDescCnt, 0U); in ETH_DMARxDescListInit()
3003 WRITE_REG(heth->RxDescList.ItMode, 0U); in ETH_DMARxDescListInit()
3006 WRITE_REG(heth->Instance->DMACRDRLR, ((uint32_t)(ETH_RX_DESC_CNT - 1U))); in ETH_DMARxDescListInit()
3009 WRITE_REG(heth->Instance->DMACRDLAR, (uint32_t) heth->Init.RxDesc); in ETH_DMARxDescListInit()
3012 …WRITE_REG(heth->Instance->DMACRDTPR, ((uint32_t)(heth->Init.RxDesc + (uint32_t)(ETH_RX_DESC_CNT - … in ETH_DMARxDescListInit()
3024 static uint32_t ETH_Prepare_Tx_Descriptors(ETH_HandleTypeDef *heth, const ETH_TxPacketConfigTypeDef… in ETH_Prepare_Tx_Descriptors() argument
3027 ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList; in ETH_Prepare_Tx_Descriptors()
3056 SET_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI); in ETH_Prepare_Tx_Descriptors()
3070 SET_BIT(heth->Instance->MACIVIR, ETH_MACIVIR_VLTI); in ETH_Prepare_Tx_Descriptors()
3072 SET_BIT(heth->Instance->MACVTR, ETH_MACVTR_EDVLP); in ETH_Prepare_Tx_Descriptors()
3309 static void ETH_InitCallbacksToDefault(ETH_HandleTypeDef *heth) in ETH_InitCallbacksToDefault() argument
3312 heth->TxCpltCallback = HAL_ETH_TxCpltCallback; /* Legacy weak TxCpltCallback */ in ETH_InitCallbacksToDefault()
3313 heth->RxCpltCallback = HAL_ETH_RxCpltCallback; /* Legacy weak RxCpltCallback */ in ETH_InitCallbacksToDefault()
3314 heth->ErrorCallback = HAL_ETH_ErrorCallback; /* Legacy weak ErrorCallback */ in ETH_InitCallbacksToDefault()
3315 heth->PMTCallback = HAL_ETH_PMTCallback; /* Legacy weak PMTCallback */ in ETH_InitCallbacksToDefault()
3316 heth->EEECallback = HAL_ETH_EEECallback; /* Legacy weak EEECallback */ in ETH_InitCallbacksToDefault()
3317 heth->WakeUpCallback = HAL_ETH_WakeUpCallback; /* Legacy weak WakeUpCallback */ in ETH_InitCallbacksToDefault()
3318 heth->rxLinkCallback = HAL_ETH_RxLinkCallback; /* Legacy weak RxLinkCallback */ in ETH_InitCallbacksToDefault()
3319 heth->txFreeCallback = HAL_ETH_TxFreeCallback; /* Legacy weak TxFreeCallback */ in ETH_InitCallbacksToDefault()
3321 heth->txPtpCallback = HAL_ETH_TxPtpCallback; /* Legacy weak TxPtpCallback */ in ETH_InitCallbacksToDefault()
3323 heth->rxAllocateCallback = HAL_ETH_RxAllocateCallback; /* Legacy weak RxAllocateCallback */ in ETH_InitCallbacksToDefault()