Lines Matching refs:DESC3

895       CLEAR_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_IOC);  in HAL_ETH_Stop_IT()
955 while ((dmatxdesc->DESC3 & ETH_DMATXNDESCWBF_OWN) != (uint32_t)RESET) in HAL_ETH_Transmit()
972 dmatxdesc->DESC3 = (ETH_DMATXNDESCWBF_FD | ETH_DMATXNDESCWBF_LD); in HAL_ETH_Transmit()
1065 …while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccn… in HAL_ETH_ReadData()
1068 if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_CTXT) != (uint32_t)RESET) in HAL_ETH_ReadData()
1075 …if ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET) || (heth->RxDescList.pRx… in HAL_ETH_ReadData()
1078 if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET) in HAL_ETH_ReadData()
1085 bufflength = READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_PL) - heth->RxDescList.RxDataLength; in HAL_ETH_ReadData()
1088 if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_LD) != (uint32_t)RESET) in HAL_ETH_ReadData()
1091 heth->RxDescList.pRxLastRxDesc = dmarxdesc->DESC3; in HAL_ETH_ReadData()
1194 … WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V | ETH_DMARXNDESCRF_IOC); in ETH_UpdateDescriptor()
1198 WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V); in ETH_UpdateDescriptor()
1427 if ((heth->Init.TxDesc[idx].DESC3 & ETH_DMATXNDESCRF_OWN) == 0U) in HAL_ETH_ReleaseTxPacket()
1432 CLEAR_BIT(heth->Init.TxDesc[idx].DESC3, (0x40000000U)); in HAL_ETH_ReleaseTxPacket()
1434 if ((heth->Init.TxDesc[idx].DESC3 & ETH_DMATXNDESCWBF_LD) in HAL_ETH_ReleaseTxPacket()
1435 && (heth->Init.TxDesc[idx].DESC3 & ETH_DMATXNDESCWBF_TTSS)) in HAL_ETH_ReleaseTxPacket()
2953 WRITE_REG(dmatxdesc->DESC3, 0x0U); in ETH_DMATxDescListInit()
2990 WRITE_REG(dmarxdesc->DESC3, 0x0U); in ETH_DMARxDescListInit()
3039 if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN) in ETH_Prepare_Tx_Descriptors()
3052 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_VT, pTxConfig->VlanTag); in ETH_Prepare_Tx_Descriptors()
3054 SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_VLTV); in ETH_Prepare_Tx_Descriptors()
3064 SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_IVLTV); in ETH_Prepare_Tx_Descriptors()
3067 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_IVTIR, pTxConfig->InnerVlanCtrl); in ETH_Prepare_Tx_Descriptors()
3082 SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_TCMSSV); in ETH_Prepare_Tx_Descriptors()
3089 SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_CTXT); in ETH_Prepare_Tx_Descriptors()
3093 SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN); in ETH_Prepare_Tx_Descriptors()
3102 if (READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN) in ETH_Prepare_Tx_Descriptors()
3108 CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN); in ETH_Prepare_Tx_Descriptors()
3143 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_THL, (pTxConfig->TCPHeaderLen << 19)); in ETH_Prepare_Tx_Descriptors()
3145 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen); in ETH_Prepare_Tx_Descriptors()
3147 SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE); in ETH_Prepare_Tx_Descriptors()
3151 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length); in ETH_Prepare_Tx_Descriptors()
3155 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl); in ETH_Prepare_Tx_Descriptors()
3160 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CPC, pTxConfig->CRCPadCtrl); in ETH_Prepare_Tx_Descriptors()
3171 SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD); in ETH_Prepare_Tx_Descriptors()
3173 CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT); in ETH_Prepare_Tx_Descriptors()
3177 SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN); in ETH_Prepare_Tx_Descriptors()
3182 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_SAIC, pTxConfig->SrcAddrCtrl); in ETH_Prepare_Tx_Descriptors()
3189 CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD); in ETH_Prepare_Tx_Descriptors()
3196 CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD); in ETH_Prepare_Tx_Descriptors()
3199 if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN) == ETH_DMATXNDESCRF_OWN) in ETH_Prepare_Tx_Descriptors()
3211 CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN); in ETH_Prepare_Tx_Descriptors()
3251 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen); in ETH_Prepare_Tx_Descriptors()
3253 SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE); in ETH_Prepare_Tx_Descriptors()
3258 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length); in ETH_Prepare_Tx_Descriptors()
3263 MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl); in ETH_Prepare_Tx_Descriptors()
3272 SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN); in ETH_Prepare_Tx_Descriptors()
3274 CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT); in ETH_Prepare_Tx_Descriptors()
3289 SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD); in ETH_Prepare_Tx_Descriptors()