Lines Matching refs:DESC2
1731 SET_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_TTSE); in HAL_ETH_PTP_InsertTxTimestamp()
2952 WRITE_REG(dmatxdesc->DESC2, 0x0U); in ETH_DMATxDescListInit()
2989 WRITE_REG(dmarxdesc->DESC2, 0x0U); in ETH_DMARxDescListInit()
3062 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_IVT, (pTxConfig->InnerVlanTag << 16)); in ETH_Prepare_Tx_Descriptors()
3080 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_MSS, pTxConfig->MaxSegmentSize); in ETH_Prepare_Tx_Descriptors()
3123 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len); in ETH_Prepare_Tx_Descriptors()
3131 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16)); in ETH_Prepare_Tx_Descriptors()
3137 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U); in ETH_Prepare_Tx_Descriptors()
3167 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_VTIR, pTxConfig->VlanCtrl); in ETH_Prepare_Tx_Descriptors()
3230 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len); in ETH_Prepare_Tx_Descriptors()
3239 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16)); in ETH_Prepare_Tx_Descriptors()
3245 MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U); in ETH_Prepare_Tx_Descriptors()
3280 SET_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC); in ETH_Prepare_Tx_Descriptors()
3285 CLEAR_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC); in ETH_Prepare_Tx_Descriptors()