340       if ((hdma2d->Instance->BGPFCCR & DMA2D_BGPFCCR_START) == DMA2D_BGPFCCR_START)  in HAL_DMA2D_DeInit()
369   hdma2d->Instance->BGPFCCR  =    0U;  in HAL_DMA2D_DeInit()
994     SET_BIT(hdma2d->Instance->BGPFCCR, DMA2D_BGPFCCR_START);  in HAL_DMA2D_EnableCLUT()
1037     MODIFY_REG(hdma2d->Instance->BGPFCCR, (DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM),  in HAL_DMA2D_CLUTStartLoad()
1041     SET_BIT(hdma2d->Instance->BGPFCCR, DMA2D_BGPFCCR_START);  in HAL_DMA2D_CLUTStartLoad()
1092     MODIFY_REG(hdma2d->Instance->BGPFCCR, (DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM),  in HAL_DMA2D_CLUTStartLoad_IT()
1099     SET_BIT(hdma2d->Instance->BGPFCCR, DMA2D_BGPFCCR_START);  in HAL_DMA2D_CLUTStartLoad_IT()
1155     MODIFY_REG(hdma2d->Instance->BGPFCCR, (DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM),  in HAL_DMA2D_CLUTLoad()
1159     SET_BIT(hdma2d->Instance->BGPFCCR, DMA2D_BGPFCCR_START);  in HAL_DMA2D_CLUTLoad()
1212     MODIFY_REG(hdma2d->Instance->BGPFCCR, (DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM),  in HAL_DMA2D_CLUTLoad_IT()
1219     SET_BIT(hdma2d->Instance->BGPFCCR, DMA2D_BGPFCCR_START);  in HAL_DMA2D_CLUTLoad_IT()
1253 …const __IO uint32_t *reg =  &(hdma2d->Instance->BGPFCCR);  /* by default, point at background regi…  in HAL_DMA2D_CLUTLoading_Abort()
1311 …const __IO uint32_t *reg =  &(hdma2d->Instance->BGPFCCR);  /* by default, point at background regi…  in HAL_DMA2D_CLUTLoading_Suspend()
1380       if ((hdma2d->Instance->BGPFCCR & DMA2D_BGPFCCR_START) == DMA2D_BGPFCCR_START)  in HAL_DMA2D_CLUTLoading_Resume()
1472   layer_start |= hdma2d->Instance->BGPFCCR & DMA2D_BGPFCCR_START;  in HAL_DMA2D_PollForTransfer()
1824     MODIFY_REG(hdma2d->Instance->BGPFCCR, regMask, regValue);  in HAL_DMA2D_ConfigLayer()
1902     MODIFY_REG(hdma2d->Instance->BGPFCCR, (DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM),  in HAL_DMA2D_ConfigCLUT()