627   return SBS->BOOTSR;  in HAL_SBS_GetBootAddress()
636   MODIFY_REG(SBS->HDPLCR, SBS_HDPLCR_INCR_HDPL, SBS_HDPL_INCREMENT_VALUE);  in HAL_SBS_IncrementHDPLValue()
646   return (SBS->HDPLSR & SBS_HDPLSR_HDPL);  in HAL_SBS_GetHDPLValue()
656   MODIFY_REG(SBS->DBGCR, SBS_DBGCR_AP_UNLOCK, SBS_DEBUG_UNLOCK_VALUE);  in HAL_SBS_OpenAccessPort()
666 …MODIFY_REG(SBS->DBGCR, SBS_DBGCR_DBG_UNLOCK, (SBS_DEBUG_UNLOCK_VALUE << SBS_DBGCR_DBG_UNLOCK_Pos));  in HAL_SBS_OpenDebug()
684     MODIFY_REG(SBS->DBGCR, SBS_DBGCR_DBG_AUTH_HDPL, (Level << SBS_DBGCR_DBG_AUTH_HDPL_Pos));  in HAL_SBS_ConfigDebugLevel()
701   return ((SBS->DBGCR & SBS_DBGCR_DBG_AUTH_HDPL) >> SBS_DBGCR_DBG_AUTH_HDPL_Pos);  in HAL_SBS_GetDebugLevel()
711   MODIFY_REG(SBS->DBGLOCKR, SBS_DBGLOCKR_DBGCFG_LOCK, SBS_DEBUG_UNLOCK_VALUE);  in HAL_SBS_UnlockDebugConfig()
721   MODIFY_REG(SBS->DBGLOCKR, SBS_DBGLOCKR_DBGCFG_LOCK, SBS_DEBUG_LOCK_VALUE);  in HAL_SBS_LockDebugConfig()
732   MODIFY_REG(SBS->RSSCMDR, SBS_RSSCMDR_RSSCMD, Cmd);  in HAL_SBS_ConfigRSSCommand()
741   return (SBS->RSSCMDR & SBS_RSSCMDR_RSSCMD);  in HAL_SBS_GetRSSCommand()
751   MODIFY_REG(SBS->PMCR, (SBS_PMCR_BOOSTEN | SBS_PMCR_BOOSTVDDSEL), SBS_PMCR_BOOSTEN);  in HAL_SBS_EnableIOAnalogBooster()
760   CLEAR_BIT(SBS->PMCR, SBS_PMCR_BOOSTEN);  in HAL_SBS_DisableIOAnalogBooster()
770   MODIFY_REG(SBS->PMCR, (SBS_PMCR_BOOSTEN | SBS_PMCR_BOOSTVDDSEL), SBS_PMCR_BOOSTVDDSEL);  in HAL_SBS_EnableIOAnalogSwitchVdd()
779   CLEAR_BIT(SBS->PMCR, SBS_PMCR_BOOSTVDDSEL);  in HAL_SBS_DisableIOAnalogSwitchVdd()
795   MODIFY_REG(SBS->PMCR, SBS_PMCR_ETH_PHYSEL, Config);  in HAL_SBS_ConfigEthernetPHY()
811   MODIFY_REG(SBS->PMCR, SBS_PMCR_AXISRAM_WS, Config);  in HAL_SBS_ConfigAXISRAMWaitState()
828   SET_BIT(SBS->CCCSR, Selection);  in HAL_SBS_EnableCompensationCell()
845   MODIFY_REG(SBS->CCCSR, Selection, 0U);  in HAL_SBS_DisableCompensationCell()
862   return (((SBS->CCCSR & Selection) == 0U) ? 0UL : 1UL);  in HAL_SBS_GetCompensationCellReadyStatus()
898 …MODIFY_REG(SBS->CCSWVALR, (0xFFU << offset), ((NmosValue << offset) | (PmosValue << (offset + 4U))…  in HAL_SBS_ConfigCompensationCell()
901   MODIFY_REG(SBS->CCCSR, (Selection << 1U), (Code << (POSITION_VAL(Selection) + 1U)));  in HAL_SBS_ConfigCompensationCell()
929     *pCode = ((SBS->CCCSR & (Selection << 1U)) == 0U) ? SBS_IO_CELL_CODE : SBS_IO_REGISTER_CODE;  in HAL_SBS_GetCompensationCell()
931     reg = (*pCode == SBS_IO_CELL_CODE) ? (SBS->CCVALR) : (SBS->CCSWVALR);  in HAL_SBS_GetCompensationCell()
956   SET_BIT(SBS->CCCSR, Selection);  in HAL_SBS_EnableIOSpeedOptimize()
973   MODIFY_REG(SBS->CCCSR, Selection, 0U);  in HAL_SBS_DisableIOSpeedOptimize()
996   SET_BIT(SBS->BKLOCKR, Input);  in HAL_SBS_ConfigTimerBreakInput()
1015   return (SBS->BKLOCKR & SBS_BKLOCKR_MASK);  in HAL_SBS_GetTimerBreakInputConfig()
1050   MODIFY_REG(SBS->EXTICR[reg], (0xFU << offset), (Port << offset));  in HAL_SBS_EXTIConfig()
1083   return ((SBS->EXTICR[reg] & (0xFUL << offset)) >> offset);  in HAL_SBS_GetEXTIConfig()