3778   SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1PEN);  in LL_RCC_PLL1P_Enable()
3789   SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1QEN);  in LL_RCC_PLL1Q_Enable()
3800   SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1REN);  in LL_RCC_PLL1R_Enable()
3811   SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1SEN);  in LL_RCC_PLL1S_Enable()
3821   SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1FRACEN);  in LL_RCC_PLL1FRACN_Enable()
3831   return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1PEN) == RCC_PLLCFGR_PLL1PEN) ? 1UL : 0UL);  in LL_RCC_PLL1P_IsEnabled()
3841   return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1QEN) == RCC_PLLCFGR_PLL1QEN) ? 1UL : 0UL);  in LL_RCC_PLL1Q_IsEnabled()
3851   return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1REN) == RCC_PLLCFGR_PLL1REN) ? 1UL : 0UL);  in LL_RCC_PLL1R_IsEnabled()
3861   return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1SEN) == RCC_PLLCFGR_PLL1SEN) ? 1UL : 0UL);  in LL_RCC_PLL1S_IsEnabled()
3871   return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1FRACEN) == RCC_PLLCFGR_PLL1FRACEN) ? 1UL : 0UL);  in LL_RCC_PLL1FRACN_IsEnabled()
3882   CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1PEN);  in LL_RCC_PLL1P_Disable()
3893   CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1QEN);  in LL_RCC_PLL1Q_Disable()
3904   CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1REN);  in LL_RCC_PLL1R_Disable()
3915   CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1SEN);  in LL_RCC_PLL1S_Disable()
3925   CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1FRACEN);  in LL_RCC_PLL1FRACN_Disable()
3939   return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1RGE));  in LL_RCC_PLL1_GetVCOInputRange()
3951   return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1VCOSEL));  in LL_RCC_PLL1_GetVCOOutputRange()
3967   MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLL1RGE, InputRange);  in LL_RCC_PLL1_SetVCOInputRange()
3981   MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLL1VCOSEL, VCORange);  in LL_RCC_PLL1_SetVCOOutputRange()
4138   SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1SSCGEN);  in LL_RCC_PLL1_EnableSpreadSpectrum()
4148   CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1SSCGEN);  in LL_RCC_PLL1_DisableSpreadSpectrum()
4158   return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1SSCGEN) == RCC_PLLCFGR_PLL1SSCGEN) ? 1UL : 0UL);  in LL_RCC_PLL1_IsEnabledSpreadSpectrum()
4252   SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2PEN);  in LL_RCC_PLL2P_Enable()
4263   SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2QEN);  in LL_RCC_PLL2Q_Enable()
4274   SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2REN);  in LL_RCC_PLL2R_Enable()
4285   SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2SEN);  in LL_RCC_PLL2S_Enable()
4296   SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2TEN);  in LL_RCC_PLL2T_Enable()
4306   SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2FRACEN);  in LL_RCC_PLL2FRACN_Enable()
4316   return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2PEN) == RCC_PLLCFGR_PLL2PEN) ? 1UL : 0UL);  in LL_RCC_PLL2P_IsEnabled()
4326   return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2QEN) == RCC_PLLCFGR_PLL2QEN) ? 1UL : 0UL);  in LL_RCC_PLL2Q_IsEnabled()
4336   return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2REN) == RCC_PLLCFGR_PLL2REN) ? 1UL : 0UL);  in LL_RCC_PLL2R_IsEnabled()
4346   return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2SEN) == RCC_PLLCFGR_PLL2SEN) ? 1UL : 0UL);  in LL_RCC_PLL2S_IsEnabled()
4356   return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2TEN) == RCC_PLLCFGR_PLL2TEN) ? 1UL : 0UL);  in LL_RCC_PLL2T_IsEnabled()
4366   return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2FRACEN) == RCC_PLLCFGR_PLL2FRACEN) ? 1UL : 0UL);  in LL_RCC_PLL2FRACN_IsEnabled()
4377   CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2PEN);  in LL_RCC_PLL2P_Disable()
4388   CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2QEN);  in LL_RCC_PLL2Q_Disable()
4399   CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2REN);  in LL_RCC_PLL2R_Disable()
4410   CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2SEN);  in LL_RCC_PLL2S_Disable()
4421   CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2TEN);  in LL_RCC_PLL2T_Disable()
4431   CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2FRACEN);  in LL_RCC_PLL2FRACN_Disable()
4445   return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2RGE) >> 11U);  in LL_RCC_PLL2_GetVCOInputRange()
4457   return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2VCOSEL) >> 11U);  in LL_RCC_PLL2_GetVCOOutputRange()
4473   MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLL2RGE, (InputRange << 11U));  in LL_RCC_PLL2_SetVCOInputRange()
4487   MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLL2VCOSEL, (VCORange << 11U));  in LL_RCC_PLL2_SetVCOOutputRange()
4665   SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2SSCGEN);  in LL_RCC_PLL2_EnableSpreadSpectrum()
4675   CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2SSCGEN);  in LL_RCC_PLL2_DisableSpreadSpectrum()
4685   return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL2SSCGEN) == RCC_PLLCFGR_PLL2SSCGEN) ? 1UL : 0UL);  in LL_RCC_PLL2_IsEnabledSpreadSpectrum()
4779   SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL3PEN);  in LL_RCC_PLL3P_Enable()
4790   SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL3QEN);  in LL_RCC_PLL3Q_Enable()
4801   SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL3REN);  in LL_RCC_PLL3R_Enable()
4812   SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL3SEN);  in LL_RCC_PLL3S_Enable()
4822   SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL3FRACEN);  in LL_RCC_PLL3FRACN_Enable()
4832   return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL3PEN) == RCC_PLLCFGR_PLL3PEN) ? 1UL : 0UL);  in LL_RCC_PLL3P_IsEnabled()
4842   return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL3QEN) == RCC_PLLCFGR_PLL3QEN) ? 1UL : 0UL);  in LL_RCC_PLL3Q_IsEnabled()
4852   return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL3REN) == RCC_PLLCFGR_PLL3REN) ? 1UL : 0UL);  in LL_RCC_PLL3R_IsEnabled()
4862   return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL3SEN) == RCC_PLLCFGR_PLL3SEN) ? 1UL : 0UL);  in LL_RCC_PLL3S_IsEnabled()
4872   return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL3FRACEN) == RCC_PLLCFGR_PLL3FRACEN) ? 1UL : 0UL);  in LL_RCC_PLL3FRACN_IsEnabled()
4883   CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL3PEN);  in LL_RCC_PLL3P_Disable()
4894   CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL3QEN);  in LL_RCC_PLL3Q_Disable()
4905   CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL3REN);  in LL_RCC_PLL3R_Disable()
4916   CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL3SEN);  in LL_RCC_PLL3S_Disable()
4926   CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL3FRACEN);  in LL_RCC_PLL3FRACN_Disable()
4940   return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL3RGE) >> 22U);  in LL_RCC_PLL3_GetVCOInputRange()
4952   return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL3VCOSEL) >> 22U);  in LL_RCC_PLL3_GetVCOOutputRange()
4968   MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLL3RGE, (InputRange << 22U));  in LL_RCC_PLL3_SetVCOInputRange()
4982   MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLL3VCOSEL, (VCORange << 22U));  in LL_RCC_PLL3_SetVCOOutputRange()
5140   SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL3SSCGEN);  in LL_RCC_PLL3_EnableSpreadSpectrum()
5150   CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL3SSCGEN);  in LL_RCC_PLL3_DisableSpreadSpectrum()
5160   return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL3SSCGEN) == RCC_PLLCFGR_PLL3SSCGEN) ? 1UL : 0UL);  in LL_RCC_PLL3_IsEnabledSpreadSpectrum()