Lines Matching refs:Bank
1062 const FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank);
1064 … const FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank,
1067 FMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank);
1075 HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Enable(FMC_NORSRAM_TypeDef *Device, uint32_t Bank);
1076 HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Disable(FMC_NORSRAM_TypeDef *Device, uint32_t Bank);
1092 … const FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank);
1094 … const FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank);
1095 HAL_StatusTypeDef FMC_NAND_DeInit(FMC_NAND_TypeDef *Device, uint32_t Bank);
1103 HAL_StatusTypeDef FMC_NAND_ECC_Enable(FMC_NAND_TypeDef *Device, uint32_t Bank);
1104 HAL_StatusTypeDef FMC_NAND_ECC_Disable(FMC_NAND_TypeDef *Device, uint32_t Bank);
1105 HAL_StatusTypeDef FMC_NAND_GetECC(const FMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank,
1123 const FMC_SDRAM_TimingTypeDef *Timing, uint32_t Bank);
1124 HAL_StatusTypeDef FMC_SDRAM_DeInit(FMC_SDRAM_TypeDef *Device, uint32_t Bank);
1132 HAL_StatusTypeDef FMC_SDRAM_WriteProtection_Enable(FMC_SDRAM_TypeDef *Device, uint32_t Bank);
1133 HAL_StatusTypeDef FMC_SDRAM_WriteProtection_Disable(FMC_SDRAM_TypeDef *Device, uint32_t Bank);
1139 uint32_t FMC_SDRAM_GetModeStatus(const FMC_SDRAM_TypeDef *Device, uint32_t Bank);