Lines Matching refs:APB5ENR

1877                                             SET_BIT(RCC->APB5ENR, RCC_APB5ENR_LTDCEN);\
1879                                             tmpreg = READ_REG(RCC->APB5ENR);\
1885                                             SET_BIT(RCC->APB5ENR, RCC_APB5ENR_DCMIPPEN);\
1887                                             tmpreg = READ_REG(RCC->APB5ENR);\
1893                                             SET_BIT(RCC->APB5ENR, RCC_APB5ENR_GFXTIMEN);\
1895                                             tmpreg = READ_REG(RCC->APB5ENR);\
1899 #define __HAL_RCC_LTDC_CLK_DISABLE()   CLEAR_BIT(RCC->APB5ENR, RCC_APB5ENR_LTDCEN)
1901 #define __HAL_RCC_DCMIPP_CLK_DISABLE() CLEAR_BIT(RCC->APB5ENR, RCC_APB5ENR_DCMIPPEN)
1903 #define __HAL_RCC_GFXTIM_CLK_DISABLE() CLEAR_BIT(RCC->APB5ENR, RCC_APB5ENR_GFXTIMEN)
2213 #define __HAL_RCC_LTDC_IS_CLK_ENABLED()    (READ_BIT(RCC->APB5ENR, RCC_APB5ENR_LTDCEN) != 0U)
2215 #define __HAL_RCC_DCMIPP_IS_CLK_ENABLED()  (READ_BIT(RCC->APB5ENR, RCC_APB5ENR_DCMIPPEN) != 0U)
2217 #define __HAL_RCC_GFXTIM_IS_CLK_ENABLED()  (READ_BIT(RCC->APB5ENR, RCC_APB5ENR_GFXTIMEN) != 0U)