Lines Matching refs:APB4RSTR

2563 #define __HAL_RCC_APB4_FORCE_RESET()       WRITE_REG(RCC->APB4RSTR, 0x04009E2AUL)
2564 #define __HAL_RCC_APB4_RELEASE_RESET()     WRITE_REG(RCC->APB4RSTR, 0UL)
2566 #define __HAL_RCC_SBS_FORCE_RESET()        SET_BIT(RCC->APB4RSTR, RCC_APB4RSTR_SBSRST)
2567 #define __HAL_RCC_SBS_RELEASE_RESET()      CLEAR_BIT(RCC->APB4RSTR, RCC_APB4RSTR_SBSRST)
2569 #define __HAL_RCC_LPUART1_FORCE_RESET()    SET_BIT(RCC->APB4RSTR, RCC_APB4RSTR_LPUART1RST)
2570 #define __HAL_RCC_LPUART1_RELEASE_RESET()  CLEAR_BIT(RCC->APB4RSTR, RCC_APB4RSTR_LPUART1RST)
2572 #define __HAL_RCC_SPI6_FORCE_RESET()       SET_BIT(RCC->APB4RSTR, RCC_APB4RSTR_SPI6RST)
2573 #define __HAL_RCC_SPI6_RELEASE_RESET()     CLEAR_BIT(RCC->APB4RSTR, RCC_APB4RSTR_SPI6RST)
2575 #define __HAL_RCC_LPTIM2_FORCE_RESET()     SET_BIT(RCC->APB4RSTR, RCC_APB4RSTR_LPTIM2RST)
2576 #define __HAL_RCC_LPTIM2_RELEASE_RESET()   CLEAR_BIT(RCC->APB4RSTR, RCC_APB4RSTR_LPTIM2RST)
2578 #define __HAL_RCC_LPTIM3_FORCE_RESET()     SET_BIT(RCC->APB4RSTR, RCC_APB4RSTR_LPTIM3RST)
2579 #define __HAL_RCC_LPTIM3_RELEASE_RESET()   CLEAR_BIT(RCC->APB4RSTR, RCC_APB4RSTR_LPTIM3RST)
2581 #define __HAL_RCC_LPTIM4_FORCE_RESET()     SET_BIT(RCC->APB4RSTR, RCC_APB4RSTR_LPTIM4RST)
2582 #define __HAL_RCC_LPTIM4_RELEASE_RESET()   CLEAR_BIT(RCC->APB4RSTR, RCC_APB4RSTR_LPTIM4RST)
2584 #define __HAL_RCC_LPTIM5_FORCE_RESET()     SET_BIT(RCC->APB4RSTR, RCC_APB4RSTR_LPTIM5RST)
2585 #define __HAL_RCC_LPTIM5_RELEASE_RESET()   CLEAR_BIT(RCC->APB4RSTR, RCC_APB4RSTR_LPTIM5RST)
2587 #define __HAL_RCC_VREF_FORCE_RESET()       SET_BIT(RCC->APB4RSTR, RCC_APB4RSTR_VREFRST)
2588 #define __HAL_RCC_VREF_RELEASE_RESET()     CLEAR_BIT(RCC->APB4RSTR, RCC_APB4RSTR_VREFRST)
2590 #define __HAL_RCC_DTS_FORCE_RESET()        SET_BIT(RCC->APB4RSTR, RCC_APB4RSTR_DTSRST)
2591 #define __HAL_RCC_DTS_RELEASE_RESET()      CLEAR_BIT(RCC->APB4RSTR, RCC_APB4RSTR_DTSRST)