Lines Matching refs:APB2ENR
1643 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN);\
1645 tmpreg = READ_REG(RCC->APB2ENR);\
1651 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
1653 tmpreg = READ_REG(RCC->APB2ENR);\
1659 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN);\
1661 tmpreg = READ_REG(RCC->APB2ENR);\
1667 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
1669 tmpreg = READ_REG(RCC->APB2ENR);\
1675 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN);\
1677 tmpreg = READ_REG(RCC->APB2ENR);\
1683 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN);\
1685 tmpreg = READ_REG(RCC->APB2ENR);\
1691 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN);\
1693 tmpreg = READ_REG(RCC->APB2ENR);\
1699 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM9EN);\
1701 tmpreg = READ_REG(RCC->APB2ENR);\
1707 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI5EN);\
1709 tmpreg = READ_REG(RCC->APB2ENR);\
1715 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN);\
1717 tmpreg = READ_REG(RCC->APB2ENR);\
1723 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN);\
1725 tmpreg = READ_REG(RCC->APB2ENR);\
1729 #define __HAL_RCC_TIM1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN)
1731 #define __HAL_RCC_USART1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN)
1733 #define __HAL_RCC_SPI1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN)
1735 #define __HAL_RCC_SPI4_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN)
1737 #define __HAL_RCC_TIM15_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN)
1739 #define __HAL_RCC_TIM16_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN)
1741 #define __HAL_RCC_TIM17_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN)
1743 #define __HAL_RCC_TIM9_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM9EN)
1745 #define __HAL_RCC_SPI5_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI5EN)
1747 #define __HAL_RCC_SAI1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN)
1749 #define __HAL_RCC_SAI2_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN)
2147 #define __HAL_RCC_TIM1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN) != 0U)
2149 #define __HAL_RCC_USART1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) != 0U)
2151 #define __HAL_RCC_SPI1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN) != 0U)
2153 #define __HAL_RCC_SPI4_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN) != 0U)
2155 #define __HAL_RCC_TIM15_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN) != 0U)
2157 #define __HAL_RCC_TIM16_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN) != 0U)
2159 #define __HAL_RCC_TIM17_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN) != 0U)
2161 #define __HAL_RCC_TIM9_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM9EN) != 0U)
2163 #define __HAL_RCC_SPI5_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI5EN) != 0U)
2165 #define __HAL_RCC_SAI1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) != 0U)
2167 #define __HAL_RCC_SAI2_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN) != 0U)